Saint Jérôme de Douala . Saint Jerome Douala .

Institut Supérieur des Sciences Religieuses et Sociales University Institute of Social and Religious Sciences
Institut Supérieur des Sciences de Gestion Appliquée University Institute of Applied Management Sciences
Saint Jérôme Polytechnique Saint Jerome Polytechnic

Academic year 2018-2019 Saint-Jérôme Polytechnique

EC : Microprocessors and microcontrollers

Level: SJP3 Continious assement #3: PIC16F877 microcontroller Duration: 30min

Mechatronics engineering Name:

The test consists of 20 multiple choice questions. A question may have more than one answer or no answer, simply
check the boxes next to you answer(s). Please don’t check colored boxes, they are for correction purpose.

1. The PIC 16F877 ☐☐☐ c. ☐A 13-bits register

a. ☒ Can operated at 20MHz clock signal d. ☐ A 14-bits register
b. ☐ Is a RISC computer 8. The accumulator register of the PIC16F877
c. ☒Has a Harvard architecture is :
d. ☐ Has 33 Inputs/outputs pins ☐☐☐
2. In the PIC16F877, the instructions are a. ☐ The flag register
☐☐☐ b. ☐ the STATUS register
a. ☐ 14 Bits length c. ☒ The Work register W
b. ☐ 16 Bits length d. ☐ The PIR1 register
c. ☐Stored in the flash memory 9. The PIC16F877 interrupts are controlled by
d. ☐Stored in the EEPROM memory ☐☐☐:
3. The program memory of the PIC6F877 a. ☐ The T1CON register
☐☐☐ b. ☒ the SSPCON register
a. ☐Is 8192K Words c. ☐ The INTCON register
b. ☒ Is 8192K Bytes d. ☐ The PIR1 register
c. ☒ Is addressed with a 9 lines address bus 10. The direction of a Input/output is controlled
d. ☐ Is addressed with a 13 lines address by ☐☐☐:
bus a. ☐The PORT register
4. The RAM memory of the PIC16F877 ☐☐☐ b. ☐ The EECON register
a. ☒ Has 368 memory locations c. ☐ The TRIS register
b. ☐ is structured in 3 banks d. ☒ The STATUS register
c. ☐ Has a byte organization 11. The address of the interrupt subroutine in
d. ☐ is accessed via a 9 lines address bus the PIC16F877 is ☐☐☐:
5. Which of the following is not a peripheral a. ☐ 0xFFFF
module of the PIC16F877 ☐☐☐ b. ☒ 0x1FFF
a. ☐ 2 Capture, Compare and PWM module c. ☐ 0x0000
b. ☐ 10-bits Analog to Digital Converter d. ☐ 0x0004
c. ☒ 9-bits address detection of UART 12. The PORTA of PIC16F877 ☐☐☐:
d. ☐ 3 timers: Timer0, Timer1 and Timer2 a. ☒ is 8-bits wide
6. The PIC16F877 can manage ☐☐☐ b. ☒ Can be used only as digital I/O
a. ☐ Only asynchronous Serial c. ☐ Can be used both as analog and digital
communications with it UART module d. ☐ is 6-bits wide
b. ☐ Synchronous and asynchronous serial 13. The PIC 16F877 with can be used for parallel
com. with its USART and MSSP modules communication is ☐☐☐:
c. ☐ Only parallel com. with its PSP module a. ☒PORTA
d. ☒ none of the above answer is correct b. ☐PORTB
7. The program counter of the PIC16F877 (split c. ☐PORTC
in PCL and PCLATH) is ☐☐☐ d. ☐PORTD
a. ☒ An 8-bits register 14. The reset vector of the PIC 16F877 is ☐☐☐
b. ☐A 16-bits register
 a. ☐ 0xFFFF b. ☐ 0.5µs
b. ☐ 0x1FFF c. ☐ 1µ
c. ☐ 0x0FFF d. ☒ 0.2µs
d. ☒ 0x0000 18. Which of the following registers is/are not
15. The following code: accessible in bank0 ☐☐☐
BSF STATUS, RP0 ; Select Bank 1 a. ☐ STATUS
MOVLW 0xCF;
MOVWF TRISA ; ☐☐☐
b. ☐TRISB
a. ☐ Set RA0 to RA3 as outputs c. ☒ PCON
b. ☐ Set RA4 and RA5 as outputs d. ☐ ADRESH
c. ☒ Set RA0 to RA3 as inputs 19. Which timer possesses an ability to prevent
d. ☐ Set RA4 and RA5 as I nputs an endless loop hanging condition of PIC
along with its own on-chip RC oscillator by
16. In the following code ☐☐☐:
contributing to its reliable operation? ☐☐☐
LOOP BTSS PORTB,2;
a. ☐ Power-Up Timer (PWRT)
BCF PORTA,2;
b. ☐ Oscillator Start-Up Timer (OST)
BSF PORTA,2
c. ☐ Watchdog Timer (WDT)
GOTO LOOP ;
d. ☒ All of the above
a. ☐ if PORTB,2 is low, PORTA,2 is set high
20. Which command enables the PIC to enter
b. ☒ if PORTB,2 is high, PORTA,2 is set high
into the power down mode during the
c. ☐ if PORTB,2 is high, PORTA,2 is set low
operation of watchdog timer (WDT)?☐☐☐
d. ☐ if PORTB,2 is low, PORTA,2 is set low
a. ☒SLEEP
17. The duration of a single-cycle instruction in a
b. ☐RESET
PIC 16F877 clocked at 20MHz is ☐☐☐:
c. ☐STATUS
a. ☐ 1ms
d. ☐CLR