MSP430FG4618/F2013 Experimenter’s Board

U s e r 's G u i d e

User's Guide

SLAU213A
October 2007 Mixed Signal Products
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If You Need Assistance
Support for the MSP430 device and the experimenter’s board
is provided by the Texas Instruments Product Information
Center (PIC). Contact information for the PIC can be found on
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protection against radio frequency interference. Operation of
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required to correct this interference.
1. Getting Started
The MSP430FG4618/F2013 experimenter’s board is a comprehensive
development target board that can be used for a number of applications. The
MSP-EXP430FG4618 kit comes with one MSP430FG4618/F2013 experimenter’s
board shown in Figure 1 and two AAA 1.5 V batteries.

Figure 1: MSP430FG4618/F2013 Experimenter’s Board

2. Devices Supported
The MSP430FG4618/F2013 experimenter’s board is based on the Texas
Instruments ultra-low power MSP430 family of microcontrollers [1, 2]. Residing on
this board are the MSP430FG4618 [3] and the MSP430F2013 [4] microcontrollers.

3. Tools Requirement
An MSP430 Flash Emulation Tool (MSP-FET430UIF) is required to download
code and debug the MSP430FG4618 and MSP430F2013. Two separate JTAG
headers are available, supporting independent debug environments. The
MSP430FG4618 uses the standard 4-wire JTAG connection while the
MSP430F2013 uses the Spy-Bi-wire (2-wire) JTAG interface allowing all port pins
to be used during debug. For more details on the Flash Emulation Tool, refer to
the MSP430 Flash Emulation Tool (FET) User’s Guide [5], which covers two
different debug environments: IAR Embedded Workbench and TI Code Composer
Essentials (CCE). Detailed information of their use is included in Appendix A.

1
4. Functional Overview
The MSP430FG4618/F2013 experimenter’s board supports various applications
through the use of the on-chip peripherals connecting to a number of on-board
components and interfaces as shown in Figure 2.

Wireless Analog
LCD
CC1100/ Out
2420/2500
EMK
Interface Buzzer

RS-232
FG4618
JTAG1

Microphone

F2013
JTAG2

Capacitive Buttons
Touch
Pad

Figure 2: Experimenter’s Board Block Diagram

Wireless communication is possible through the expansion header which is

compatible with all Chipcon Wireless Evaluation Modules from Texas Instruments.
Interface to a 4-mux LCD, UART connection, microphone, audio output jack,
buzzer, and single touch capacitive touch pad enable the development of a variety
of applications. Communication between the two on-board microcontrollers is also
possible. In addition, all pins of the MSP430FG4618 are made available either via
headers or interfaces for easy debugging. Sample code for this board is available
online at www.ti.com/msp430.

2
5. Hardware Installation
Power may be provided locally from two on-board AAA batteries, externally from a
Flash emulation tool (FET), or an external supply. The power source is selected
by configuring jumpers VCC_1, VCC_2, and BATT. PWR1 and PWR2 will supply
power to each MSP430 independently. Appendix B has information on the exact
location of these jumpers. Figure 3 shows the jumper hierarchy and configuration
options.

Figure 3: Jumper Settings for Power Selection

The battery jumper BATT is used to select the on-board batteries to power the
system, independent of the FET connections. The user must ensure that this
voltage meets the requirement for proper functionality of the MSP430.

The power selection jumpers VCC_1 and VCC_2 select the power connections
between the board and each FET interface. These jumpers are two rows of 3-pin
headers, one for each MSP430 on-board. VCC_1, the bottom row, is for the
MSP430FG4618 and, VCC_2 on the top row, is for the MSP430F2013. A jumper
placed on the rightmost 2-pins (FET) selects the JTAG FET as the power source.
A jumper placed on the leftmost 2-pins (LCL) would enable local power (either
from the batteries or an external supply) to be applied to each FET for proper logic
threshold level matching during program/debug.

Headers PWR1 and PWR2 have been provided to enable power to the individual
MSP430s. A jumper placed on PWR1 provides power to the MSP430FG4618 and
a jumper placed on PWR2 provides power to the MSP430F2013. Individual device
current consumption can be measured via each of these jumpers. Care should be
taken that MSP430 interconnections are not made that could influence such a
measurement.

Once the required power selections have been made the experimenter’s board is
ready to be used. Both the MSP430FG4618 and MSP430F2013 are factory
programmed. After power up, the MSP430FG4618 executes an ultra-low power
real-time clock displayed on the LCD. The MSP430F2013 pulses LED3 from
LPM3 using the VLO as a periodic wake-up time base.

3
6. Functional Overview
This section contains information about the various on-board interfaces and their
functionality and about the various peripherals enabling these interfaces. Wireless
applications are facilitated using the MSP430’s capabilities to interface with the
Chipcon wireless evaluation modules (CCxxxxEMK) from Texas Instruments. The
on-board LEDs and LCD display are used for visual feedback. Audio applications
leveraging the MSP430FG4618’s full analog signal chain can be implemented
using the microphone and the audio output jack. In addition, communication
across components on and off the board has been integrated.

6.1 Interfaces

Some of these interfaces have the option of being inactive when not in use to
conserve power. This is made possible by MSP430 port pin configurations and/or
hardware jumpers on-board. Appendix B gives complete details of these jumper
configurations and their positions.

6.1.1 4-Mux LCD Display

The integrated SoftBaugh SBLCDA4 LCD display supports 4-MUX

operation and interfaces to the LCD driver peripheral of the
MSP430FG4618. More information on the LCD can be obtained from the
manufacturer’s datasheet.

6.1.2 Momentary-On Push Buttons

Two external push buttons, S1 and S2, are connected to the interrupt
capable MSP430FG4618 digital I/O port, P1.

6.1.3 Light Emitting Diodes (LEDs)

The experimenter board has a total of four LEDs, three connected to the
MSP430FG4618 and one connected to the MSP430F2013. The LEDs are
primarily used for display purposes. Two of the LEDs can be disconnected
using jumpers to reduce the overall power consumption of the board.

6.1.4 Buzzer

A buzzer is connected to a digital I/O port of the MSP430FG4618. It is

driven via a port pin of the MSP430. The buzzer can be completely
disconnected by using jumper JP1.

6.1.5 Single-Touch Sensing Interface

A capacitive touch sensing interface in the shape of a “4” is provided on-

board. This touchpad is connected to the digital I/O ports of the
MSP430F2013. A total of 16 individual segments form the touchpad, and
activity is monitored by the MSP430F2013. The resulting data is
communicated to the MSP430FG4618 via the MSP430 inter-
communication connections provided on-board.

4
6.2 Communication Peripherals

The experimenter’s board supports numerous communication interfaces for on-

and off-board connections.

6.2.1 Chipcon Wireless Evaluation Module Interface

Interface to the wireless world is accomplished via the Wireless Evaluation

Module header supporting the CCxxxxEMK boards from TI. The
transceiver modules are connected to the USART of the MSP430FG4618
configured in SPI mode. Libraries [6] that interface the MSP430 to these
transceivers are available at www.ti.com/msp430. The CC2420EMK
supports the 802.15.4/Zigbee standard. The CC1100EMK may be
configured to work at an RF carrier frequency of up to 868 MHz and the
CC2500EMK/CC2420EMK at an RF carrier frequency of 2.4 GHz.

6.2.2 RS-232

For a serial interface to a PC, the MSP430FG4618 supports the standard

RS-232 9-pin interface via its USCI peripheral configured in UART mode.
Standard baud rates for transmission and reception can be configured
using in software

6.2.3 I2C/SPI

The MSP430FG4618 and the MSP430F2013 have support for I2C and
SPI protocols using the USCI and the USI peripherals. This protocol is
used for inter-processor communication The link can be disconnected in
hardware allowing these peripherals to be used for other communication
purposes.

6.3 Analog Signal Chain

The experimenter’s board is capable of forming a complete analog signal chain

using the MSP430FG4618. This board can be used for numerous audio
applications and is capable of recording and playback of audio signals without the
use of additional external components.

1ST Order 12-bit

Active HPF Analog-to- Data
Analog IN Filter digital Digital IN Processing
Using OA0 Converter

MIC
SAMPLING FREQ

12-bit 2ND Order Active Output Jack

Digital-to- Active LPF Voltage
analog Filter Follower
Converter Using OA1 Using OA2

Analog OUT
Figure 4: MSP430 Analog Signal Chain

5
 6.3.1 Microphone

The microphone is connected to the MSP430FG4618 and may be used

for various applications. The microphone is enabled/disabled via a port pin
connected to the MSP430FG4618.

6.3.2 Analog Filters

An active first order high-pass filter (HPF) with a cut-off frequency set at
approximately 340Hz follows the microphone to eliminate extremely low
input frequencies. An optional 2nd order Sallen-Key active low-pass filter
(LPF) with a cut-off frequency set to approximately 4 kHz removes the
high-frequency noise on the analog output of the 12-bit DAC. The filter
setup is shown in Figure 5. These filters use the integrated Op-Amps of
the MSP430. The Op-Amps OA0 & OA1 facilitate the filtering processes.
The grayed dashed blocks in Figure 5 identify those elements which are
internal to the MSP430FG4618.

C21 15pF
MSP430
Internal
R30 150K 1st Order
C18 Active HPF
470nF
-
R29 OA0I0 12-bit 12-bit
OA0
1K ADC12
OA0O DAC12
+ OA0O
MIC OA0I1

C17
3.3nF - OA1O OA2I1 -
OA1I1
OA1 OA2
+ + OA2O
R24 R25 C16 OA1I0 OA2I0
1.4K 15.4K 22nF
Unity Gain
nd Buffer
SALLEN-KEY 2
Order Active LPF

Figure 5: Active Analog Filter setup

6.3.3 Analog Output

Analog output can be brought out of the board via a mono 3.5mm jack
connected to the integrated Op-Amp OA2. The input to this amplifier can
be internally connected to the DAC12 output of the MSP430FG4618.
Several attenuation options are provided internally and in hardware using
jumper JP4.

6
6.4 System Clocks

The experimenter’s board has various system clock options that support low and
high frequencies. Each MSP430 has integrated clock sources as well as support
for external connections.

6.4.1 MSP430F2013 Clock Sources

The MSP430F2013 uses the internal VLO operating at ~12kHz for an

ultra-low power standby wake up time base. The integrated DCO is
internally programmable at frequencies up to 16MHz for high speed CPU
and system clocking.

6.4.2 MSP430FG4618 Clock Sources

A standard 32.768kHz watch crystal is populated at footprint X2 and

sources source ACLK of the MSP430FG4618 for low frequency, ultra-low
power standby operation and RTC functionality. The integrated FLL+ clock
module provides a programmable internal high frequency clock source for
the CPU and other peripherals on-chip. In addition to the FLL+, an
external high frequency crystal or resonator up to 8MHz can be added via
footprint X1.

6.5 Jumper Configurations

The board supports various peripherals and components to be enabled when

required and disabled when not in use to reduce overall power consumption. This
is achieved either by software or directly in hardware. Some of the jumpers are
mandatory for the board to function correctly. Refer to Appendix B for detailed
information regarding the exact locations of these jumpers and their functionality.

7
7. Frequently Asked Questions
1) What devices can be programmed with the experimenter’s board?
The experimenter’s board is designed to develop applications using the
MSP430FG4618 and MSP430F2013. These devices can be replaced by
MSP430FG461x and MSP430F20xx device derivatives, respectively.

2) How is power supplied to the experimenter’s board?

Three supply options exist: 2xAAA battery power, JTAG and external power
supplies are supported.

3) Can I use the Parallel FET (MSP-FET430PIF) to program/debug the

MSP430?
The MSP4304618 supports the USB and Parallel Port FETs. The
MSP430F2013 is supported by the USB FET (MSP-FET430UIF) only. The
Parallel Port FET does not support the Spy Bi-Wire program/debug mode
used.

4) I have erased and reprogrammed the MSP430; can I restore the factory
programmed-firmware on the device(s)?
The software source files are available at the MSP-EXP430FG4618
documentation page at www.ti.com/msp430.

5) The MSP430FG4618 is no longer accessible via JTAG, is something

wrong with the device?
- Verify that the target device is powered properly

- If the target is powered locally, verify Vcc is applied to pin 4 of the JTAG
header

- If communication and power are correctly applied to the target and the issue
persists, it may be due to the MSP430FG4618 accidentally being
programmed with MSP430F2xx source code. In some conditions ‘F2xx
source code loaded onto the ‘FG4618 can configure the SVS module to
monitor SVSIN (P6.7) and reset the device in case of a low voltage condition
externally applied. Temporarily connecting P6.7 of the ‘FG4618 to Vcc and
reprogramming the target device with the valid source code will eliminate this
issue.

6) Does the experimenter’s board protect against blowing the JTAG fuse of
the target devices?
No. Fuse blow capability is inherent to all Flash-based MSP430 devices in
order to protect user’s intellectual property. Care must be taken to avoid the
enabling of the fuse blow option during programming that would prevent
further access to the MSP430 device(s) via JTAG.

7) I am measuring system current in the range of 30mA, is this normal?

Current consumption of the system is dependent on the functions and
operation of the hardware being performed. The RF connectivity and isolated
UART communication support, when used, can reach these current
consumption levels. Take care that these elements are not accidentally
enabled, specifically the isolated UART, if such system currents are not
expected.

8
 8) Can I use two FETs to perform simultaneous access of the FG4618 and
F2013 during program/debug?
Yes, independent flash emulation tools (either USB or Parallel for ‘FG4618
and USB only for ‘F2013) can be simultaneously used to program the MSP430
target devices. When supplying power via the FET, it is recommended to use
only one FET to source power. The second FET can sense this voltage level
instead of supplying power, to avoid any voltage conflicts in-system. Refer to
section 5 Hardware Installation for details regarding supported power supply
configurations.

9) I cannot properly open the workspace and projects provided in the .zip
file with IAR, how can I open the sample code?
The IAR workspace/projects included for the sample code provided has been
created using IAR Embedded Workbench Version 3.42A. These projects are
not backward compatible with older IAR releases and will not open using prior
versions. New workspace/projects can be created and the sample code
source files can be added manually in order to build these samples with older
versions. Instruction for setting up a project in IAR are described in the MSP-
FET430 Flash Emulation Tool (FET) (for use with IAR v3.x) User's Guide,[5].

10) I have loaded the ‘FG4618 and ‘F2013 sample code for the capacitive
touch sensing application. It doesn’t seem to be working, what is wrong?
Verify that the correct jumper settings are used for H1 enabling the I2C
communication link between MSP430s. Make sure jumper JP2 is removed,
disconnecting LED3 from the touchpad circuitry. When connected, the LED
causes the measurement of the capacitive touch element on P1.0 to fail.

8. References

1. MSP430x4xx Family User's Guide, Texas Instruments literature number SLAU056

2. MSP430x2xx Family User's Guide, Texas Instruments literature number SLAU144
3. MSP430xG461x device data sheet, Texas Instruments literature number SLAS508
4. MSP430x20x3 Device datasheet, Texas Instruments literature number SLAS491
5. MSP-FET430 Flash Emulation Tool (FET) (for use with IAR v3.x) User's Guide, Texas Instruments
literature number SLAU138
6. MSP430 Interface to CC1100/2500 Code Library, Texas Instruments literature number SLAA325

9
 Appendix A Configuring an IAR Embedded Workbench Project
IAR Embedded Workbench may be used to program/debug the on-board MSP430
devices with custom firmware or provided sample code available at
www.ti.com/msp430. Programming and debug is done using JTAG1 and JTAG2
providing access to the MSP430FG4618 and MSP430F2013 respectively. Steps
to program each of these devices are shown in this section. It is assumed that the
USB FET tool has been installed using the instructions provided in the FET User’s
guide. Please note that the Parallel port FET tool can also be used to
program/debug the MSP430FG4618.

MSP430FG4618 Programming

1. Connect the 14-pin cable to the JTAG1 header on the board.

2. Create a new project or load a valid existing project on the IAR Embedded
Workbench.

3. In IAR Embedded Workbench under the Project drop-down choose Options;

this brings up the menu shown in Figure A-1. Under the General
OptionsÆTarget choose MSP430FG4618 from the MSP430x4xx Family
option.

Figure A-1: Device selection in IAR

10
4. From the same menu under the Debugger option, select the FET Debugger
shown as a snapshot in Figure A-2.

Figure A-2: Selecting the FET Debugger

5. Then proceed to the FET Debugger option and choose the Texas Instrument
USB-IF as shown in Figure A-3. The default setting of Automatic needs no
change.

Figure A-3: Selection of the USB interface

11
 MSP430F2013 Programming

1. Connect the 14-pin cable to JTAG2 header on the board.

2. Create a new project or load a valid existing project on the IAR Embedded
Workbench.

3. In IAR Embedded Workbench under the Project drop-down choose Options;

this brings up the menu shown in Figure A-1. Under the General
OptionsÆTarget choose MSP430F2013 from the MSP430x2xx Family
option.

4. From the same menu under the Debugger option select the FET Debugger
shown as a snapshot in Figure A-2.

5. Then proceed to the FET Debugger option and choose the Texas Instrument
USB-IF as shown in Figure A-3. The default setting of Automatic needs no
change.

6. For a new project created, the Spy-Bi-Wire interface is the default setting for
the MSP430F2013. If this selection needs modification, under the FET
Debugger menu as shown in Figure A-4, check the Override default box and
then make the Spy-Bi-Wire selection instead of the 4-Wire JTAG. It is to be
noted that the Parallel FET does not support the Spy-Bi-Wire interface and
cannot be used to debug/program the MSP430F2013.

Figure A-4: Selection of the Spy-Bi-Wire interface for MSP430F2013

12
Appendix B Jumper Locations and Settings
Figure B-1 represents the location and name of each jumper on the experimenter’s
board.

Figure B-1: Jumper Locations

13
Table B-1 Jumper Settings and Functionality

Functionality when Functionality when

Header Requirement
jumper present jumper absent

Provides power to MSP430FG4618 Required for

MSP430FG4618 is
PWR1 Also used to measure current MSP430FG4618
not powered
consumption of the MSP430FG4618 use

Provides power to MSP430F2013 Required for

MSP430F2013 is
PWR2 Also used to measure current MSP430F2013
not powered
consumption of the MSP430F2013 use

Batteries will not

On-board batteries provide power Also Required for use with
BATT provide power to
used to measure current consumption AAA batteries
either MSP430

Buzzer enabled and connected

JP1 Buzzer muted Optional
to P3.5 of the MSP430FG4618

LED3 enabled and connected LED3 connection Optional / Required for

JP2
to P1.0 of the MSP430F2013 disabled LED3 use

LED4 enabled and connected LED4 connection Optional / Required for

JP3
to P5.1 of MSP430FG4618 disabled LED4 use

98% attenuation of
Attenuation set to approximately
JP4 the DAC12 audio Optional
69% of the DAC12 audio output
output

I2C Configuration Required for

Header H1 No communication
1-2: SDA – UCB0SDA inter-processor
(Pins 1-2, 3-4) possible via I2C
3-4: SCL – UCB0SCL communication

SPI Configuration
Header H1 1-2: SDI – UCB0SIMO Required for
3-4: SDO – UCB0SOMI No communication
(Pins 1-2, 3-4, inter-processor
possible via SPI
5-6, 7-8) 5-6: P1.4 – P3.0 (CS) communication
7-8: SCLK – UCB0CLK

Table B-1 breaks down the function of each jumper shown in Figure B-1.

14
 MSP430FG4618 Pin Access Power Supply Configuration RF Daughter Card Connect Isolated RS232 Communication
VCC 1 2 VCC 1 2
H2 H5 H8 VREG_EN 3 4 3 4 DVCC_4618

1k
R1
SW1 1 2 SW2 LCDCAP 1 2 P5.7 P6.0 1 2 P6.1 LCL_PWR1 3 RESETCC 5 6 FIFO 5 6
GDO0 3 4 GDO2 P5.6 3 4 P5.5 P6.2 3 4 P6.3 2 2 7 8 FIFOP 7 8
RESETCC 5 6 VREG_EN P6.4 5 6 P6.5 1 FET_PWR1 1 9 10 GDO0 9 10

R2
2k2
FIFO 7 8 FIFOP P6.6 7 8 P6.7 BATT VCC_1 11 12 GDO2 11 12
LCL_PWR2 3 13 14 P4.2 13 14 U1

+
H3 H6 H9 2 15 16 UCLK1 C1 15 16 2 8
UTXD1 1 2 URXD1 P7.0 1 2 UCA0SIMO VEREF- 1 2 VEREF+ FET_PWR2 1 17 18 SIMO1 17 18 7

D1
1N4148
P4.2 3 4 SIMO1 UCA0SOMI 3 4 UCA0CLK P5.0 3 4 P5.1 VCC_2 19 20 SOMI1 0.1uF 19 20 6

B1
SOMI1 5 6 UCLK1 P7.4 5 6 P7.5 P10.6 5 6 P10.7

-
P4.6 7 8 P4.7 P7.6 7 8 P7.7 RF1 RF2 3 5

H4 H7 GND PS8802 GND G2

P2.0 1 2 P2.1 P3.0 1 2 UCB0SDA GND DVCC_4618 GND 5 9
P2.2 3 4 P2.3 UCB0SCL 3 4 UCB0CLK VCC_1: FG4618 Supply Config UCA0RXD 4 8
UCA0TXD 5 6 UCA0RXD P3.4 5 6 P3.5 VCC_2: F2013 Supply Config UCA0TXD 3 7

R3
JTAG1 1N4148

47k
P2.6 7 8 P2.7 P3.6 7 8 P3.7 2 6
Pos 1-2: FET Powered 14 13 D2 1
Pos 2-3: Battery Powered 12 11 G1
10 9 VCC RS232
D3
1N4148

8 7 C2
R4
2k2

6 5
LCL_PWR1 4 3 0.1uF U2
+

R5 C3
FET_PWR1 2 1 2 8
7 10uF
VCC AVCC_4618 100 10uF
11 6
11

R6
R7
+

10

470
470
10 GND Q1 C4
9 12
R8 3 5
9 12 MMBT5088

2
1
10 DVCC_4618 R9
8 13

X1
8 13 PS8802 PC_GND
2k2

PWR1
14
R10 AVCC_4618
14

LED1
LED2
2 C5 C6 C7 C8
2 10

SW1
SW2
GDO0
GDO2
RESETCC
VREG_EN
FIFO
FIFOP
P2.0
P2.1
P2.2
P2.3
INNER_GND
INNER_GND
1

7
6
5
4
1
10uF 0.1uF 10uF 0.1uF GND DVCC_4618
GND GND
3

100
99
98
97 P6.2
96 P6.1
95 P6.0
94
93
92
91
90
89
88
87
86
85
84
83
82
81
80
79
78
77
76
GND

7
6
5
4
3
15 GND
15
16
SP1

R11
R12

16
100k
100k
2AL60P1

SW1 SW2
DVCC_4618 1 75 UCA0TXD
2
2

P6.3 2 74 UCA0RXD
3 73
470
R17

VREF P6.4 P2.6

+
S1
S2

VCC C9 C10 P6.5 4 72 P2.7

1
1

5 71

R13
R14
R15
R16
SBWTDIO 1 2 FET_PWR2 P6.6 P3.0

5M1
5M1
5M1
5M1
3 4 LCL_PWR2 0.1uF 10uF P6.7 6 70 UCB0SDA 1 JP1 Buzzer
PWR2 1 5 6 7 69 2
VREF UCB0SCL Mute
2 SBWTCK 7 8 X2 8 68 UCB0CLK
9 10 GND 9 67 P3.4 GND
11 12 GND VEREF+ 10 66 P3.5 P3.5

R18
47k
13 14 VEREF- 11 65 P3.6

1 JP2
2
470 JP3 1 64
R21
P5.1 12 P3.7 SBWTDIO

R19
10
GND
GND JTAG2 2 P5.0 13 63 UTXD1
LED3 R20 0-DNP
P10.7 14 62 URXD1 C13 DVCC_4618
61
R22
C11 C12 U4 P10.6 15 GND SBWTCK
1 2 16 60

470
0.1uF

R23
2013_P1.0 S0 DVCC_4618

VCC_2013
VCC P1.0/TACLK/ACLK/A0+ 0-DNP
3 2013_P1.1 S1 17 59 LCDCAP
1uF 0.1uF P1.1/TA0/A0-/A4+
14 4 2013_P1.2 S2 18 58 P5.7 (For opt. F2013 programming)

C14
DNP
VSS P1.2/TA1/A1+/A4-
5 2013_P1.3 S3 19 57 P5.6 C15
P1.3/VREF/A1-

GND
GND 10 6 2013_P1.4 S4 20 56 P5.5
NMI/RST/SBWTDIO P1.4/SMCLK/A2+/TCK
11 7 2013_P1.5 S5 21 55 COM3 10uF
TEST/SBWTCK P1.5/TA0/A2-/SCLK/TMS

LED4
2013_P2.6 13 8 SCL H1 S6 22 54 COM2
XIN/P2.6/TA1 P1.6/TA1/A3+/SDO/SCL/TDI/TCLK
2013_P2.7 12 9 SDA 1 2 UCB0SDA S7 23 53 COM1
XOUT/P2.7 P1.7/A3-/SDI/SDA/TDO/TDI SoftBaugh SBLCDA4
3 4 UCB0SCL S8 24 52 COM0 GND
MSP430F2013PW 5 6 P3.0 GND S9 25 51 P4.2
7 8 UCB0CLK S0 P$14
1A_1B_1C_1D
S1 P$13 P$26 S21
1F_1G_1E_DP1 DOL_ERR_MINUS_MEM
S2 P$12 P$25 S20
2A_2B_2C_2D ENV_TX_RX_8BC
S3 P$11 P$24 S19
2F_2G_2E_DP2 ANT_A2_A1_A0
S4 P$10 P$23 S18
3A_3B_3C_3D BT_B1_B0_BB
P2.3 S5 P$9 P$22 S17
3F_3G_3E_COL3 AU_AR_AD_AL
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50

(Mic Supply) S6 P$8 P$21 S16

4A_4B_4C_4D PL_P0_P1_P2
S7 P$7 P$20 S15
4F_4G_4E_DP4 F1_F2_F3_F4
VCC S8 P$6 P$19 S14
5A_5B_5C_5D F5_PR_P4_P3
S10
S11
S12
S13
S14
S15
S16
S17
S18
S19
S20
S21
P7.7
P7.6
P7.5
P7.4
P7.0
P4.7
P4.6

S9 P$5 P$18 COM0

R26
470
5F_5G_5E_COL5 COM0
Breadboard Mic Input Circuitry and S10 P$4 P$17 COM1
6A_6B_6C_6D COM1
UCLK1
SOMI1
SIMO1

1st Order OA0 Active HPF S11 P$3 P$16 COM2

6F_6G_6E_DP6 COM2
UCA0CLK
UCA0SOMI
UCA0SIMO

S12 P$2 P$15 COM3

7A_7B_7C_7D COM3
18 17 18 17 18 17 S13 P$1
7F_7G_7E_DP7
16 15 16 15 16 15

C18
470n

R27
1k
14 13 14 13 14 13
1k Audio output jack
P6.0 Sallen-Key 2nd Order OA1 Active LPF P6.5
12 11 12 11 12 11 R29 (A0/OA0I0) (A5/OA2O)
150k

+
10 9 10 9 10 9 C19
1.4k 15.4k

1
22k

8 7 8 7 8 7
R28

R30 P6.7 P6.4

6 5 6 5 6 5 10uF (A7/DAC1) R24 R25 (A4/OA1I0)
4 3 4 3 4 3
TIP
RING
BAND

P6.1 MSP430FG4618/F2013 Experimenter's Board

C21
15p

M1
2
2 1 2 1 2 1 (A1/OA0O) 22nF 3.3nF
JP4 1
BB3 BB2 BB1 0 C16 C17 (Output 2
P6.2 A1
P$1
P$2
P$4

470k
R31

(A2/OA0I1) P6.3 Attn.) MSP-EXP430FG4618 PCB Ver 0-00

R32
(A3/OA1O)
GND
C20

R34
3k3
470n

GND
Document Number: VER:
10k
R33

0-00
GND GND
Date: 26-Oct-2006 Sheet: 1/1
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