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  • CPLD Questions

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    Deepak
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    This document provides the solution to determining the output 'y' of a circuit with 3 inputs A, B, and C. The expression for y is derived as A xor C, which is equal to A'C + AC', where A' means NOT(A) and AB means A AND B.

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    This document provides the solution to determining the output 'y' of a circuit with 3 inputs A, B, and C. The expression for y is derived as A xor C, which is equal to A'C + AC', where A' means NOT(A) and AB means A AND B.

    Copyright:

    Attribution Non-Commercial (BY-NC)
    Download as DOC, PDF, TXT or read online from Scribd
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    13 views1 page

    CPLD Questions

    Uploaded by

    Deepak
    This document provides the solution to determining the output 'y' of a circuit with 3 inputs A, B, and C. The expression for y is derived as A xor C, which is equal to A'C + AC', where A' means NOT(A) and AB means A AND B.

    Copyright:

    Attribution Non-Commercial (BY-NC)
    Download as DOC, PDF, TXT or read online from Scribd
    Flag for inappropriate content
    of 1

    5)What is the expression for 

    output 'y' in the following circuit?

    Ans : (In the notation I have used,A' means not(A), and AB means (A and B).
    y = ( A'B'C + AB'C' + A'BC + ABC' )
      = ( A'C (B+B') + AC' (B+B') )
      = A'C + AC'
      = A xor C.

          XOR Gate using MUX

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