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MIPS Assembly
( )
:
:
(, ),
"" (instructions) -- . [
, ( .. 32 64 bits ),
. (compiler)
].
. .
, -- "". , ..
, , , " ". ,
, "" , ' ' . ""
, " "....
"" , , "
" (PC - program counter) -- " " (program pointer),
"PC". , PC .
(array), M[ ], " " (index), i,
M[ i ]. C, pointer .
:
(HLL --High Level
Languages). hardware , " " (Machine
Language). "binary compatible" ,
. ("") , '
" " (RISC --Reduced Instruction Set Computers).
-- MIPS. RISC SPARC,
PowerPC, Alpha. x86 Pentium Intel .
(opcode --operation code), (operands)
. MIPS (registers) , ,
. CPU MIPS 32 32 bits --32 bits (word) MIPS. ,
, 64 bits. MIPS (3) , .
hardware,
Assembly MIPS:
, opcode,
, . "Assembly",
-- "Assembler". (HLL)
( C) Assembly , Compiler.
$0, $1, ..., $31 32 MIPS, $s0, $s1, ..., $t0, $t1, ...
compiler, .
, "" , () .
, PC , ( PC)
( " ") . (CTI - control transfer instruction).
, , , , (branch) (jump). "j label" ("jump" to label, "goto" label)
"label", " " . , "j label"
"label" PC.
MIPS
, , "" ,
() . , PC ,
( PC) ( " ") . (CTI control transfer instruction). , j label ("jump" to label),
label, " " . , j label label PC.
1 " ",
"" .
( ) (conditional branch),
, . beq (branch if equal):
"beq $16, $17, label" 16 17, . (equal) label,
. , ,
" " . bne (branch if not equal) , (not equal),
" ".
: load store
MIPS, RISC, --
(immediate constants).
(32 bits), (16 bits), byte (8 bits) ' CPU,
, . () hardware, ()
, .
32- ' (" ") "lw $rd, imm($rx)" (load word),
$rd (destination register), $rx (index register)
imm ' $rd. ,
(array) M[ ], M[A] A. , lw
$rd, imm($rx) (imm + $rx), M[imm + $rx], $rd.
, 32- (" ") "sw $rs, imm($rx)" (store
word), (imm + $rx), M[imm + $rx] <-- $rs. , $rs
(source register) , (source operand)
Assembly, load.
Bytes :
MIPS, , Bytes , MIPS "Byte
Addressable". , 32- (.. ) 4 " " (4 bytes). , (array) 100
"" 400 () () . ' , 4. A0
"" () , a[0], C, a[ i ]
(A0 + 4*i). (char), a[ i ] (A0 + i).
4 bytes . 4 bytes
("") 4 . MIPS (alignment restrictions)
load store : N bytes N. , N
2, ' , bytes
(least significant) bits. , N bytes,
N bytes.
MIPS:
, . , Assembly
" ", . . , Assembler.
MIPS, RISC, 32 bits. 2 6 (fields). 3
. (format) , op,
6 bits, (MS bits) . , 6 bits , , format ,
opcode , . :
R-format:
( ), op, 5 bits 32 ,
5 bits , 6 bits
op funct (function code).
I-format:
, op, 5 bits 32 , 16 bits
imm (immediate, offset, constant, address) "" .
J-format:
, op, "target" 26 bits .
MIPS, format , opcodes A-53 A-75 . format
opcode op funct 5.
, , MIPS
(CTI, control transfer instructions) -- --
" " . , (branch).
, (jump). , ,
.
MIPS, , .
( " " MIPS),
(, , ). :
# : $rs == $rt
# : $rs != $rt
slt $rd, $rs, $rt # set less than -- : $rs < $rt. , Boolean,
$rd.
slti $rd, $rs, imm # set less than immediate -- (sign-extended) imm:
$rs < imm. , Boolean, $rd.
, MIPS
:
j target
(jump) : target. J-format,
(32 bits) 4 MS bits PC, 26 bits , 2 LS bits,
jr $rs
(jump register):
rs ( , $rs , pointer ).
( ) ,
(run-time variable) (data dependent).
.
jal target
(jump and link) -- : format jump, ( ),
, , ( PC 4) 31 ($ra, $31).
. , jr $ra.
$ra ($31) -- "31" jal, hardware .
MIPS
(procedure call) jal (jump and link - ), (procedure return)
jr (jump register - ), 6.
:
,
-- , "" () ( )
. ( ), compilers
MIPS . ( (separate compilation)
). ( (instance)
). :
:
, -- ,
,
. , ( , re-entrant procedures),
. "last in first out" (LIFO),
(stack).
() MIPS 7f.ff.ff.ff (), ,
( 0). $sp .
$sp 4, ( , (interrupt))
. ( $sp 4 -- )
. load store
$sp. $sp / ,
$sp , compiler/ ( --
-- $fp).
(Global) (Local) :
"" (global) "" (local) (HLL - .. C, ). Assembler
, Assembly ( compiler). HLL,
, ( ),
, . ,
, ()
, . ,
( () !) !
, (compilers) --
. , ,
,
.
( ) ( ).
, .
, , stack-pointer,
, -- --
. (, , "", ),
( )
, .
" " (global labels) Assembler ".globl".
Assembler -- , , .
Assembler , , "" Assembly
, --
Assembly.