DESIGN AND DEVELOPMENT OF PRBS GENERATOR

SYSTEM IDENTIFICATION AND ESTIMATION MEM 1763 ASSIGNMENT 2 AHMAD MUZAFFAR BIN ABDUL KADIR KHAIRUL ANUAR BIN SIDEK THARMINDRAN A/L SUBRAMANIAM

Prepared for: ASSOCIATE PROFESSOR DR. MOHD FUAAD BIN HJ RAHMAT

Contents

    

Objective Project background, Methodology and Theory Hardware implementation Result, Analysis and Discussion Conclusion

Objectives

 To design and generate PRBS generator with maximum length sequence using Electronic Computer Aided Design Software-PROTEUS-ISIS.  To design PRBS generator using hardware (Transistortransistor logic-TTL)Peripheral Interface Controller  To analyze the characteristic of PRBS signal.

Scope of Project

 Design PRBS generator with 1023 maximum length sequence using software .  Implementing the PRBS generator using embedded Peripheral Interface Controller.

Project Background

 There are several types of PRBS schemes available such as Quadratic Residual Codes,Maximum Length Sequence and others.  This generator creates PRBS using maximum length sequence(MLS).  A 1023 length PRBS is implemented by using linear feedback shift registers

Design Methodology
Designing PRBS generator using computer algorithm. Literature review Design circuit using PROTEUS ISIS SOFTWARE.

Write programming code in C.

Simulation of hardware and software with PROTEUS-ISIS.

NO

YES

Verify?

End

1023 Length PRBS Generator

Theory

 PRBS Signals  Can take on only two possible states, i.e +x and x  State can change only at discrete intervals of time t  Sequence is periodic with period T=N t where N is an integer.  The most commonly used type-maximum length sequence (length N=2-1, where a is an integer)  Generated by an a shift register

Theory
FF1 FF2 FF3 FF4 FF5

 The first stage of the shift register is determined by feedback of the appropriate modulo two sum ( the logic function exclusive or)  The logic contents of the shift register are moved one stage to the right every t seconds by simultaneous triggering by a clock pulse.

Implementation

 The design and development of the 1024 length PRBS generator involves two phases. The generator is using Peripheral Interface Controller.  The first phase is software design whereby the PRBS generator works on the principle of 10 stage shift register with the feedback of the appropriate modulo two sum of the last stage and third stage. An appropriate algorithm is created to implement this function.

Implementation

 The second phase is the hardware design whereby the circuit is designed using PROTEUS-ISIS. The PIC used to implement this circuit is programmed by the computer programme written in C from the earlier stage.  Both stages are integrated by burning in the PIC flash microcontroller into the circuit. The circuit is validated by testing it with a scope.

Circuit Block Diagram

Components

 The circuit consists of the PIC 16F877A-Flash 16 bit MICROCHIP microcontroller. The advantage of using this device is that it has reduced instruction set computing processor.  The frequency of the PRBS can be set using software.  A attenuating circuit for varying PRBS amplitude.

Circuit

Circuit

CIRCUIT

Circuit

Circuit

Output

Software Description

 The PIC is programmed using C language. Source code is loaded into the PIC using BIZCHIP Programmer.

A slice of the C source code

                   output_low(pin_D5);//for clock signal delay_ms(delaytime/2);//delay for prbs clock bittest1=bit_test(byte1,2);//check value for bit3 bittest2=bit_test(byte2,1);//check value for bit10 if (bittest1==bittest2)// bit3 xor bit10 bit1=0; else bit1=1; bit9 = bit_test(byte1,7); //check value for first byte shift_left(&byte1,1,bit1);//shift register for 1st byte shift_left(&byte2,1,bit9);//shift register for portc=byte1; //output 1 byte at portc if (bit_test(byte2,0)) //output bit 9th at pin D0 output_high(pin_D0); else output_low(pin_D0); if (bit_test(byte2,1))//output bit 10th at pin D1 output_high(pin_D1); else output_low(pin_D1); output_high(pin_D5);//clock output delay_ms(delaytime/2);// delay for clock

A slice of the C source code

                 

if (input(PIN_D2)==0)//reduce frequency { delay_ms(100); if(input(PIN_D2)==0) { if (delaytime<1500) { delaytime=delaytime+10; } } } if (input(PIN_D3)==0)//add frequency { delay_ms(100); if(input(PIN_D3)==0) { if (delaytime>100) delaytime=delaytime-10;}}

RESULT,ANALYSIS AND DISCUSSION

 The result obtained is analysed by using a portable scope. The wave form generated from the output is the compared to the simulated result from using Microsoft Excel.

Circuit Simulation

Circuit Simulation

Output obtained from circuit

Conclusion

 The circuit designed using PIC functions as a PRBS Generator as the waveform output shows the same if simulated using PROTEUS-ISIS software.