Scribd Logo
Upload

Welcome to Scribd!

  • Multilevel Paging

    Uploaded by

    atulaya
    85 views1 page
    This document discusses multi-level page tables used in virtual memory systems. It answers two questions about calculating the number of page table levels required given the virtual address space size, page size, and page table entry size. For a 64-bit address space with 2048-byte pages and 4-byte entries, 6 levels are required. For x86-64 with 48-bit addresses, 4096-byte pages and 8-byte entries, 4 levels are required. The key steps shown are determining the number of entries that can fit in a page table and dividing the available address bits by the number needed to address an entry.

    Original Description:

    Copyright

    © Attribution Non-Commercial (BY-NC)

    Available Formats

    DOC, PDF, TXT or read online from Scribd

    Did you find this document useful?

    Is this content inappropriate?

    Report this Document
    This document discusses multi-level page tables used in virtual memory systems. It answers two questions about calculating the number of page table levels required given the virtual address space size, page size, and page table entry size. For a 64-bit address space with 2048-byte pages and 4-byte entries, 6 levels are required. For x86-64 with 48-bit addresses, 4096-byte pages and 8-byte entries, 4 levels are required. The key steps shown are determining the number of entries that can fit in a page table and dividing the available address bits by the number needed to address an entry.

    Copyright:

    Attribution Non-Commercial (BY-NC)
    Download as DOC, PDF, TXT or read online from Scribd
    Flag for inappropriate content
    85 views1 page

    Multilevel Paging

    Uploaded by

    atulaya
    This document discusses multi-level page tables used in virtual memory systems. It answers two questions about calculating the number of page table levels required given the virtual address space size, page size, and page table entry size. For a 64-bit address space with 2048-byte pages and 4-byte entries, 6 levels are required. For x86-64 with 48-bit addresses, 4096-byte pages and 8-byte entries, 4 levels are required. The key steps shown are determining the number of entries that can fit in a page table and dividing the available address bits by the number needed to address an entry.

    Copyright:

    Attribution Non-Commercial (BY-NC)
    Download as DOC, PDF, TXT or read online from Scribd
    Flag for inappropriate content
    of 1

    Multi-level page tables - hierarchical paging

    Question 1:
    A computer has a 64-bit virtual address space and 2048-byte pages. A page table entry takes 4 bytes. A multi-level page table is used because each table must be contained within a page. How many levels are required? How would I calculate this?

    Answer:
    A page table size is 2048 bytes and each entry is 4 bytes thus a table holds 2048/4=512 entries. To address 512 entries it requires log2(512)=9 bits. The total number of bits available to encode the entry for each page level is 64-log2(2048)=53 bits (the number of bits of address space minus the page offset bits). Thus the total number of levels required is 53/9=6 (rounded up).

    Question 2:
    The x86-64 default page table size is 4096 bytes, each page table must fit in a page and a page table entry is 8 bytes. Current CPUs only implement 48 bits of virtual address space. How many page table levels are required?

    Answer:
    4096/8 = 512 entries; To address 512 entries log2(512) = 9 bits. The total number of bits to encode each page level is 48 - log2(4096) = 36 bits. Thus the total number of levels required is 36/9 = 4.

    You might also like