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**SCHEME OF TEACHING AND EXAMINATION B.E. ELECTRONICS & COMMUNICATION EINGINEERING Teaching Depart Teaching hours/week
**

Theory EC Practical Duration

**SIXTH SEMESTER Examination
**

I. A Theory/ Practical Total Marks

FOR EC BRANCH Teaching Departme nt EC EC EC EC EC EC EC EC Total 24 Teaching hours/week Theory 04 04 04 04 04 04 03 03 06 Practical Duration 03 03 03 03 03 03 03 03 24 Examination I. A 25 25 25 25 25 25 25 25 200 Theory/ Practical 100 100 100 100 100 100 50 50 700 Tota l Marks 125 125 125 125 125 125 75 75 900

Subject Code

06AL - 51

Title

Management & Entrepreneurship Digital signal Processing Analog Communication Microwaves and Radar Digital Switching Systems Fundamentals of CMOS VLSI DSP Lab Analog Communication Lab + LIC Lab

Subject Code 06EC – 61

Title Digital Communication Microprocessors Analog and Mixed mode VLSI Design Antennas and Propagation

04 04 04 04 04 04 03

03 03 03 03 03 03 03

25 25 25 25 25 25 25

100 100 100 100 100 100 50

125

06EC – 62

EC EC EC EC EC EC 125 125 125 125 125 75

06EC– 52 06EC 53 06EC - 54 06EC-55 06EC – 56 06ECL – 57 06ECL - 58

06EC - 63 06EC - 64 06EC - 65

Information theory and coding 06EC – 66X Elective -(Group -A) Advanced 06ECL – 67 Communication Lab 06ECL - 68 Microprocessors Lab

EC Total 24

03 06

03 24

25 200

50 700

75 900

1

2

78 06EC755 06EC756 06EC757 06EC758 ATM Networks Image Processing Video Engineering Smart Materials and MEMS 3 4 .SEVENTH SEMESTER Electives -1(Group A) 06EC661 Programming in C ++ 06EC662 Satellite Communications 06EC663 Random Processes 06EC664 06EC665 06EC666 06EC667 Adaptive Signal Processing Low Power VLSI Design Modern Control theory Digital System Design Using VHDL Subject Code Teaching Departme nt EC EC EC EC Teaching hours/week Theory 04 04 04 04 04 04 03 Total Electives -2(Group B) 06EC751 Operating Syste m s 06EC752 Pattern Recognition 06EC753 Artificial Neural Network 06EC754 CAD For VLSI 24 03 06 Practical Duration 03 03 03 03 03 03 03 03 24 FOR EC BRANCH Examination I.74 06TC -75X 06TC – 76X 06TCL – 77 06TCL . A 25 25 25 25 25 25 25 25 200 Theory/ Practical 100 100 100 100 100 100 50 50 700 Total Marks 125 125 125 125 125 125 75 75 900 Title Computer communication Network Optical Fiber Communication Power Electronics DSP Algorithms & Architecture Elective -2 (Group B) Elective-3 (Group C) VLSI Lab Power Electronics Lab 06EC-71 06EC – 72 06EC – 73 06EC .

83X Elective -4 (Group D) 06EC – 84X Elective.5 (Group E) 06EC – 85 Project Work Seminar 06EC . A 25 25 25 25 50 50 200 Theory/ Practical 100 100 100 100 100 500 Total Marks 125 125 125 125 150 50 700 Title Wireless Communication 06EC-81 06EC – 82 Embedded System Design 06EC .Electives -3(Group C) 06EC761 Data Structures using C++ 06TC76 2 Real Time Systems 06EC763 Radio Frequency Integrated Circuits 06EC764 06EC765 06EC766 06EC767 Wavelet Transforms Modeling & Simulation of Data Networks Speech Processing H R Management EIGTH SEMESTER Subject Code Teaching Departme nt EC EC EC EC EC EC Total Electives -4(Group D) 06EC831 Distributed Syste ms 06EC832 Network Security 06EC833 Internet Engineering Electives -5(Group E) Teaching hours/week Theory 04 04 04 04 16 Practical Duration 03 03 03 03 03 24 for EC Branch Examination I.86 06 06 06EC834 06EC835 06EC836 Biomedical Signal Processing High performance computer networks Fuzzy Logic 5 6 .

Unit 3 Organising and Staffing 6 Hours Nature and purpose of organization – Principles of organization – Types of organization – Departmentation – Span of control – MBO and MBE (meaning only) Nature and importance of Staffing – Processes of Selection & Recruitment (in brief). Levels of Management. Unit 4 Directing & Controlling 7 Hours Meaning and Nature of directing – Leadership styles. Motivation. Role of entrepreneurs IA Marks Exam Hours Exam Marks : 25 : 03 : 100 7 8 . Development of Management Thought . Meaning and steps in controlling – Essentials of a sound control system – Methods of establishing control (in brief). Communication – Meaning and importance – Co-ordination. Concept of Entrepreneurship – Evolution of Entrepreneurship.an emerging Class. Scope and functional areas of management – Management as a science. Types of Entrepreneur. Unit 2 Planning 6 Hours Nature . meaning and importance and Techniques of co-ordination.early management approaches – Modern management approaches.Management & Administration – Roles of management. Theories. .art or profession. Evolution of the Concept. Part B Entrepreneurship Unit 5 Entrepreneur 6 Hours Meaning of Entrepreneur. . Development of Entrepreneurship. importance and purpose of planning process – Objectives – Types of plans (Meaning only) – decision making – Importance of planning – steps in planning & planning premises – Hierarchy of plans.06EC841 06TC7842 06EC843 Multimedia Communication Real Time Operating Systems Optical Networks 06EC844 06EC845 06EC846 GSM Adhoc Wireless Networks Optical Computing V SEMESTER MANAGEMENT & ENTREPRENEURSHIP Sub Code Hours /Week Total Hours : 06AL51 : 04 : 52 Part A Management Unit 1 7 Hours Introduction – Meaning . Functions of an Entrepreneur.. Stages in entrepreneurial process. Intrapreneur .nature and characteristics of Management.

16.15.2. Project appraisal. 22. C.8. DIC Single Window agency.the circular convolution. Principles of Management. Entrepreneurship Development – Small Business Enterprises. 12. Thompson. Hamming. Types of help. Skill Development. (Chapter 1. Entre[reneurship Development. during 5 year plans.2. Charatersitics: Need and rationale.16.6.5. 21. formulation.42. Reddy. Himalaya Pub. Project Report.17.. Unit 8 Preparation of Project 6 Hours Meaning of Project. Project Identification. P. Poornima M Charantimath.4. S Chand & Co.. Meaning and Nature of support.1. (Chapter 1. House. and chirp-z transform PART B Unit 5 6 Hours IIR filter design: Characteristics of commonly used analog filters – Butterworth and Chebysheve filters.(Chapters – 1. KSFC. DFT as a linear transformation. overlap-save and overlap-add method.4.47) 3. 20. Robert Lusier. (Chapters 1. need for efficient computation of the DFT ( FFT algorithms). 2. Financial feasibility study and Social feasibility study. FIR filter design using frequency sampling technique 9 10 . Different Policies of SSI. 20) 3. Entrepreneurship in India. Identification of Business Opportunities: Market feasibility study.46. Objective. Stephen Robbins. Network Analysis. Dynamics of Entrepreneurial Development & Management. Ancillary Industry and Tiny Industry (Definition only). Peasrson Eduncation/PHI. P. Goertzel algorithm. its relationship with other transforms. . TECKSOK. multiplication of two DFTs. Objectives. Tripathi. 18. role of SSI in Economic Development. Privatisation. Management. Errors of Project Report. 13. Project Selection.17). analog to analog frequency transformations Unit 6 6 Hours FIR filter design: Introduction to FIR filters. Effects of WTO/GATT supporting agencies of Government for SSI. design of FIR filters using Rectangular.5. S S Khanka. 14.12) 2. SIDBI. KIADB.in Economic Development. Unit 2 6 Hours Properties of DFT. Pearsion education – 2006 (2 & 4) REFERENCE BOOKS: 1. Globalization on SSI.10.4. NSIC.19. KSSIDC. additional DFT properties. Bartlet and Kaiser windows. Management Fundamentals – Concepts. Contents. Steps to staert an SSI – Government policy towards SSI.13. Tata McGraw Hill. Unit 3 8 Hours Fast-Fourier-Transform(FFT) algorithms: Direct computation of DFT. Advantages of SSI. 17th Ed. Functions. Impact of Liberalization.2. Vasant Desai.8. use of DFT in linear filtering. 11. SISI. Technical feasibility study.3.N. Applications.15.16. Government support for SSI. Scope. TEXT BOOKS: 1. Unit 7 Institutional support 6 Hours Different Schemes. Need and Significance of Report. Enterpreneurship – its Barriers Unit 6 Small Scale Industry 7 Hours Definition.9. Unit 4 6 Hours Radix-2 FFT algorithm for the computation of DFT and IDFT–decimationin-time and decimation-in-frequency algorithms. 2003 DIGITAL SIGNAL PROCESSING Sub Code Hours /Week Total Hours : 06EC-52 : : IA Marks Exam Hours Exam Marks : : : PART A Unit 1 7 Hours Discrete Fourier Transforms (DFT): Frequency domain sampling and reconstruction of discrete time signals. Guidelines by Planning Commission for Project report.

2004. Elsivier publications. wide band FM. Pearson education. . moments. Noise in SSB receivers. Nonlinear effects in FM systems Unit 7: 6 Hours Noise: Introduction. New Delhi.Implementation of discrete-time systems: Structures for IIR and FIR systems-direct form I and direct form II systems. 2. Nonlinear model of the phase – locked loop. Unit 8: 8 Hours Noise in Continuous wave modulation systems: Introduction.Unit 7 7 Hours Design of IIR filters from analog filters (Butterworth and Chebyshev) impulse invariance method. Oppenheim & Schaffer. REFERENCE BOOKS: 1. K. Generation of VSB modulated wave. properties of Hilbert transform. lattice and parallel realization. Properties of Gaussian process. Linear model of the phase – locked loop. Verification for stability and linearity during mapping Unit 8 6 Hours . Digital Signal Processing. Frequency-Domain representation. Discrete Time Signal Processing. cascade connection of two-port networks. Single side-band modulation. PHI. Time-Domain description. Phase discrimination method for generating an SSB modulated wave. Receiver model. Equivalent noise temperature. Noise equivalent bandwidth. Double side band suppressed carrier modulation (DSBSC): Time-Domain description. Noise Figure. Generation of DSBSC waves: balanced modulator. Phase-locked loop. Mitra. Mean. white noise. Comparison of amplitude modulation techniques. Noise in DSB-SC receivers. Coherent detection of DSBSC modulated waves. Unit 3: 6 Hours Single Side-Band Modulation (SSB): Quadrature carrier multiplexing. 4th Edition. ring modulator. Unit 2: 7 Hours Amplitude Modulation: Introduction. Statistical averages: Function of Random variables. envelop detector. FM. S. Digital signal processing – Principles Algorithms & Applications. Time-Domain description. FrequencyDomain description of SSB wave. 2003. Mapping of transfer functions: Approximation of derivative (backward difference and bilinear transformation) method. thermal noise. Frequency translation. shot noise. cross – correlation functions. transmission bandwidth of FM waves. Unit 6: 6 Hours Angle Modulation (FM): Demodulation of FM waves. Matched z transforms. AM radio. Tata Mc-Graw Hill. Time . 2nd Edition. 2007 --------------------------------------------------------------------ANALOG COMMUNICATION Sub Code Hours /Week Total Hour : 06EC-53 : : PART A Unit 1: 7 Hours Random process: Random variables: Several random variables. 3. switching modulator. Demodulation of SSB waves. Lee Tan: Digital signal processing. Costas loop. Pre-envelope. Frequency – Domain description. AM: Time-Domain description. TEXT BOOK: 1. Application: Radio broadcasting. Hilbert transform. Detection of AM waves: square law IA Marks Exam Hours Exam Marks : : : detector. 2007. Generation of AM wave: square law modulator. Central limit theorem. PART B Unit 5: 6 Hours Angle Modulation (FM): Basic definitions.Domain description. Correlation and Covariance function: Principles of autocorrelation function. cascade. Narrow bandwidth. FM stereo multiplexing. Unit 4: 6 Hours Vestigial Side-Band Modulation ( VSB): Frequency – Domain description. Noise in AM 11 12 . Canonical representation of band pass signals. Proakis & Monalakis. Frequency division multiplexing. narrow band FM. Phase discrimination method for generating an SSB modulated wave. Envelop detection of VSB wave plus carrier. generation of FM waves: indirect FM and direct FM.

Singh and Sapre: Communication systems: Analog and digital TMH 2nd . directional couplers. Smith chart. Coplanar strip lines.Liao / Pearson Education 2. 2. line impedance and line admittance. circulators and isolators. 2004 3. GUNN effect diodes – GaAs diode. impedance matching using single stubs. Parallèle strip lines. delay line Cancellers. Unit 6: 6 Hours Strip lines : Introduction. PART B Unit 5 4 Hours Microwave passive devices. Communication Systems. John Wiley. IMPATT diode. B. for reciprocal Networks. 3. BARITT diode. The simple form of the Radar equation. transmission lines equations and solutions. the origins of Radar Unit 8: 7 Hours MTI and Pulse Doppler Radar: Introduction to Doppler and MTI Radar. 2004 Unit 3: 7 Hours Microwave diodes. TEXT BOOKS: 1. Preemphasis and De-emphasis in FM. IA Marks Exam Hours Exam Marks : : : Unit 4: 6 Hours Microwave network theory and passive devices. Sisir K Das TMH Publication. Microwave Devices and circuits. Magic tees. Microwave coaxial connectors Unit 2: 7 Hours Microwave waveguides and components: Introduction. rectangular waveguides. pulse Doppler Radar TEXT BOOKS: 1. Ed 2007 -------------------------------------MICROWAVES AND RADAR Sub Code Hours /Week Total Hour : 06EC-54 : : PART A Unit 1: 7 Hours Microwave transmission lines: Introduction. John Wiley. 3rd Ed. S matrix representation of multi port networks. Moving target detector. Microstrip lines. circular waveguides. Symmetrical Z and Y parameters. Stern Samy and A Mahmond. REFERENCE BOOKS: 1. 2003 Avalanche transit time devices: READ diode. 3rd Edition. Radar block diagram.Lathi. Introduction to Radar systems-Merrill I Skolnik. Radar frequencies. application of Radar. Transfer electron devices: Introduction. Coaxial connectors and adapters. Modes of operation. microwave hybrid circuits. Microwave Engineering – David M Pozar. Harold P. 1996 2. 2e. RWH theory. Threshold effect. Microwave Engineering – Annapurna Das. Simon Haykins. Communication Systems. Noise in FM receivers. Phase shifters. An Introduction to Analog and Digital Communication.receivers. Attenuators. microwave cavities.P. Modern digital and analog Communication systems 3rd ed 2005 Oxford university press. digital MTI processing. TMH. Shielded strip Lines Unit 7: 8 Hours An Introduction to Radar: Basic Radar. reflection and transmission coefficients. Simon Haykins. 2001. FM threshold effect. Parametric amplifiers Other diodes: PIN diodes. Schottky barrier diodes. Pearson Edn. John Willey. Waveguide Tees. 2001 REFERENCE BOOK: 1. standing waves and SWR. Sub Code ----------------------------------DIGITAL SWITCHING SYSTEMS : 06EC-55 IA Marks : 13 14 .E.

PDH and SDH. Unit of traffic. FDM. REFERENCE BOOK: 1. Scope. Unit 7: 8 Hours FUNDAMENTALS OF CMOS VLSI Sub Code Hours /Week Total Hour : 06EC-56 : : IA Marks Exam Hours Exam Marks : : : PART A Unit 1: 4Hours Basic MOS technology: Integrated circuit’s era. Unit 2: 4 Hours Evolution of Switching Systems: Introduction. Single stage networks. Defect analysis. Lost call systems. Production of E-beam masks. Software architecture. Message switching. Syed R. Generic program upgrade. Feature interaction. Network services. Software linkages during call. Software architecture for level 2 control. Queuing systems Unit 4: 6 Hours Switching Systems: Introduction. Recovery strategy. Traffic measurement. Switching system hierarchy. Call features. 15 16 . Time switching networks. Transmission performance. Ali. Metrics. Functions of switching systems. Software maintenance. Digital Switching Systems. Growth of digital switching system central office. Electronic switching. Analysis report. Effect of firmware deployment on digital switching system. Impact of software patches on digital switching system maintainability. Connect sequence. Gradings. 2000 PART-B Unit 5: 4 Hours Time Division Switching : Introduction. Traffic and Networks. Digital switching system fundamentals. Building blocks of a digital switching system. Upgrade process success rate. Regulation. Scope. nMOS fabrication. A methodology for proper maintenance of digital switching system. Call models. Diagnostic resolution rate. Digital switching systems Digital Switching Systems: Fundamentals : Purpose of analysis. Distribution systems. Power levels. Operating systems. Mathematical model. Reported critical and major faults corrected. Program for software process improvement. Congestion. Basic software architecture. TMH Ed 2002. Basic central office linkages. Evolution of digital switching systems. Digital transmission. TDM . A strategy improving software quality. space and time switching. Software processes. System outage and its impact on digital switching system reliability. Basic call processing. 2002 2. Number of patches applied per year. Simple call through a digital system. Digital switching system software classification. Network structure. GOS of Linked systems Maintenance of Digital Switching System: Introduction. Circuit switching. Concept of generic program. Switching system maintainability metrics. J E Flood: Telecommunication and Switching. Unit 6: 6 Hours Switching System Software: Introduction. Scope. CMOS fabrication. John C Bellamy: Digital Telephony Wiley India 3rd Ed. Feature flow diagram. Software processes improvement. Stored program control switching systems. Thermal aspects of processing. Unit 8: 6 Hours A Generic Digital Switching System Model: Introduction. Standards. Database Management. Interface of a typical digital switching system central office. Defect analysis. Pearson Education. Hardware architecture. BiCMOS technology.Hours /Week Total Hour : : Exam Hours Exam Marks : : PART A Unit 1: 8 Hours Developments of telecommunications. 4 Hours Unit 3: 6 Hours Telecommunications Traffic: Introduction. Outside plant venous inside plant. Embedded patcher concept. Synchronisation. terminology. Basics of crossbar systems. Firmware-software coupling. Software architecture for level 3 control. Enhancement and depletion mode MOS transistors. Software architecture for level 1 control. Four wire circuits. Common characteristics of digital switching systems. Reliability analysis. Link Systems. Introduction to telecommunications transmission. TEXT BOOKS: 1.

H. (Text 1: Chapter 5. The delay unit.1-3. New Delhi.3rd Edition. Tutorial exercises Scaling of MOS circuits: Scaling models and factors. “Fundamentals of Semiconductor Devices”. Testability: Performance parameters. Solving a given difference equation. TEXT BOOKS: 1. Wiring capacitances.” 2nd edition. Design examples – combinational logic. Examples. Tutorial exercises. Unit 4: 4 Hours Basic circuit concepts: Sheet resistance. 10. The Differential Inverter.A Hodges. Gate logic. Tristate Inverter. Achuthan and K. New Delhi. E. (Text 1: Chapter 3. Weste and K. Limits due to current density and noise. Area capacitances. Linear convolution of two sequences using DFT and IDFT. Limits on scaling. Layout issues. Unit 2: 4Hours Circuit design processes: MOS layers. M. The Complementary CMOS Inverter – DC Characteristics. 2007. Adders. Propagation delays. Sung-Mo Kang & Yusuf Leblebici. Tata McGraw-Hill Publishing Company Limited. Memory elements. Cross correlation of given sequences and verification of its properties. “Analysis and Design of Digital Integrated Circuits”. 7. System delays. 2007. Tata McGraw-Hill Publishing Company Ltd. Static Load MOS Inverters.. 2005.” Principles of CMOS VLSI Design: A Systems Perspective. 8.10) Basic Physical Design of Simple logic gates 3Hours Unit 3 6 Hours CMOS logic structures : CMOS Complementary Logic.8) 3Hours Unit 5: 4 Hours CMOS subsystem design: Architectural issues. Pucknell & Kamran Eshraghian. registers. 9. Circular convolution of two given sequences 5. Linear convolution of two given sequences. 3rd Edition. and clock: Timing considerations. Real estate. New Delhi. I/O pads.4Hours MOS Transistor Theory: Introduction. Bi CMOS Logic. Ground rules for design. Other system considerations. Autocorrelation of a given sequence and verification of its properties. --------------------------------------------DIGITAL SIGNAL PROCESSING LABORATORY Sub Code Hours /Week Total Hour : 06ECL-57 : : IA Marks Exam Hours Exam Marks : : : A LIST OF EXPERIMENTS USING MATLAB/SCILAB/OCTAVE/WAB 1. CMOS Domino Logic Cascaded Voltage Switch Logic (CVSL). Circular convolution of two given sequences using DFT and IDFT Unit 7: 5 Hours Memory. Tata McGraw-Hill Publishing Company Limited. Pearson Education (Asia) Pvt.A Saleh.1-5. ALU subsystem. N. Eshragian. “Basic VLSI Design” PHI 3rd Edition (original Edition – 1994).G Jackson and R. Verification of Sampling theorem. Symbolic diagrams. Inverter delays. Computation of N point DFT of a given sequence and to plot magnitude and phase spectrum. Test and testability. K. 2. 2000. REFERENCE BOOKS: 1. Impulse response of a given system 3. Design rules and layout – lambda-based design and other rules. Bhat. Douglas A. Memory cell arrays. Clocking Strategies 4 Hours Unit 6: 6 Hours CMOS subsystem design processes: General considerations. Clocked circuits. Capacitance calculations. 4. Layout diagrams. Unit 8: 5 Hours 17 18 . 2. 6.. Clocked CMOS Logic. Ltd. Dynamic CMOS Logic. 2007. Process illustration. MOS Device Design Equations. Stick diagrams. D. 3. Multipliers. Pass Transistor Logic. Switch logic. Driving capacitive loads.. “CMOS Digital Integrated Circuits: Analysis and Design”. Neil H. Pseudo-nMOS Logic. 2. The Transmission Gate.

G. Computation of N. Design and test R-2R DAC using op-amp 6. Digital signal processing using MATLAB. 2. Design and implementation of IIR filter to meet given specifications. B.2002 ANALOG COMMUNICATION LAB + LIC LAB Sub Code Hours /Week Total Hour : 06ECL-58 : : IA Marks Exam Hours Exam Marks : : : 1. Impulse response of first order and second order system REFERENCE BOOKS: 1. Astable multivibrator for given frequency and duty cycle b. Frequency synthesis using PLL.. Frequency modulation using 8038/2206 12. TMH. B. Interference suppression using 400 Hz tone. Sanjeet Mitra. PWM and PPM 11. TMH. LIST OF EXPERIMENTS USING DSP PROCESSOR (Note: Experiments no: 1. Digital signal processing using MATLAB.Proakis & Ingale. Precision rectifiers – both Full Wave and Half Wave. Second order active LPF and HPF 2. 7. 3. Amplitude modulation using transistor/FET (Generation and detection) 9. 2. Digital signal processors. Read a wav file and match with their respective spectrograms 6. 8. EXPERIMENTS 1. Audio applications such as to plot time and frequency (Spectrum) display of Microphone output plus a cosine using DSP. 2000 3. 2001 2. Noise: Add noise above 3kHz and then remove. Design and implementation of FIR filter to meet given specifications. Second order active BPF and BE 3. 4. Pulse amplitude modulation and detection 10. 5. Circular convolution of two given sequences. Design and test the following circuits using IC 555 a. 12.Venkataramani and Bhaskar.MGH.Point DFT of a given sequence Realization of an FIR filter (any type) to meet given specifications . Monostable multivibrator for given pulse width W 7. J. 5. Class C Single tuned amplifier 19 20 . 3 & 7 may be performed on CCS) Linear convolution of two given sequences. Schmitt Trigger Design and test a Schmitt trigger circuit for the given values of UTP and LTP 4.The input can be a signal from function generator / speech signal .11.

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