On the Operation of CMOS Active-Cascode Gain Stage

Victor Lu, William Eisenhower, Yun Chiu

Illinois Center for
Wireless Systems
Active Cascode

Benefits:
High DC gain
High bandwidth
Low power implementation

Issues:
Pole-Zero Doublet
Settling Issues
Pole-Zero Doublet

Closely spaced pole and zero
near unity gain bandwidth of
auxiliary amplifier
Zero is from auxiliary amplifier
shorting out reducing output
resistance
Pole is from cascode output
Settling Concerns

Pole-Zero doublet can cause slow settling
Rapid settling until regular cascode gain
Slow from there until final value
Rate Depends on relative spacing of doublet
Wider the spread slower the settling
If no doublet, amplifier settles rapidly to final value
Modeling Doublet









o= AA dominate pole a= AA unity gain bandwidth
u= cascode unity gain bandwidth x= 3/ o
Canceling Doublet

It is possible to cancel doublet exactly
Requires ration of unity gain bandwidths so that the
cancel out the slow settling component
Simulation Model









Small-signal linear model including some second-order effects
Simulation Results Simulation Results

Closed loop settling behavior for auxiliary amplifier bandwidth of 10 kHz, 100 kHz, 1 MHz, 5 MHz, 9 MHz, 10.95 MHz, 20 MHz, 30 MHz
Dashed curves are for first-order model
Vo
V2
V1
X
Y
ro2 Cgs2
ro1
gm2V2
gm1V1
Co
Cgd2
Cgd1
Cm
-Aa(s)
Cgs1
|Aa(j)|

(log)
|Atot|
(log)
~Aa
Ao
At
o a 3 1 2 u
~A1
~A2
Doublet
Atot(j) = Gm,eff(j)Ztot(j)
Out
VB
In
M2
M1
Aa(s)
X
IB
Co
Y
Auxiliary Amp (AA)

(log)
|Z
tot
|
(log)
~A
a
r
o1
r
o
R
o

u
Z
tot
(j) = Z
o
(j) // (jC
o
)
-1
|Z
o
(j)|
(C
o
)
-1
A B
r
o
C
o
/x
C
o
C
o
/x C
o
A
a
r
o
A
B
2
2 2
1
2
2 2
2 2 1 1 1 1 2 2
1 1
2 1 2
1
1
1 1 1
0
o
m o
o a a
u
o o
a
m o m o m o m o
o o
u
m o
a
r
g r
r
A
k
r r
g r g r A g r g r
r r
k g r
e
e
|
e
e
(
(
(
(
(
(
(
(
(
| | | | (
| | | | (
| | | (
| | | (
| | | (
| | | ( \ .
| |
( \ . \ .
(

~
+ + + + +
= ~