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Microprocessors and Micro Controllers
Microprocessors and Micro Controllers
Overview
Basic components of digital computers Microcontrollers and Embedded Systems Applications and Common Microcontrollers The MCS-51 Family of Microcontrollers On-chip memory, registers On-chip facilities overview
Microcontrollers
Memory
CPU
ROM RAM
A single chip
Embedded Systems
actuator indicator
Microcontroller (uC)
Common Microcontrollers
Atmel ARM Intel 8-bit 8XC42 MCS48 MCS51 8xC251 16-bit MCS96 MXS296 National Semiconductor COP8 Microchip 12-bit instruction PIC 14-bit instruction PIC PIC16F84 16-bit instruction PIC NEC
Prof. Cherrice Traver
Motorola 8-bit
68HC05 68HC08 68HC11 16-bit 68HC12 68HC16 32-bit 683xx Texas Instruments TMS370 MSP430 Zilog Z8 Z86E02
Microcontroller Architectures
Memory
Address Bus CPU Data Bus
2n 0
Program + Data
Memory
Address Bus
CPU Fetch Bus Address Bus 0 Data Bus
Prof. Cherrice Traver
Program
Harvard Architecture
Data
ECE/CS-352: Embedded Microcontroller Systems
8051 CPU
Programmable I/O
Review Binary/Hexidecimal
Decimal 0 Binary 0000 Hexidecimal 0
1
2 3 4 5 6 7 8 9 10 11 12 13 14 15
0001
0010 0011 0100 0101 0110 0111 1000 1001 1010 1011 1100 1101 1110 1111
1
2 3 4 5 6 7 8 9 A B C D E F
8Eh
8E16
ECE/CS-352: Embedded Microcontroller Systems
Registers
1F
Bank 3
18 17
Bank 2
10 0F
Bank 1
08 07 06 05 04 03 02 01 00 R7 R6 R5 R4 R3 R2 R1 R0
Bank 0
20h 2Fh (16 locations X 8-bits = 128 bits) Bit addressing: mov C, 1Ah or mov C, 23h.2
2C
2B 2A 29 28 27 26 25 24 23 22 21 20 0F 07 06 05 04 03 02 01 1A 10 08 00
8051
Original 8051 uses 12 sysclk cycles per machine cycle
Data sent and received serially BAUD rate must agree between sender and receiver Transmission modes selected using SFR
Internal Timers
Original 8051 has 2 timers
16 bits TH0 : TL0 Timer 0 16 bits
TH1 : TL1
Timer 1
Timers increment on each system clock Timer registers (TH0, TL0, TH1, TL1) can be read or written to Timer overflow can cause interrupts or set SFR bits high
mov a, #2 mov b, #16 mul ab mov R0, a mov R1, b mov a, #12 mov b, #20 mul ab add a, R0 mov R0, a mov a, R1 addc a, b mov R1, a end
Interrupt Control
Program Execution
interrupt
ISR:
return
Interrupt Control
Original 8051 has five sources of interrupts Timer 1 overflow Timer 2 overflow External Interrupt 0 External Interrupt 1 Serial Port events (buffer full, buffee empty, etc) Interrupts enabled and disabled using SFR