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1-OF-8 DECODER/ Demultiplexer SN54/74LS138: Low Power Schottky
1-OF-8 DECODER/ Demultiplexer SN54/74LS138: Low Power Schottky
The LSTTL / MSI SN54 / 74LS138 is a high speed 1-of-8 Decoder / Demultiplexer. This device is ideally suited for high speed bipolar memory chip select address decoding. The multiple input enables allow parallel expansion to a 1-of-24 decoder using just three LS138 devices or to a 1-of-32 decoder using four LS138s and one inverter. The LS138 is fabricated with the Schottky barrier diode process for high speed and is completely compatible with all Motorola TTL families.
SN54/74LS138
Demultiplexing Capability Multiple Input Enable for Easy Expansion Typical Power Dissipation of 32 mW Active Low Mutually Exclusive Outputs Input Clamp Diodes Limit High Speed Termination Effects CONNECTION DIAGRAM DIP (TOP VIEW)
VCC 16 O0 15 O1 14 O2 13 O3 12 O4 11 O5 10 O6 9
NOTE: The Flatpak version has the same pinouts (Connection Diagram) as the Dual In-Line Package. 16 1
16 1
1 A0
2 A1
3 A2
4 E1
5 E2
6 E3
7 O7
8 GND LOADING (Note a) HIGH LOW 0.25 U.L. 0.25 U.L. 0.25 U.L. 5 (2.5) U.L.
16 1
PIN NAMES A0 A2 E1, E2 E3 O0 O7 Address Inputs Enable (Active LOW) Inputs Enable (Active HIGH) Input Active LOW Outputs (Note b)
ORDERING INFORMATION
SN54LSXXXJ SN74LSXXXN SN74LSXXXD Ceramic Plastic SOIC
NOTES: a) 1 TTL Unit Load (U.L.) = 40 A HIGH/1.6 mA LOW. b) The Output LOW drive factor is 2.5 U.L. for Military (54) and 5 U.L. for Commercial (74) Temperature Ranges.
LOGIC DIAGRAM
A2
3 2
A1
1
A0
4
E1 E2 E3
5 6
LOGIC SYMBOL
VCC = PIN 16 GND = PIN 8 = PIN NUMBERS 1 2 3 456 12 3 A0 A1 A2 E
O0 O1 O2 O3 O4 O5 O6 O7
O7
O6
O5
O4
O3
O2
O1
O0
SN54/74LS138
FUNCTIONAL DESCRIPTION The LS138 is a high speed 1-of-8 Decoder/Demultiplexer fabricated with the low power Schottky barrier diode process. The decoder accepts three binary weighted inputs (A0, A1, A2) and when enabled provides eight mutually exclusive active LOW Outputs (O0 O7). The LS138 features three Enable inputs, two active LOW (E1, E2) and one active HIGH (E3). All outputs will be HIGH unless E1 and E2 are LOW and E3 is HIGH. This multiple enable function allows easy parallel expansion of the device to a 1-of-32 (5 lines to 32 lines) decoder with just four LS138s and one inverter. (See Figure a.) The LS138 can be used as an 8-output demultiplexer by using one of the active LOW Enable inputs as the data input and the other Enable inputs as strobes. The Enable inputs which are not used must be permanently tied to their appropriate active HIGH or active LOW state.
TRUTH TABLE
INPUTS E1 H X X L L L L L L L L E2 X H X L L L L L L L L E3 X X L H H H H H H H H A0 X X X L H L H L H L H A1 X X X L L H H L L H H A2 X X X L L L L H H H H O0 H H H L H H H H H H H O1 H H H H L H H H H H H O2 H H H H H L H H H H H OUTPUTS O3 H H H H H H L H H H H O4 H H H H H H H L H H H O5 H H H H H H H H L H H O6 H H H H H H H H H L H O7 H H H H H H H H H H L
O0
O31
Figure a
SN54/74LS138
GUARANTEED OPERATING RANGES
Symbol VCC TA IOH IOL Supply Voltage Operating Ambient Temperature Range Output Current High Output Current Low Parameter 54 74 54 74 54, 74 54 74 Min 4.5 4.75 55 0 Typ 5.0 5.0 25 25 Max 5.5 5.25 125 70 0.4 4.0 8.0 Unit V C mA mA
VCC = MAX, VIN = 2.7 V VCC = MAX, VIN = 7.0 V VCC = MAX, VIN = 0.4 V VCC = MAX VCC = MAX
Note 1: Not more than one output should be shorted at a time, nor for more than 1 second.
VCC = 5.0 V 50 CL = 15 pF
AC WAVEFORMS
VIN 1.3 V tPHL VOUT 1.3 V 1.3 V tPLH 1.3 V VOUT VIN 1.3 V tPHL 1.3 V tPLH 1.3 V 1.3 V
Figure 1
Figure 2