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Fifth SemesterB.Tech. Engineering f)egree RegularlPart Time

(2007Admn.) Examination,f)ec. 2009 PT 2K6l2K6EC 504: COMPUTBR ORGANIZATION ANI) ARCHITECTURE

Time: 3 Hours Instruction : Answer all questions. 1. a) What are condition code flags 'l Explain the use of them. b) Give the comparisonbetweenmemory mappedI/O and I/O mappedIlO. c) Distinguish betweenmicroprogrammed control and hardwiredcontrol. d) Give andexplain the sequence operations fetching a word from memory. of for e) Explain with figure readand write operations a static memory cell. in D What is RAID ? Explain. g) Explain Flynn's classification parallelprocessors. of h) Explain the featuresof RISC processor. (8x5= Max. Marks:

2. a) With block diagram,explainthe two waysin which byte addresses assigned are acrosswords. b) Illustratewith an examplethe algorithm for non restoringdivision. OR a) What is an addressing mode ? Explain different types of addressing modes. b) Explain Booth's algorithm.Multiply two numbers- 13 (multiplicand)and 11 (multiplier) using Booth's multiplicationmethod.

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3 . a) Draw and explain the multiple bus organization.Explain its advantages.

with next addressfield. b) Explain microinstructionsequencing OR for a) Show the control sequences execution of Add (R3), Rl and explain. b) Explain the microprogrammedcontrol of instruction execution in a nucroprocessor. 4. a) With block diagram,explain how read and write operationtakesplace in lKxlmemorychip. OR
a) With block diagram how the perforrnanceof memory can be improved in

is b) Explain how a virtual address mappedto physical address using page table. 8

interleaved organizationof multiple memory modules. b ) What is the needof cachereplacementalgorithms ? Explain LRU replacement aigorithm. from severalI/O devicescan be communicated 5. a) Explain how intemrpt request to processor through a single INTR line. explain the sequence eventsfor input b ) Consideringthe timing diagruuns, of transfer and output transfer on a synchronousbus. OR a) Why bus arbitration is required ? Explain with block diagrambus arbitration processusing daisy chain arrangement. b ) Describethe processof DMA. When it is speciallyuseful ?

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