CSSE3010 – Embedded Systems Design & Interfacing

Practical 4 – SPI / Radio control

Objectives
   To learn the fundamentals of the SPI bus, including data transmission and the conceptual understanding of a multiple slave configuration. Become familiar with the basic operation of the nRF24l01+ radio package including configuring the radio’s registers for TX/RX transmission. To understand the complications that may arise when setting up and communicating on an RF network.

The main objective of this practical is to introduce or strengthen your knowledge in one of the most widely used communication protocols; the SPI bus. Although a summary of the bus is presented here, it is recommended that before starting on this practical that you do some extra background reading on the topics covered here (see references for some good resources). Throughout this practical you will setup SPI communication with the radio and configure the radio, creating a RF communication link between multiple microcontrollers.

Introduction
The Serial Peripheral Interface (SPI) [1] is a high speed bus that connects a master to one or more slave devices such as the nRF24l01+ [2]. The bus operates using a 4 wire interface which includes:  SPI Clock (SCLK, SCK, CLK) – this line is used for the clock signal sent by the master to synchronise the data sent between the master and the slave. The speed of data transactions depend on the speed of the clock signal. Master Out Slave In (MOSI, SIMO) - this carries data from the master to the slave. Master In Slave Out (MISO, SOMI) – this carries data from the slave to the master. Slave Select (SS, CSN) – As previously mentioned, the bus can support multiple slave devices, each sharing the above three connections. Furthermore, each slave can be selected by holding the SS at active low. Only one slave can be selected at a time.

  

Notice that the bus is bidirectional such that the master can send data whilst the slave can simultaneously send data back to the master, perhaps sending data from a previous request or simply status information. The master controls the communication, such that the slave cannot initiate data communication, and for this reason some devices make use of an external interrupt

Practical 4 – SPI and the nRF24l01+ radio

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EN_RXADDR.1 of the datasheet [3]. CPHA=0: Data is captured on the clocks rising edge and propagated on a falling edge. resulting in quicker transfers and more CPU time for other tasks (this will become more important when using an operating system. CPHA=0: Data is captured on the clocks falling edge and propagated on a rising edge CPOL=1. it should be noted many other word sizes are common. however. The phase and polarity of data signals must be configured to match the slave device. In order to send / receive data or issue commands to the device from the SPI port we first ensure the CSN pin is high. resulting in the below 4 configurations: CPOL=0. CPOL=0. The words are shifted out via the MOSI/MISO lines ticking the clock 8 times to complete a data transfer. the radio transmission itself is limited to 2Mbps). such as FreeRTOS). This handles SPI transactions using operations not under the control of the central processor. This register map can be found in section 9. It is recommended you familiarise yourself with these few registers. The nRF24l01+ uses mode 0 (CPOL=0.CSSE3010 – Embedded Systems Design & Interfacing mechanism. The code provided in ‘rf.c’ shows how the SPI is configured for the nrf24l01+. with the slave and master holding a single word. CPOL=1. The SPI bus is similar to a circular ring shift register as depicted below. CPHA=1: Data is captured on the clocks rising edge and propagated on a falling edge. We then bring the CSN pin low to alert the nRF24l01+ that an SPI transaction is going Practical 4 – SPI and the nRF24l01+ radio Page 2 . especially CONFIG. The nRF24l01+ has a set of registers defining the firmware interface. CPHA=1: Data is captured on the clocks falling edge and propagated on a rising edge. CPHA=0) and supports up to 8Mbps transfer rate (note this is the transfer rate on the SPI bus. RF_SETUP. The AT91SAM7 has an SPI controller handled by the Peripheral DMA Controller (PDC). Transmissions often occur in 8-bit words. STATUS. RF_CH. This is configured using two options CPOL (clock polarity) and CPHA (clock phase).

There are three interrupts that can be generated by the nRF24l01+. When writing to the device. followed by dummy bytes (corresponding to the payload width configured). hold the CE pin high again to continue listening. Do note that if you decide to configure the nRF24l01+ at 2Mbps. As well as this the device has two packet queues for RX and TX. The SPI bus and nRF24l01+ are covered broadly here. Each queue can hold up to three packets and are read on a First in First Out (FIFO) basis. firstly the command byte is sent followed by the data.CSSE3010 – Embedded Systems Design & Interfacing to take place. Each of these pipes can have their own address as defined by RX_ADDR_PX registers. TX_DS is triggered when a packet has been successfully transmitted. Refer to page 20 of the datasheet to see a state diagram of radio modes and recommended operating mode paths. There are only a limited number of channels available to use and therefore many radios may be on the same channel. executing the W_TX_PAYLOAD command followed by the data you wish to send. There are many inherit issues of having a class full of nRF24l01+’s. On a radio level this is done via the RX_ADDR / TX_ADDR and a packet checksum. After successfully receiving the data. limiting the possible channels further. TX_DS and MAX_RT. the CE pin must be brought low and the R_RX_PAYLOAD operation can be executed. such as a packet being received. Similarly for transmission. we must send the register we would like to read. for the purposes of this prac we will re-implement it for completeness. These can be detected on the devices IRQ pin. When selecting a channel please limit yourself to the lower 50 channels to be compliant with the Australian radio frequency regulations [4]. The MAX_RT is set when the maximum number of retries for sending a packet has exceeded the preconfigured amount. We will also make use of a 16 bit checksum on each transmitted packet. or by reading the STATUS register. rather than 1MHz. and then in order for the device to send its response we must send another (arbitrary) byte to receive the response. RX_DR. So there must be a way to differentiate between packets that you and others send as well as handling packet collisions and noise. followed by bringing the CE pin high again. the channel spacing is 2MHz. It is highly recommended to read more information from sources found at the end of the document [5]. Note that the TX FIFO must be cleared in this case in order to continue receiving packets. Practical 4 – SPI and the nRF24l01+ radio Page 3 . When a packet is successfully received (with CE held high). When reading. The nRF24l01+ has 6 pipes which can be configured to receive data. the CE pin is brought low. RX_DR is triggered when the radio has received a packet. on which the radio can receive data. The STATUS register can be read to check whether something important has happened. Although the radio already performs its own checksum. In this prac we will define source and destination address in our protocol.

if prompted. Note that additional files have been included which contain methods for some of the low level radio calls you will be using. The payload must be filled via Putty by typing characters and submitting the packet by pressing the return key (or exceeding the maximum payload length). Open a terminal window and navigate to “/home/user/svn” Type “svn update” If prompted for a password: “csse3010” DO NOT store the password in the gnome keyring. Practical 4 – SPI and the nRF24l01+ radio Page 4 . 3. The packet type field for this practical is ‘0x20’. This packet will contain a capitalised form of your initial payload which you must print back to the terminal over the USB interface. You are required to send a packet of the format above to the base station. it will consist of your student number formatted in hex. s41234123 will have address 0x41234123). This base station has address 0x12345678. Be sure to filter any incoming packets for your student ID address. The pin layout we will be using is shown in the figure below. The base station will receive your request and send back a packet. otherwise you will display other peoples packets. Before we begin sending packets we first define our communications protocol. Be sure to set this field as well as the destination field correctly. For the purpose of this practical. (i.CSSE3010 – Embedded Systems Design & Interfacing We will connect the radio to the AT91’s SPI channel 0. The Design Task For this prac we will configure the radios to channel 40. Make sure you have checked out the source files accompanying this practical. Packet Type 1 Byte Destination Address 4 Bytes Source Address 4 Bytes Payload 21 Bytes Checksum byte 2 Byte The destination and source addresses with a width of 4 will define to whom you are sending your packet to. FIRST: update your source files using subversion: 1. 2.e. otherwise the base station will not respond to your request. 4. One of the tutors will be running a base station to which you will be communicating with.

CSSE3010 – Embedded Systems Design & Interfacing Response from Base Station In ‘main. Leave the checksum till last. charsrc[4]. When finished. chardest[4]. tx_buf. The base station will send a request back fairly quickly. Write your code such that if a response is not received within 500milliseconds to resend the request. 30). A checksum can be performed on the packet before it is sent by using the following function. Remember.c’ a data structure has been included to help you structure your packets according to the protocol defined above.c’. Practical 4 – SPI and the nRF24l01+ radio Page 5 . The packed attribute is a hint to the compiler that we do not want padding within the data structure. And demonstrate a functioning program to receive marks for this practical. The base station will still send a (different) packet if you can’t get the checksum working. Challenge: Your packet may not get through the first time if the base station is processing another request. Some helpful comments in the main function should help you to get started. you can use the USB interface as a feedback mechanism for debugging. The radio driver will send and receive packets through tx_buf and rf_buf. Make sure you examine the radio functions defined in ‘nrf24l01plus. Data structure for packets. meaning we can operate on the data pointed to by the Packet structure as if it is 32 consecutive bytes. you should be able to explain your code to the tutor. char payload[PAYLOAD_WIDTH]. Make sure to keep any new input from the terminal in the buffer for the next request. shortcrc. therefore make sure you switch your radio back to receive mode straight after transmission. User input typedefstruct { char type. // 32 bytes long. }__attribute__((packed)) Packet. crc16(0.

Each practical has a set of specific questions you need to be able to answer to pass. The questions can vary from very detailed to more theoretical. 3. 4. 2. http://en.com/products/691 http://www.gov. tutors will be more thorough in checking your understanding.acma.c file): 0.Read the NRF24l01+ datasheet and the nrf24l01plus.CSSE3010 – Embedded Systems Design & Interfacing Marking criteria The practicals in this course are marked on a pass / fail basis.diyembedded. You will be asked just one question (or two at most) and if your answer is not satisfactory you fail. 3. This means you must demonstrate to your tutor sufficient understanding and functionality before progressing.com/tutorials/nrf24l01_0/nrf24l01_tutorial_0. 5.au http://www.org/wiki/Serial_Peripheral_Interface_Bus http://www. 2. 4. Do note that if you did not pass the requirements the first time. If you fail to demonstrate sufficient understanding through completing the design task you will be required to show a tutor you are competent at another time to pass this practical. WORKBOOK What SPI mode (master or slave) must the ARM processor be in? What does the CSN pin do? What radio frequency does the NRF24l01+ transmit/receive on? How do you change the radio channel that he NRF24l01+ uses? What does the CE pin do? References / Further Readings 1. 1.sparkfun.com/eng/nordic/download_resource/8041/1/77976879 http://www. BE PREPARED.pdf Practical 4 – SPI and the nRF24l01+ radio Page 6 .nordicsemi. 5. Sample questions for this practical (Hint .wikipedia.

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