MP Manual

SRINIVASAN ENGINEERING COLLEGE
ECE DEPARTMENT
SRINIVASAN COLLEGE OF ENGINEERING

PERAMBALUR
CS 2259: MICROPROCESSORS LABORATORY

IV SEM CSE
ECE DEPARTMENT
MICROPROCESSOR LAB MANUAL

FOR
2ND YEAR CSE
SUBJECT CODE: CS2259
PREPARED BY
M.SINDHU
AP/ECE
ECE DEPARTMENT
2012-2013
CS2259
MICROPROCESSORS LABORATORY
(Common to CSE & IT)
ECE DEPARTMENT
0032
AIM:
To learn the assembly language programming of 8085,8086 and 8051 and alsoto
give a practical training of interfacing the peripheral devices with theprocessor.
OBJECTIVES:
To implement the assembly language programming of 8085,8086 and 8051.
To study the system function calls like BIOS/DOS.
To experiment the interface concepts of various peripheral device with theprocessor.
Experiments in the following:
1. Programming with 8085
2. Programming with 8086-experiments including BIOS/DOS calls:
Keyboard control, Display, File Manipulation.
3. Interfacing with 8085/8086-8255,8253
4. Interfacing with 8085/8086-8279,8251
5. 8051 Microcontroller based experiments for Control Applications
6. Mini- Project
TOTAL: 45 PERIODS
ECE DEPARTMENT
LIST OF EXPERIMENTS
S.No
Name of the Experiment
Page No
8085 Programming
(A)8 BIT DATA ADDITION
(B)8 BIT DATA SUBTRACTION
12
(C)8 BIT DATA MULTIPLICATION
15
(D)8 BIT DATA DIVISION
19
(E)16 BIT DATA ADDITION
22
(F)16 BIT DATA SUBTRACTION
25
(A)LARGEST ELEMENT IN AN ARRAY
28
(B)SMALLEST ELEMENT IN AN ARRAY
31
(C)ASCENDING ORDER
34
(D)DESCENDING ORDER
38
8086 Programming
16 BIT DATA ADDITION
42
16 BIT DATA SUBTRACTION
45
16 BIT DATA MULTIPLICATION
48
16 BIT DATA DIVISION
50
(A)BIOS/DOS CALLS-DISPLAY
52
(B)BIOS/DOS CALLS-FILE MANIPULATION
53
Interfacing
5
INTERFACING 8255 WITH 8085
54
INTERFACING 8253 TIMER WITH 8085
58
62
ECE DEPARTMENT
64
STEPPER MOTOR CONTROL
67
10
STEPPER MOTOR INTERFACING WITH 8051
73
11
MINI PROJECT-MODEL
76
ECE DEPARTMENT
1. INTRODUCTION TO 8085
INTEL 8085 is one of the most popular 8-bit microprocessor capable of
addressing 64 KB of memory and its architecture is simple. The device has 40 pins,
requires +5 V power supply and can operate with 3MHz single phase clock.
ALU (Arithmetic Logic Unit):

The 8085A has a simple 8-bit ALU and it works in coordination with the
accumulator, temporary registers, 5 flags and arithmetic and logic circuits. ALU has
the capability of performing several mathematical and logical operations. The
temporary registers are used to hold the data during an arithmetic and logic operation.
The result is stored in the accumulator and the flags are set or reset according to the
result of the operation. The flags are affected by the arithmetic and logic operation.
They are as follows:
Sign flag
After the execution of the arithmetic - logic operation if the bit D7
of the result is 1, the sign flag is set. This flag is used with signed
numbers. If it is 1, it is a negative number and if it is 0, it is a positive
number.
Zero flag
The zero flag is set if the ALU operation results in zero. This flag
is modified by the result in the accumulator as well as in other registers.
Auxillary carry flag

In an arithmetic operation when a carry is generated by digit D3
and passed on to D4, the auxillary flag is set.
Parity flag
After arithmetic logic operation, if the result has an even number
of 1s the flag is set. If it has odd number of 1s it is reset.
Carry flag
If an arithmetic operation results in a carry, the carry flag is set.
The carry flag also serves as a borrow flag for subtraction.
ECE DEPARTMENT
Timing and control unit

This unit synchronizes all the microprocessor operation with a clock and
generates
the
control
signals
necessary for
communication
between
the
microprocessor and peripherals. The control signals RD (read) and WR (write)

indicate the availability of data on the data bus.
Instruction register and decoder

The instruction register and decoder are part of the ALU. When an instruction is
fetched from memory it is loaded in the instruction register. The decoder decodes the
instruction and establishes the sequence of events to follow.
Register array
The 8085 has six general purpose registers to store 8-bit data during program
execution. These registers are identified as B, C, D, E, H and L. they can be combined
as BC, DE and HL to perform 16-bit operation.
Accumulator
Accumulator is an 8-bit register that is part of the ALU. This register is used to
store 8-bit data and to perform arithmetic and logic operation. The result of an
operation is stored in the accumulator.
Program counter
The program counter is a 16-bit register used to point to the memory address of
the next instruction to be executed.
Stack pointer
It is a 16-bit register which points to the memory location in R/W memory, called
the Stack.
ECE DEPARTMENT
Communication lines
8085 microprocessor performs data transfer operations using three communication
lines called buses. They are address bus, data bus and control bus.
Address bus it is a group of 16-bit lines generally identified as A0 A15.

The address bus is unidirectional i.e., the bits flow in one direction from
microprocessor to the peripheral devices. It is capable of addressing 216
memory locations.
Data bus it is a group of 8 lines used for data flow and it is bidirectional.
The data ranges from 00 FF.
Control bus it consist of various single lines that carry synchronizing

signals. The microprocessor uses such signals for timing purpose.
ECE DEPARTMENT
1(A). 8 BIT DATA ADDITION

AIM:
To add two 8 bit numbers stored at consecutive memory locations.
ALGORITHM:
1.
2.
3.
4.
Initialize memory pointer to data location.

Get the first number from memory in accumulator.
Get the second number and add it to the accumulator.
Store the answer at another memory location.
RESULT:
Thus the 8 bit numbers stored at 4500 &4501 are added and the result stored at 4502 &
4503.
ECE DEPARTMENT
FLOW CHART:
START
[C]
00H
[HL]
4500H
[A]
[M]
[HL]
[HL]+1
[A]
[A]+[M]
NO
Is there a
Carry ? YES
[C]
[C]+1
[HL]
[HL]+1
[M]
[A]
[HL]
[HL]+1
[M]
[C]
STOP
10
ECE DEPARTMENT
PROGRAM:
ADDRESS OPCODE LABEL
4100
START
4101
4102
4103
4104
4105
MNEMONICS OPERAND
MVI
C, 00
COMMENT
Clear C reg.
LXI
H, 4500
Initialize HL reg. to
4500
MOV
A, M
4106
INX
4107
ADD
4108
4109
410A
JNC
L1
Transfer first data to

accumulator
Increment HL reg. to
point next memory
Location.
Add first number to
acc. Content.
Jump to location if
result does not yield
carry.
INR
INX
C
H
410D
MOV
M, A
410E
INX
410F
4110
MOV
HLT
M, C
410B
410C
L1
Increment C reg.
point next memory
Location.
Transfer the result from
acc. to memory.
point next memory
Location.
Move carry to memory
Stop the program
OBSERVATION:
INPUT
4500
4501
OUTPUT
4502
4503
11
ECE DEPARTMENT
1(B). 8 BIT DATA SUBTRACTION

AIM:
To Subtract two 8 bit numbers stored at consecutive memory locations.
ALGORITHM:
1.
2.
3.
4.

Get the first number from memory in accumulator.
Get the second number and subtract from the accumulator.
If the result yields a borrow, the content of the acc. is complemented and 01H is
added to it (2s complement). A register is cleared and the content of that reg. is
incremented in case there is a borrow. If there is no borrow the content of the acc.
is directly taken as the result.
5. Store the answer at next memory location.
RESULT:
Thus the 8 bit numbers stored at 4500 &4501 are subtracted and the result stored at 4502
& 4503.
12
ECE DEPARTMENT
FLOW CHART:
START
[C]
[HL]
00H
4500H
[A]
[M]
[HL]
[HL]+1
[A]
[A]-[M]
Is there a
Borrow ?
NO
YES
Complement [A]
Add 01H to [A]
[C]
[C]+1
[HL]
[HL]+1
[M]
[A]
[HL]
[HL]+1
[M]
[C]
STOP
13
ECE DEPARTMENT
PROGRAM:
4100
START
4102
4102
4103
4104
4105
MNEMONICS OPERAND
MVI
C, 00
COMMENT
Clear C reg.
LXI
H, 4500
4500
MOV
A, M
4106
INX
4107
SUB
4108
4109
410A
JNC
L1

accumulator
point next mem.
Location.
Subtract first number
from acc. Content.
Jump to location if
result does not yield
borrow.
410B
410C
INR
CMA
410D
410E
410F
ADI
01H
INX
4110
MOV
M, A
4111
INX
4112
4113
MOV
HLT
M, C
L1
Increment C reg.
Complement the Acc.
content
Add 01H to content of
acc.
point next mem.
Location.
acc. to memory.
point next mem.
Location.
Move carry to mem.
Stop the program
OBSERVATION:
INPUT
4500
4501
OUTPUT
4502
4503
14
ECE DEPARTMENT
1(C). 8 BIT DATA MULTIPLICATION

AIM:
To multiply two 8 bit numbers stored at consecutive memory locations and store
the result in memory.
ALGORITHM:
LOGIC: Multiplication can be done by repeated addition.
1.
2.
3.
4.
5.
6.
7.
8.

Move multiplicand to a register.
Move the multiplier to another register.
Clear the accumulator.
Add multiplicand to accumulator
Decrement multiplier
Repeat step 5 till multiplier comes to zero.
The result, which is in the accumulator, is stored in a memory location.
RESULT:
Thus the 8-bit multiplication was done in 8085p using repeated addition method.
15
ECE DEPARTMENT
FLOW CHART:
START
[HL] 4500
B M
[HL] [HL]+1
A 00
C 00
[A] [A] +[M]
Is there
any carry
NO
YES
C C+1
B B-1
NO
IS B=0
YES
A
16
ECE DEPARTMENT
[HL]
[HL]+1
[M]
[A]
[HL]
[HL]+1
[M]
[C]
STOP
17
ECE DEPARTMENT
PROGRAM:
4100
START
4101
4102
4103
MNEMONICS
LXI
OPERAND
H, 4500
COMMENT
4500
MOV
B, M
4104
INX
4105
4106
4107
4108
MVI
A, 00H

reg. B
point next mem.
Location.
Clear the acc.
MVI
C, 00H
Clear C reg for carry
ADD
410A
JNC
NEXT
410B
410C
410D
410E
410F
4110
4111
4112
Add multiplicand
multiplier times.
Jump to NEXT if there
is no carry
INR
DCR
JNZ
C
B
L1
Increment C reg
Decrement B reg
Jump to L1 if B is not
zero.
INX
4113
MOV
M, A
4114
INX
4115
MOV
M, C
4116
HLT
point next mem.
Location.
acc. to memory.
point next mem.
Location.
C reg. to memory.
Stop the program
4109
L1
NEXT
OBSERVATION:
INPUT
4500
4501
OUTPUT
4502
4503
18
ECE DEPARTMENT
1(D). 8 BIT DIVISION

AIM:
To divide two 8-bit numbers and store the result in memory.
ALGORITHM:
LOGIC: Division is done using the method Repeated subtraction.
1. Load Divisor and Dividend
2. Subtract divisor from dividend
3. Count the number of times of subtraction which equals the quotient
4. Stop subtraction when the dividend is less than the divisor .The dividend now
becomes the remainder. Otherwise go to step 2.
5. stop the program execution.
RESULT:
Thus an ALP was written for 8-bit division using repeated subtraction method and
executed using 8085 p kits
19
ECE DEPARTMENT
FLOWCHART:
START
B 00
[HL] 4500
A M
[HL] [HL]+1
M A-M
[B] [B] +1
NO
IS A<0
YES
A A+ M
B B-1
[HL]
[HL]+1
[M]
[A]
[HL]
[HL]+1
[M]
[B]
STOP
20
ECE DEPARTMENT
PROGRAM:
ADDRESS
OPCODE LABEL
MNEMO
NICS
MVI
OPERA
ND
B,00
LXI
H,4500
MOV
INX
A,M
H
SUB
INR
JNC
M
B
LOOP
ADD
DCR
INX
M
B
H
410F
MOV
M,A
4110
INX
4111
MOV
M,B
4112
HLT
4100
4101
4102
4103
4104
4105
4106
4107
4108
4109
410A
410B
410C
410D
410E
LOOP
COMMENTS
Clear B reg for quotient
4500H
Transfer dividend to acc.
Increment HL reg. to point
next mem. Location.
Subtract divisor from dividend
Increment B reg
Jump to LOOP if result does
not yield borrow
Add divisor to acc.
Decrement B reg
next mem. Location.
Transfer the remainder from
acc. to memory.
next mem. Location.
Transfer the quotient from B
reg. to memory.
Stop the program
OBSERVATION:
S.NO
1
2
ADDRESS
4500
4501
4500
4501
INPUT
DATA
ADDRESS
4502
4503
4502
4503
OUTPUT
DATA
21
ECE DEPARTMENT
1(E). 16 BIT DATA ADDITION

AIM:
To add two 16-bit numbers stored at consecutive memory locations.
ALGORITHM:
1.
2.
3.
4.

Get the first number from memory and store in Register pair.
Get the second number in memory and add it to the Register pair.
Store the sum & carry in separate memory locations.
RESULT:
Thus an ALP program for 16-bit addition was written and executed in 8085p
using special instructions.
22
ECE DEPARTMENT
FLOW CHART:
START
[L]
[H]
[8050 H]
[8051 H]
[DE]
[HL]
[L]
[H]
[8052H]
[8053H]
[A]
[HL]
00H
[HL]+[DE]
NO
Is there a
Carry?
YES
[A]
[A]+1
[8054]
[ L]
[8055]
[8056]
[H]
[A]
STOP
23
ECE DEPARTMENT
PROGRAM:
8000
START
8001
8002
8003
8004
8005
8006
8007
8008
8009
MNEMONICS OPERAND
LHLD
8050H
800A
800B
800C
800D
800E
800F
8010
8011
8012
8013
8014
LOOP
COMMENT
Load the augend in DE
pair through HL pair.
XCHG
LHLD
8052H
Load the addend in HL

pair.
MVI
A, 00H
DAD
JNC
LOOP
INR
SHLD
8054H
STA
8056H
Initialize reg. A for

carry
Add the contents of HL
Pair with that of DE
pair.
If there is no carry, go
to the instruction
labeled LOOP.
Otherwise increment
reg. A
Store the content of HL
Pair in 8054H(LSB of
sum)
Store the carry in
8056H through Acc.
(MSB of sum).
Stop the program.
HLT
OBSERVATION:
ADDRESS
8050H
8051H
8052H
8053H
INPUT
DATA
ADDRESS
8054H
8055H
8056H
OUTPUT
DATA
24
ECE DEPARTMENT
1(F). 16 BIT DATA SUBTRACTION

AIM:
To subtract two 16-bit numbers stored at consecutive memory locations.
ALGORITHM:
1.
2.
3.
4.
5.

Get the subtrahend from memory and transfer it to register pair.
Get the minuend from memory and store it in another register pair.
Subtract subtrahend from minuend.
Store the difference and borrow in different memory locations.
RESULT:
Thus an ALP program for subtracting two 16-bit numbers was written and
executed.
25
ECE DEPARTMENT
FLOW CHART:
START
[L]
[H]
[8050 H]
[8051 H]
[DE]
[HL]
[L]
[H]
[8052H]
[8053H]
[HL]
[HL]-[DE]
Is there a
borrow?
NO
YES
[C]
[C]+1
[8054]
[ L]
[8055]
[8056]
[H]
[C]
STOP
26

PROGRAM:
ECE DEPARTMENT
MNEMO
NICS
MVI
OPER COMMENTS
AND
C, 00
Initialize C reg.
LHLD
8050H
Load the subtrahend in DE

reg. Pair through HL reg.
pair.
XCHG
LHLD
8052H
Load the minuend in HL reg.

Pair.
MOV
A, L
800A
SUB
800B
MOV
L, A
800C
MOV
A, H
800D
SBB
800E
MOV
H, A
800F
8010
8011
8012
8013
8014
8015
8016
SHLD
8054H
Move the content of reg. L to

Acc.
Subtract the content of reg.
E from that of acc.
Move the content of Acc. to
reg. L
Move the content of reg. H
to Acc.
Subtract content of reg. D
with that of Acc.
Transfer content of acc. to
reg. H
Store the content of HL pair
in memory location 8504H.
JNC
NEXT
If there is borrow, go to the

instruction labeled NEXT.
INR
MOV
C
A, C
STA
8056H
Increment reg. C
Transfer the content of reg. C
to Acc.
Store the content of acc. to
the memory location 8506H
8000
8001
8002
8003
8004
8005
8006
8007
8008
8009
START
NEXT
8017
8018
8019
801A
HLT
Stop the program execution.
OBSERVATION:
ADDRESS
8050H
8051H
8052H
8053H
INPUT
DATA
ADDRESS
8054H
8055H
8056H
OUTPUT
DATA
27
ECE DEPARTMENT
2(A). LARGEST ELEMENT IN AN ARRAY

AIM:
To find the largest element in an array.
ALGORITHM:
1. Place all the elements of an array in the consecutive memory locations.
2. Fetch the first element from the memory location and load it in the accumulator.
3. Initialize a counter (register) with the total number of elements in an array.
4. Decrement the counter by 1.
5. Increment the memory pointer to point to the next element.
6. Compare the accumulator content with the memory content (next
element).
7. If the accumulator content is smaller, then move the memory content
(largest element) to the accumulator. Else continue.
9. Repeat steps 5 to 8 until the counter reaches zero
10. Store the result (accumulator content) in the specified memory location.
RESULT:
Thus the largest number in the given array is found out.
28
ECE DEPARTMENT
FLOW CHART:
START
[HL] [8100H]
[B] 04H
[A] [HL]
[HL [HL] + 1
NO
IS
[A] < [HL]?
YES
[A] [HL]
[B] [B]-1
IS
[B] = 0?
NO
YES
[8105] [A]
STOP
29
ECE DEPARTMENT
PROGRAM:
ADDRE
SS
8001
8002
8003
8004
8005
8006
8007
OPCO
DE
8008
8009
800A
800B
800C
800D
800E
800F
8010
8011
8012
8013
8014
LABEL
LOOP1
LOOP
MNEM
ONICS
LXI
OPER
AND
H,8100
MVI
B,04
MOV
INX
A,M
H
CMP
JNC
M
LOOP
MOV
DCR
JNZ
A,M
B
LOOP1
STA
8105
HLT
COMMENTS
8100H
Initialize B reg with no. of
comparisons(n-1)
Transfer first data to acc.
next memory location
Compare M & A
If A is greater than M then go
to loop
Transfer data from M to A reg
Decrement B reg
If B is not Zero go to loop1
Store the result in a memory

location.
Stop the program
OBSERVATION:
INPUT
ADDRESS DATA
8100
8101
8102
8103
8104
OUTPUT
ADDRESS DATA
8105
30
ECE DEPARTMENT
2(B). SMALLEST ELEMENT IN AN ARRAY

AIM:
To find the smallest element in an array.
ALGORITHM:
1. Place all the elements of an array in the consecutive memory locations.
2. Fetch the first element from the memory location and load it in the accumulator.
3. Initialize a counter (register) with the total number of elements in an array.
5. Increment the memory pointer to point to the next element.
6. Compare the accumulator content with the memory content (next
element).
7. If the accumulator content is smaller, then move the memory content
(largest element) to the accumulator. Else continue.
9. Repeat steps 5 to 8 until the counter reaches zero
10. Store the result (accumulator content) in the specified memory location.
RESULT:
Thus the smallest number in the given array is found out.
31
ECE DEPARTMENT
FLOW CHART:
START
[HL] [8100H]
[B] 04H
[A] [HL]
[HL [HL] + 1
YES
IS
[A] < [HL]?
NO
[A] [HL]
[B] [B]-1
IS
[B] = 0?
NO
YES
[8105] [A]
STOP
32
ECE DEPARTMENT
PROGRAM:
ADDRE
SS
8001
8002
8003
8004
8005
8006
8007
OPCO
DE
8008
8009
800A
800B
800C
800D
800E
800F
8010
8011
8012
8013
8014
LABEL
LOOP1
LOOP
MNEM
ONICS
LXI
OPER
AND
H,8100
MVI
B,04
MOV
INX
A,M
H
CMP
JC
M
LOOP
MOV
DCR
JNZ
A,M
B
LOOP1
STA
8105
HLT
COMMENTS
8100H
Initialize B reg with no. of
comparisons(n-1)
Compare M & A
If A is lesser than M then go
to loop
Transfer data from M to A reg
Decrement B reg
Store the result in a memory

location.
Stop the program
OBSERVATION:
INPUT
ADDRESS DATA
8100
8101
8102
8103
8104
OUTPUT
ADDRESS DATA
8105
33
ECE DEPARTMENT
2(C).ASCENDING ORDER
AIM:
To sort the given number in the ascending order using 8085 microprocessor.
ALGORITHM:
1. Get the numbers to be sorted from the memory locations.
2. Compare the first two numbers and if the first number is larger than second then I
interchange the number.
3. If the first number is smaller, go to step 4
4. Repeat steps 2 and 3 until the numbers are in required order
RESULT:
Thus the ascending order program is executed and thus the numbers are arranged
in ascending order.
34

FLOWCHART:
ECE DEPARTMENT
START
[B] 04H
[HL] [8100H]
[C] 04H
[A] [HL]
[HL [HL] + 1
YES
IS
[A] < [HL]?
NO
[D] [HL]
[HL] [A]
[HL] [HL] - 1
[HL] [D]
[HL] [HL] + 1
[C] [C] 01 H
35
ECE DEPARTMENT
IS
[C] = 0?
NO
YES
[B] [B]-1
IS
[B] = 0?
NO
YES
STOP
36
ECE DEPARTMENT
PROGRAM:
ADDR
E
SS
8000
8001
8002
8003
8004
8005
8006
8007
8008
OPCO
DE
LABEL
LOOP 3
LOOP2
8009
800A
800B
800C
800D
800E
800F
8010
8011
8012
8013
8014
8015
8016
8017
8018
8019
801A
LOOP1
MNEM
ONICS
OPER
AND
MVI
B,04
LXI
H,8100
MVI
C,04
MOV
INX
A,M
H
CMP
JC
M
LOOP1
MOV
MOV
DCX
MOV
INX
DCR
JNZ
D,M
M,A
H
M,D
H
C
LOOP2
Transfer data from M to D reg

Transfer data from acc to M
Decrement HL pair
Transfer data from D to M
Increment HL pair
Decrement C reg
If C is not zero go to loop2
DCR
JNZ
B
LOOP3
Decrement B reg
HLT
COMMENTS
Initialize B reg with number

of comparisons (n-1)
8100H
Initialize C reg with no. of
comparisons(n-1)
Compare M & A
If A is less than M then go to
loop1
Stop the program
OBSERVATION:
INPUT
MEMORY
LOCATION
8100
8101
8102
8103
8104
OUTPUT
DATA
MEMORY
LOCATION
8100
8101
8102
8103
8104
DATA
37
ECE DEPARTMENT
2(D). DESCENDING ORDER

AIM:
To sort the given number in the descending order using 8085 microprocessor.
ALGORITHM:
1. Get the numbers to be sorted from the memory locations.
2. Compare the first two numbers and if the first number is smaller than second then I
interchange the number.
3. If the first number is larger, go to step 4
4. Repeat steps 2 and 3 until the numbers are in required order
RESULT:
Thus the descending order program is executed and thus the numbers are arranged
in descending order.
38
FLOWCHART:
ECE DEPARTMENT
START
[B] 04H
[HL] [8100H]
[C] 04H
[A] [HL]
[HL [HL] + 1
NO
IS
[A] < [HL]?
YES
[D] [HL]
[HL] [A]
[HL] [HL] - 1
[HL] [D]
[HL] [HL] + 1
[C] [C] 01 H
39
ECE DEPARTMENT
IS
[C] = 0?
NO
YES
[B] [B]-1
IS
[B] = 0?
NO
YES
STOP
40
ECE DEPARTMENT
PROGRAM:
ADDRE
SS
8000
8001
8002
8003
8004
8005
8006
8007
8008
OPCO
DE
LABEL
MNEM
ONICS
MVI
OPER
AND
B,04
LXI
H,8100
MVI
C,04
MOV
INX
A,M
H
CMP
JNC
M
LOOP1
MOV
MOV
DCX
MOV
INX
DCR
JNZ
D,M
M,A
H
M,D
H
C
LOOP2
Transfer data from M to D reg

Transfer data from acc to M
Decrement HL pair
Transfer data from D to M
Increment HL pair
Decrement C reg
If C is not zero go to loop2
DCR
JNZ
B
LOOP3
Decrement B reg
LOOP 3
LOOP2
8009
800A
800B
800C
800D
800E
800F
8010
8011
8012
8013
8014
8015
8016
8017
8018
8019
801A
LOOP1
HLT
COMMENTS
Initialize B reg with number
of comparisons (n-1)
8100H
Initialize C reg with no. of
comparisons(n-1)
Compare M & A
If A is greater than M then go
to loop1
Stop the program
OBSERVATION:
INPUT
MEMORY
LOCATION
8100
8101
8102
8103
8104
OUTPUT
DATA
MEMORY
LOCATION
8100
8101
8102
8103
8104
DATA
41
ECE DEPARTMENT
EXPERIMENTS USING MASM 8086 PROGRAMS
3(A). 16-BIT ADDITION

PROBLEM STATEMENT:
Write a program to add the given two 16-bit Nos. in 8086p.
ALGORITHM:
1.
2.
3.
4.
5.
6.
7.
Get the addend and augend.

Initialize DX register for carry.
Add addend and augend.
If there is carry, increment DX register and go to step6 or else directly go to step6.
Initialize the memory pointer to output location
Store the result & carry in consecutive memory locations.
CONCLUSION:
Thus addition of two 16-bit numbers is performed.
EXERCISE:
Write an ALP using INTEL8086 mnemonics to add any two 32-bit numbers.
42
ECE DEPARTMENT
FLOWCHART:
START
AX
Addend
DX
AX
0000H
AX + Second No.
NO
Is Carry flag
set?
YES
DX
DX+1
[Sum]
[Sum+2]
AX
DX
STOP
43
ECE DEPARTMENT
PROGRAM:
data_here
data_here
code_here
start:
go:
code_here
segment
firstno
dw
0202h
secondno dw
0202h
sum
dw
2 dup(0)
ends
segment
assume cs:code_here,ds:data_here
mov ax,data_here
mov ds,ax
mov ax,firstno
mov dx,0000h
add ax,secondno
jnc go
inc dx
mov sum,ax
mov sum+2,dx
int 3
ends
end start
; first no.
; second no.
; store sum here
; initialize data segment

; get first no.
; initialize dx for carry.
; add second to it.
; store the sum & carry.
44
ECE DEPARTMENT
3(B). 16-BIT SUBTRACTION

PROBLEM STATEMENT:
Write a program to subtract given two, 16 bit numbers.
ALGORITHM:
1. Get the minuend and subtrahend.
2. Compare the minuend and subtrahend. If minuend is lesser than subtrahend,
interchange the numbers and increment Dx register.
3. Subtract subtrahend from minuend.
4. Initialize the memory pointer to output memory location.
5. Store the results in two memory locations and DX register content in the next
memory location.
6. Stop the program execution.
CONCLUSION:
Thus, subtraction of two 16-bit numbers was performed.
EXERCISE:
1. Write an ALP to subtract any two 32-bit numbers using INTEL8086 mnemonics.
2. Write an ALP to subtract any two 16-bit numbers.
(HINT: If subtrahend is greater than minuend, take 2s complement of the result and
indicate it by putting 01 in DL register.)
45
ECE DEPARTMENT
FLOWCHART:
START
AX
DX
CX
Minuend
Subtrahend
0000H
YES
Is
DX>AX ?
NO
BX
DX
AX
DX
AX
BX
CX
01H
AX
AX - DX
[Result]
[Result+2]
AX
CX
STOP
46
ECE DEPARTMENT
PROGRAM:
data_here
data_here
code_here
start:
ahead:
code_here
segment
minuend
dw
2222h
subtrahend
dw
1111h
result
dw
2 dup(0)
ends
segment
mov ax,data_here
mov ds,ax
mov ax,minuend
mov dx,subtrahend
mov cx,0000h
cmp ax,dx
jnc ahead
mov bx,dx
mov dx,ax
mov ax,bx
mov cx,0001h
sub ax,dx
mov result,ax
mov result+2,cx
int 3
ends
end start
; Minuend
; Subtrahend
; Store result here.
; Initialize data segment.

; Get minuend & store in Acc.
; Get subtrahend & store in dx.
; Initialize cx for carry
; compare minuend & subtrahend if
minuend smaller than subtrahend ,
interchange minuend & subtrahend.
; Increment carry by one.

; subtract dx from ax
; store the result & carry.
47
ECE DEPARTMENT
3(C). 16-BIT MULTIPLICATION

PROBLEM STATEMENT:
Write a program to multiply two, 16-bit numbers using MASM software.
ALGORITHM:
1.
2.
3.
4.
5.
Get the multiplicand and multiplier

Multiply the multiplicand with multiplier using repeated addition method.
Initialize the memory pointer to output memory location.
Store the results in memory locations.
CONCLUSION:
Thus, multiplication of two, 16-bit numbers is performed using INTEL 8086
Mnemonics.
EXERCISE:
Write an ALP using INTEL8086 mnemonics to multiply two signed 16-bit
numbers.
48
ECE DEPARTMENT
FLOWCHART:
START
AX
DX, AX
Multiplicand
AX . Multiplier
[Product]
[Product+2]
AX
DX
STOP
PROGRAM:
data_here
data_here
code_here
start:
code_here
segment
multiplicand dw 0202h
multiplier
dw
0202h
product
dw
2 dup(0)
ends
segment
mov ax,data_here
mov ds,ax
mov ax,multiplicand
mul multiplier
mov product,ax
mov product+2,dx
int 3
ends
end start
; Multiplicand
; Multiplier
; store product here.

; Get multiplicand
; multiply multiplier with it.
; Store the result.
49
ECE DEPARTMENT
3(D). 16-BIT DIVISION

PROBLEM STATEMENT:
Write a program to Divide two, 16-bit numbers using MASM software.
ALGORITHM:
1.
2.
3.
4.
5.
Get the dividend and divisor.

Divide dividend by divisor.
Initialize the memory pointer to output memory location.
Store the results in memory locations.
CONCLUSION:
Thus, division of two, unsigned 16-bit numbers is performed using INTEL 8086
Mnemonics.
EXERCISE:
Write an ALP using INTEL8086 mnemonics to divide two signed 16-bit numbers.
FLOWCHART:
START
AX
DX
Dividend
0000H
AX / Divisor
AX
Quotient
DX
Remainder
[Product]
[Product+2]
AX
DX
STOP
50
ECE DEPARTMENT
PROGRAM
data_here
data_here
code_here
start:
code_here
segment
dividend
divisor
result
ends
dw
2222h
dw 1111h
dw
2 dup(0)
segment
mov ax,data_here
mov ds,ax
mov ax,dividend
div divisor
mov result,ax
mov result+2,dx
int 3
ends
end start
; Dividend
; Divisor
; Store result here.

; Get dividend
; Divide it by divisor.
; Store result.
51
ECE DEPARTMENT
4(A) . BIOS/DOS CALLS DISPLAY

AIM:
To display a message on the CRT screen of a microcomputer using DOS calls.
ALGORITHM:
1. Initialize the data segment and the message to be displayed.
2. Set function value for display.
3. Point to the message and run the interrupt to display the message in the CRT.
PROGRAM:
ASSUME CS: CODE, DS: DATA

DATA SEGMENT
MSG DB 0DH, 0AH, GOOD MORNING , ODH, OAH, $
DATA ENDS
CODE SEGMENT
START:
MOV AX, DATA

MOV DS, AX
MOV AH, 09H
MOV DX, OFFSET MSG
INT 21H
MOV AH, 4CH
INT 21H
CODE ENDS
END START
RESULT:
A message is displayed on the CRT screen of a microcomputer using DOS calls
52
ECE DEPARTMENT
4(B). BIOS/DOS CALLS FILE MANIPULATION

AIM:
To open a file using DOS calls.
ALGORITHM:
1. Initialize the data segment, file name and the message to be displayed.
2. Set the file attribute to create a file using a DOS call.
3. If the file is unable t o create a file display the message
PROGRAM:
ASSUME CS: CODE, DS: DATA
DATA SEGMENT
FILENAME DB SAMPLE.DAT, $
MSG DB 0DH, 0AH, FILE NOT CREATED, ODH, OAH, $
DATA ENDS
CODE SEGMENT
START:
MOV AX, DATA
MOV DS, AX
MOV DX, OFFSET FILENAME
MOV CX, 00H
MOV AH, 3CH
INT 21H
JNC LOOP1
MOV AX, DATA
MOV DS, AX
MOV DX, OFFSET MSG
MOV AH, 09H
INT 21H
LOOP1
MOV AH, 4CH

INT 21H
CODE ENDS
END START
RESULT :
A file is opened using DOS calls.
53
ECE DEPARTMENT
5. INTERFACING 8255 WITH 8085

AIM:
To interface programmable peripheral interface 8255 with 8085 and study its
characteristics in mode0,mode1 and BSR mode.
APPARATUS REQUIRED:
8085 p kit, 8255Interface board, DC regulated power supply, VXT parallel bus
I/O MODES:
Control Word:
MODE 0 SIMPLE I/O MODE:

This mode provides simple I/O operations for each of the three ports and
is suitable for synchronous data transfer. In this mode all the ports can be configured
either as input or output port.
Let us initialize port A as input port and port B as output port
PROGRAM:
54
ECE DEPARTMENT
ADDRESS OPCODES LABEL MNEMONICS OPERAND COMMENTS

4100
START: MVI
A, 90
Initialize port A
as Input and Port
4101
B as output.
4102
OUT
C6
Send Mode
Control word
4103
4104
IN
C0
Read from Port A
4105
4106
OUT
C2
Display the data
in port B
4107
4108
STA
4200
Store the data
read from Port A
4109
in 4200
410A
410B
HLT
Stop the
program.
MODE1 STROBED I/O MODE:
In this mode, port A and port B are used as data ports and port C is used as control
signals for strobed I/O data transfer.
Let us initialize port A as input port in mode1
MAIN PROGRAM:
4100
START: MVI
A, B4
Initialize port A
as Input port in
4101
mode 1.
4102
OUT
C6
Send Mode
Control word
4103
4104
MVI
A,09
Set the PC4 bit
for INTE A
4105
4106
OUT
C6
Display the data
in port B
4107
EI
4108
MVI
A,08
Enable RST5.5
4109
410A
SIM
EI
410B
HLT
Stop the
program.
55
ECE DEPARTMENT
ISR (Interrupt Service Routine)

4200
START: IN
C0
Read from port A
4201
4202
STA
4500
Store in 4500.
4203
4204
4205
HLT
Stop the
program.
Sub program:
405E
JMP
4200
Go to 4200
405F
4060
BSR MODE (Bit Set Reset mode)
Any lines of port c can be set or reset individually without affecting other lines
using this mode. Let us set PC0 and PC3 bits using this mode.
PROGRAM:
56
ADDRESS OPCODES LABEL MNEMONICS

4100
START: MVI
4101
4102
OUT
4103
4104
MVI
4105
4106
OUT
4107
4109
HLT
ECE DEPARTMENT
OPERAND COMMENTS
A, 01
Set PC0
C6
A,07
C6
Send Mode
Control word
Set PC3
Send Mode
Control word
Stop the
program.
RESULT:
Thus 8255 is interfaced and its characteristics in mode0,mode1 and BSR mode is
studied.
6. INTERFACING 8253 TIMER WITH 8085
57
ECE DEPARTMENT
Interfacing 8253 Programmable Interval Timer with 8085 p

AIM:
To interface 8253 Interface board to 8085 p and verify the operation of 8253in six
different modes.
APPARATUS REQUIRED:
8085 p kit, 8253 Interface board, DC regulated power supply, VXT parallel bus,
CRO.
Mode 0 Interrupt on terminal count:

The output will be initially low after mode set operations. After loading the counter,
the output will be remaining low while counting and on terminal count; the output
will become high, until reloaded again.
Let us set the channel 0 in mode 0. Connect the CLK 0 to the debounce circuit by
changing the jumper J3 and then execute the following program.
Program:
Address Opcodes
4100
4102
4104
4106
4108
410A
410C
Label
Mnemonic Operands
START: MVI
A, 30
OUT
CE
MVI
A, 05
OUT
C8
MVI
A, 00
OUT
C8
HLT
Comments
Channel 0 in mode 0
Send Mode Control word
LSB of count
Write count to register
MSB of count
It is observed in CRO that the output of Channel 0 is initially LOW. After giving six
clock pulses, the output goes HIGH.
Mode 1 Programmable ONE-SHOT:
After loading the counter, the output will remain low following the rising edge of
the gate input. The output will go high on the terminal count. It is retriggerable; hence
the output will remain low for the full count, after any rising edge of the gate input.
Example:
58
ECE DEPARTMENT
The following program initializes channel 0 of 8253 in Mode 1 and also initiates
triggering of Gate 0. OUT 0 goes low, as clock pulse after triggering the goes back to
high level after 5 clock pulses. Execute the program, give clock pulses through the
debounce logic and verify using CRO.
Address Opcodes
4100
4102
4104
4106
4108
410A
410C
4100
Label
Mnemonic Operands
START: MVI
A, 32
OUT
CE
MVI
A, 05
OUT
C8
MVI
A, 00
OUT
C8
OUT
D0
HLT
Comments
Channel 0 in mode 1
LSB of count
MSB of count
Trigger Gate0
Mode 2 Rate Generator:

It is a simple divide by N counter. The output will be low for one period of the input
clock. The period from one output pulse to the next equals the number of input
counts in the count register. If the count register is reloaded between output pulses
the present period will not be affected but the subsequent period will reflect the new
value.
Example:
Using Mode 2, Let us divide the clock present at Channel 1 by 10. Connect the
CLK1 to PCLK.
Address Opcodes Label
Mnemonic Operands
Comments
4100
3E 74
START: MVI
A, 74
Channel 1 in mode 2
4102
D3 CE
OUT
CE
4104
3E 0A
MVI
A, 0A
LSB of count
4106
D3 CA
OUT
CA
4108
3E 00
MVI
A, 00
MSB of count
410A
D3 CA
OUT
CA
410C
76
HLT
In CRO observe simultaneously the input clock to channel 1 and the output at Out1.
Mode 3 Square wave generator:
59
ECE DEPARTMENT
It is similar to Mode 2 except that the output will remain high until one half of count
and go low for the other half for even number count. If the count is odd, the output
will be high for (count + 1)/2 counts. This mode is used of generating Baud rate for
8251A (USART).
Example:
We utilize Mode 0 to generate a square wave of frequency 150 KHz at channel 0.
Address Opcodes Label
Mnemonic Operands
Comments
4100
3E 36
START: MVI
A, 36
Channel 0 in mode 3
4102
D3 CE
OUT
CE
4104
3E 0A
MVI
A, 0A
LSB of count
4106
D3 C8
OUT
C8
4108
3E 00
MVI
A, 00
MSB of count
410A
D3 C8
OUT
C8
410C
76
HLT
Set the jumper, so that the clock 0 of 8253 is given a square wave of frequency 1.5 MHz.
This program divides this PCLK by 10 and thus the output at channel 0 is 150 KHz.
Vary the frequency by varying the count. Here the maximum count is FFFF H.
So, the square wave will remain high for 7FFF H counts and remain low for 7FFF H
counts. Thus with the input clock frequency of 1.5 MHz, which corresponds to a period
of 0.067 microseconds, the resulting square wave has an ON time of 0.02184
microseconds and an OFF time of 0.02184 microseconds.
To increase the time period of square wave, set the jumpers such that CLK2 of
8253 is connected to OUT 0. Using the above-mentioned program, output a square wave
of frequency 150 KHz at channel 0. Now this is the clock to channel 2.
Mode 4: Software Triggered Strobe:
The output is high after mode is set and also during counting. On terminal count,
the output will go low for one clock period and becomes high again. This mode can be
used for interrupt generation.
The following program initializes channel 2 of 8253 in mode 4.
Example:
Connect OUT 0 to CLK 2 (jumper J1). Execute the program and observe the
output OUT 2. Counter 2 will generate a pulse after 1 second.
Address Opcodes
4100
4102
4104
Label
Mnemonic Operands
START: MVI
A, 36
OUT
CE
MVI
A, 0A
Comments
Channel 0 in mode 0
LSB of count
60

4106
4108
410A
410C
410E
4110
4112
4114
4116
4118
OUT
MVI
OUT
MVI
OUT
MVI
OUT
MVI
OUT
HLT
ECE DEPARTMENT
C8
A, 00
C8
A, B8
CE
A, 98
CC
A, 3A
CC

MSB of count
Channel 2 in Mode 4
Send Mode control Word
LSB of Count
Write Count to register
MSB of Count
Write Count to register
Mode 5 Hardware triggered strobe:

Counter starts counting after rising edge of trigger input and output goes low for
one clock period when terminal count is reached. The counter is retriggerable.
Example:
The program that follows initializes channel 0 in mode 5 and also triggers Gate 0.
Connect CLK 0 to debounce circuit.
Execute the program. After giving Six clock pulses, you can see using CRO, the
initially HIGH output goes LOW. The output ( OUT 0 pin) goes high on the next clock
pulse.
Address Opcodes
4100
4102
4104
4106
4108
410A
410C
Label
Mnemonic Operands
START: MVI
A, 1A
OUT
CE
MVI
A, 05
OUT
C8
MVI
A, 00
OUT
D0
HLT
Comments
Channel 0 in mode 5
LSB of count
MSB of count
Trigger Gate 0
Result:
Thus the 8253 has been interfaced to 8085 p and six different modes of 8253
have been studied.

61

Aim:
ECE DEPARTMENT
To interface 8279 programmable Keyboard/Display Controller to 8085 p
Apparatus Required:
8085 p , 8279 Interface board , Power supply , vxt parallel bus
Theory:
The Intel 8279 is responsible for debouncing of the keys, coding of the keypad
matrix and refreshing of the display elements in a microprocessor based development
system. Its main features are :
Simultaneous keyboard and display operation.
3 Input modes such as scanned keyboard mode, scanned sensor mode and
strobed input entry mode.
2 output modes such as 8 or 16 character multiplexed displays , right entry or
left entry display formats.
Clock prescaler
Programmable scan timing
2 key lock_ out or N_key roll_over with contact debounce
Auto increment facility for easy programming.
Program 1:
To initialize 8279 and to display the character A in the first digit of the
display.
MVI
OUT
MVI
OUT
MVI
OUT
MVI
OUT
MVI
OUT
OUT
OUT
OUT
OUT
HLT
A,00
C2
A,CC
C2
A,90
C2
A,88
C0
A,FF
C0
C0
C0
C0
C0
; mode and display set

; clear display
; write display RAM
; Display A
; blank the rest of the display
Program 2:
62
ECE DEPARTMENT
To read a key and store the key code in memory location 4200H
IN
ANI
JZ
MVI
OUT
IN
STA
HLT
C2
07
4150
A,40
C2
C0
4200
; FIFIstatus
; check for a key closure
; set 8279 for a read
; of FIFO RAM
; keycode at 4200
Procedure:
Enter the above two programs from the address specified and execute it.
The display is A in the first digit and the rest are left blank for program-1.
If a key closure is encountered , read the data from FIFO RAM , and store this data(key
code) in memory location 4200H.
Exercise:
Program 8279 to display the rolling message HELP US in the display.
Result:
Thus the 8279 was interfaced to 8085 p to interface Hex keyboard and 7Segment Display.
63
ECE DEPARTMENT

Communication Between two 8085 Microprocessors
Aim:
To transmit and receive a Character between two 8085 ps using 8251A
Apparatus Required:
8085 p Kit 2 No.s , RS 232C cable , Power supply 2 No.s
Theory:
The program first initializes the 8253 to give an output clock frequency of
150KHz at channel 0 which will give a 9600 baud rate of 8251A. Then the 8251A is
initialized to a dummy mode command. The internal reset to 8251A is then provided,
since the 8251A is in the command mode now. Then 8251A is initialized as follows.
Initializing 8251A using the Mode instruction to the following.
8 bit data
No parity
16x Baud rate factor
1 stop bit
B2 , B1 = 1 , 0
L2 , L1 = 1 ,1
PEN = 0
EP
=0
S2 , S1 = 0 , 1
gives a Mode command word of 4E.
When 8251A is initialized as follows using the command instruction,
Reset Error flags,
Enable transmission and reception,
Make RTS and DTR active low.
EH = 0
SBRK = 0
IR = 0
RxE = 1
RTS = 1
DTR = 1
ER = 1
TxEN = 1
We get a command word of 37
The program after initializing , will read the status register and check for TxEMPTY. If
the transmitter buffer is empty then it will send 41 to the serial port and then check for a
character in the receive buffer. If some character is present then, it is received and stored
at location 4200H.
64
ECE DEPARTMENT
Program:
ORG
4100H
UATCNT
EQU
05
UATDAT
TMRCNT
TMRCH0
EQU
EQU
EQU
04
0B
08
MVI
OUT
MVI
OUT
XRA
OUT
XRA
OUT
MVI
OUT
MVI
OUT
MVI
OUT
A,36
TMRCNT
A,0A
TMRCH0
A
TMRCH0
A
UATCNT
A,40
UATCNT
A,4E
UATCNT
A,37
UATCNT
;Initialization of 8253
UATCNT
04
LOOP
A,41
UATDAT
;Check 8251As TxEMPTY

;and then send the data 41
UATCNT
2
LOOP1
UATDAT
4200
;Check 8251As RxRDY and then

;get the data and store at 4200
;Resetting the 8251A
;Initialization of 8251A
Program for Transmitter:

LOOP:
IN
ANI
JZ
MVI
OUT
Program for Receiver:
LOOP1:
IN
ANI
JZ
IN
STA
HLT
Procedure:
Feed the above program in two 8085 ps (One acts as Transmitter and the other
acts as Receiver). Execute the two programs simultaneously. Check the Receiver at
location 4200H. It s content will be 41.
65
ECE DEPARTMENT
Exercise:
Write a program to transmit a block of data from transmitter and receive them at
the receiver.
Result:
Thus the communication between two microprocessors has been established.
66
ECE DEPARTMENT
9. STEPPER MOTOR CONTROL

PROBLEM STATEMENT:
Write an ALP to drive and control a stepper motor.
THEORY:
Stepper motor control is one of the popular applications of microprocessor
in control area. Stepper motor are capable of accepting a sequence of pulse from the
microprocessor and step accordingly. They are used to control numerical controlled
machines, computer peripheral equipment, business machines, process control etc.
INTERFACE DRIVE CIRCUIT:
Stepper motor requires logic signals of relatively high power. Silicon
Darlington pair TRSL100 with 2N3005 transistors are used to supply the power. The
driving pulses are generated by the interface circuit and given to the four coils of the
stepper motor. The inputs for the interface circuit are TTL pulses generated under
software control using microprocessor kit. The TTL levels of pulse sequence at the
output ports of 8255 are translated to high voltage output pulses of 12V using buffers
(IC 7406). The Darlington pair transistor TRSL100 drives the stepper motor as they
withstand higher current. A 620 resistor and a diode connected between power supply
and Darlington pair collector are used for supporting fly back current. PA0 PA3 of port
A are used for driving the transistor TRSL100. The four collector points of each
transistor are brought to a 5 pair connector for connecting to a stepper motor.
67
ECE DEPARTMENT
PROGRAM
MEMORY
ADDRESS
OPCODE
3E
80
D3
43
3E
88
D3
40
CD
50
41
0F
C3
06
41
LABEL
LOOP
MNEMONIC
OPERAND
COMMENTS
MVI
A, 80
OUT
43 H
Control word to
initialize the port A
of 8255 as output port
MVI
A, 88
OUT
40 H
CALL
DELAY
Call the subroutine

DELAY
Rotate the Acc
contents rights carry
by 1 bit.
RRC
JMP
Data sent to port A to

energize the winding
of stepper motor.
LOOP
Jump unconditionally
to the instruction
labeled LOOP
68
ECE DEPARTMENT
WINDING CONNECTION OF STEPPER MOTOR

A
B
COMMON
DRIVER CIRCUIT FOR ENERGISING EACH WINDING

+12V
620
PA
WA
1N4001
220
SL 100
220
2N 3055
69
ECE DEPARTMENT
I / O decoding:
Address
43 H
40 H
selection
Port A is selected
Stepper motor is selected
FLOW CHART:
START
Initialize the I/O ports

of 8255
Energize the windings of stepper

motor
CALL DELAY
Get the next winding by rotating the Acc.

contents right through carry by 1 bit.
70
ECE DEPARTMENT
SUBROUTINE:
DELAY
[B] 05 H
[C] FF H
[D] FF H
[D] [D] - 1
NO
IS
[D] = 0?
YES
[C] [C] - 1
NO
IS
[C]= 0?
YES
[B] [B] - 1
NO
IS
[B] = 0?
YES
RETURN
71
ECE DEPARTMENT
SUBROUTINE PROGRAM:
MEMORY
ADDRESS
4150
4151
4152
4153
4154
4155
4156
OPCODE
LABEL
MNEMONIC
OPERAND
COMMENTS
06
05
0E
FF
16
FF
15
DELAY
MVI
B, 05
LOOP 1 MVI
C, FF
LOOP 2 MVI
D, FF
LOOP 3 DCR
4157
4158
4159
C2
56
41
JNZ
LOOP 3
415A
0D
DCR
415B
415C
415D
C2
54
41
JNZ
LOOP 2
415E
05
DCR
415F
4160
4161
C2
52
41
JNZ
LOOP 1
4162
C9
RET
Get the data 05 H in

Reg. B
Get the data FF H in
Reg. C
Get the data FF H in
Reg. D
Decrement the
contents of Reg. D
If the contents of
Reg. D is not zero go
to instruction labeled
LOOP - 3
Decrement the
contents of Reg. C
If the contents of
Reg. C is not zero go
LOOP - 2
Decrement the
contents of Reg. B
If the contents of
Reg. B is not zero go
LOOP 1
Return to the main
program.
CONCLUSION:
Thus an ALP to drive and control a stepper motor was written and
executed.
72
ECE DEPARTMENT
10. STEPPER MOTOR INTERFACING WITH 8051

AIM:
To interface a stepper motor with 8051 microcontroller and operate it.
THEORY:
A motor in which the rotor is able to assume only discrete stationary angular
position is a stepper motor. The rotary motion occurs in a step-wise manner from one
equilibrium position to the next. Stepper Motors are used very wisely in position control
systems like printers, disk drives, process control machine tools, etc.
The basic two-phase stepper motor consists of two pairs of stator poles. Each of
the four poles has its own winding. The excitation of any one winding generates a North
Pole. A South Pole gets induced at the diametrically opposite side. The rotor magnetic
system has two end faces. It is a permanent magnet with one face as South Pole and the
other as North Pole.
The Stepper Motor windings A1, A2, B1, B2 are cyclically excited with a DC
current to run the motor in clockwise direction. By reversing the phase sequence as A1,
B2, A2, B1, anticlockwise stepping can be obtained.
2-PHASE SWITCHING SCHEME:
In this scheme, any two adjacent stator windings are energized. The switching
scheme is shown in the table given below. This scheme produces more torque.
ANTICLOCKWISE
STEP A1
A2
B1
1
2
3
4
1
0
0
1
0
1
1
0
0
0
1
1
B2
DATA
1
1
0
0
9h
5h
6h
Ah
CLOCKWISE
STEP A1 A2
1
2
3
4
1
0
0
1
0
1
1
0
B1
B2
DATA
1
1
0
0
0
0
1
1
Ah
6h
5h
9h
ADDRESS DECODING LOGIC:

The 74138 chip is used for generating the address decoding logic to generate the
device select pulses, CS1 & CS2 for selecting the IC 74175.The 74175 latches the data
bus to the stepper motor driving circuitry.
Stepper Motor requires logic signals of relatively high power. Therefore, the
interface circuitry that generates the driving pulses use silicon darlington pair transistors.
The inputs for the interface circuit are TTL pulses generated under software control using
the Microcontroller Kit. The TTL levels of pulse sequence from the data bus is translated
to high voltage output pulses using a buffer 7407 with open collector.
73
ECE DEPARTMENT
PROGRAM :
Address
OPCODES
Label
Comments
ORG
4100h
START:
MOV
DPTR, #TABLE
LOOP:
MOV
MOVX
R0, #04
A, @DPTR
4106
4108
410A
PUSH
PUSH
MOV
DPH
DPL
DPTR, #0FFC0h
410D
MOVX
@DPTR, A
410E
4110
MOV
MOV
R4, #0FFh
R5, #0FFh
DJNZ
R5, DELAY1
4114
4116
4118
411A
DJNZ
POP
POP
INC
R4, DELAY
DPL
DPH
DPTR
411B
DJNZ
R0, LOOP
411D
SJMP
START
DB
09 05 06 0Ah
4100
4103
4105
4112
411F
DELAY
:
DELAY
1:
TABLE:
Load the start

address of switching
scheme data TABLE
into Data Pointer
(DPTR)
Load the count in R0
Load the number in
TABLE into A
Push DPTR value to
Stack
Load the Motor port
address into DPTR
Send the value in A
to stepper Motor port
address
Delay loop to cause
a specific amount of
time delay before
next data item is sent
to the Motor
POP back DPTR
value from Stack
Increment DPTR to
point to next item in
the table
Decrement R0, if not
zero repeat the loop
Short jump to Start
of the program to
make the motor
rotate continuously
Values as per twophase switching
scheme
PROCEDURE:
Enter the above program starting from location 4100.and execute the same. The
stepper motor rotates. Varying the count at R4 and R5 can vary the speed. Entering the
data in the look-up TABLE in the reverse order can vary direction of rotation.
74
ECE DEPARTMENT
RESULT:
Thus a stepper motor was interfaced with 8051 and run in forward and reverse
directions at various speeds.
75
ECE DEPARTMENT
11.TRAFFIC LIGHT CONTROLLER

PROBLEM STATEMENT:
Write an ALP to control the traffic light signal using the microprocessor
8085.
THEORY:
A simple contraption of a traffic control system is shown in the figure
where the signaling lights are simulated by the blinking or ON OFF control of LEDs.
The signaling lights for the pedestrian crossing are simulated by the ON OFF control of
dual colour LEDs.
A model of a four road four lane junction, the board has green, yellow
and red LEDs which are the green, orange and red signals of an actual systems. 12 LEDs
are used on the board. In addition 8 dual colour LEDs are used which can be made to
change either to red or to green.
The control of the LEDs is as follows:
The board communicates with the microprocessor trainer by means of a 26
core cable which is connected to the output pins of any parallel port of trainer.
The outputs (i.e. port) are the inputs to buffers 7406 whose
outputs drive the LEDs. The buffered output applied to the cathode of the
LEDs decides whether it is ON or OFF.
76
ECE DEPARTMENT
NORTH
DL14
PB7
STOP
DL15
PB7
Go L18 PA4
Yo L19 PA6
Ro L20 PA7
PB1 PA5 PA1

PB4 DL8 L11 L12 L13
Go Yo Ro
S
T
WEST O
P
S
T
0 EAST
P
PB4 DL7
PB3 L6 oR
Ro Yo Go
PB2 L5 oY
PB0 L4 oG
L27 L26
P
L25
DL22
PB6
PA2 PA0
DL1
PB5
DL28
STOP
PB5
SOUTH
Dual Colour LED)
I/O Decoding:
Address
selection
OF H
Control word Register
OC H
Port A
OD H
Port B
77
ECE DEPARTMENT
FLOW CHART
START
Initialize the port of

8255
Move the data OC h to

Reg. C
Send data to port A to

activate the LEDs
Send data to port B to

activate the LEDs
connected to it
CALL DELAY
Decrement the count

in Reg. C
IS
COUNT = 0?
NO
YES
78
FLOW CHART
ECE DEPARTMENT
DELAY
Move the contents of Reg. BC

to stack pointer
Move the contents 05 H to Reg. C
Move the Contents FFFF H to DE

Reg. pair
Decrement the content of DE

Reg. pair
IS
[DE] = 0000 H?
NO
YES
Decrement the content
YES of Reg. C
NO
IS
[C] =00 H?
YES
Move back the contents of stack pointer
to Reg. Pair BC
RETURN
79
ECE DEPARTMENT
PROGRAM
MEMORY
ADDRESS
4100
4101
4102
4103
4104
4105
4106
4107
4108
4109
410A
410B
410C
410D
410E
410F
4110
4111
4112
4113
4114
4115
4116
4117
4118
4119
411A
OPCODE
LABEL
MNEMONIC
OPERAND
COMMENTS
21
00
45
0E
0C
7E
D3
0F
23
7E
D3
0C
23
7E
D3
0D
CD
1B
41
23
0D
C2
09
41
C3
00
41
START
LXI
H, 4500 H
Initialize the
HLReg. Pair to
4500 H
MVI
C, OC H
MOV
OUT
A, M
OF H
INX
MOV
OUT
H
A, M
OC H
INX
MOV
OUT
H
A, M
OD H
CALL
DELAY
DELAY
DCR
JNZ
H
C
LOOP 1
JMP
START
LOOP1
Initialize the count

Reg. C to OC H
Initialize the ports
of 8255.
Send the data to
switch ON / OFF
The LEDs through
port A.
Switch ON / OFF
the LEDs through
port B
Call the subroutine

delay
Get the next data
and decrement the
count.
If the count is not
zero go to
instruction labeled
LOOP 1
Jump
unconditionally to
the instruction
labeled START
80
ECE DEPARTMENT
SUBROTINE
411B
C5
411C
411D
411E
411F
4120
4121
4122
4123
4124
4125
4126
PUSH
MVI
C, 05
LOOP3
LXI
D, FFFF
LOOP2
DCX
7A
B3
MOV
ORA
A, D
E
C2
21
41
JNZ
LOOP 2
0D
DCR
C2
1E
JNZ
LOOP 3
41
C1
POP
C9
RET
0E
05
11
FF
FF
1B
DELAY
4127
4128
4129
412A
412B
412C
Save the contents

of BC Reg. Pair to
stack pointer.
Initialize Reg. C to
hold data 05 H.
Get the data FFFF
H in DE Reg. Pair.
Decrement the
content of DE Reg.
Pair
Check whether the
contents of DE
Reg. Pair is zero.
If the contents of
DE Reg. Pair is not
zero go to
instruction labeled
LOOP 2
Decrement the
content of Reg. C
If the contents of
Reg. C is not zero
go to instruction
labeled LOOP 3
Move the contents
of stack pointer to
BC Reg. Pair
Return to the main
program.
81

LOOK UP TABLE:
Address
Machine Code
4500
80
4501
1A
4502
A1
4503
64
4504
A4
4505
81
4506
5A
4507
64
4508
54
4509
8A
450A
B1
450B
A8
ECE DEPARTMENT
Address
450C
450D
450E
450F
4510
4511
4512
4513
4514
4515
4516
4517
4518
Machine Code
B4
88
DA
68
D8
1A
E8
46
E8
83
78
86
74
OBSERVATION:
The traffic controller is simulated.
CIRCUIT DIAGRAM
PB0
U4F
12
LED4
R23
U4D
LED5
R7
13
PB2
U2A
LED18
R4
U3F
LED19
R2
U3E
LED20
R3
U4A
LED25
R9
U4B
LED26
R6
U4C
LED27
R8
PA6
U4A
LED6
R10
PB3
PA7
U2D
LED11
R26
PB1
PA0
U2C
LED12
R5
PB5
PA2
U2B
PA1
PA4
LED13
R11
PA3
82
ECE DEPARTMENT
Vcc
D LED 7
PB4
UID
9
UIE
811
10
DLED 8
CONCLUSION:
Thus an ALP of to control the traffic light signal was written
and executed.
83

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SRINIVASAN ENGINEERING COLLEGE

SRINIVASAN COLLEGE OF ENGINEERING

CS 2259: MICROPROCESSORS LABORATORY

SRINIVASAN ENGINEERING COLLEGE

MICROPROCESSOR LAB MANUAL

SRINIVASAN ENGINEERING COLLEGE

SRINIVASAN ENGINEERING COLLEGE

Name of the Experiment

(A)8 BIT DATA ADDITION

(B)8 BIT DATA SUBTRACTION

(C)8 BIT DATA MULTIPLICATION

(D)8 BIT DATA DIVISION

(E)16 BIT DATA ADDITION

(F)16 BIT DATA SUBTRACTION

(A)LARGEST ELEMENT IN AN ARRAY

(B)SMALLEST ELEMENT IN AN ARRAY

16 BIT DATA ADDITION

16 BIT DATA SUBTRACTION

16 BIT DATA MULTIPLICATION

16 BIT DATA DIVISION

(B)BIOS/DOS CALLS-FILE MANIPULATION

INTERFACING 8255 WITH 8085

INTERFACING 8253 TIMER WITH 8085

INTERFACING 8279 WITH 8085

SRINIVASAN ENGINEERING COLLEGE

INTERFACING 8251 WITH 8085

STEPPER MOTOR CONTROL

STEPPER MOTOR INTERFACING WITH 8051

SRINIVASAN ENGINEERING COLLEGE

ALU (Arithmetic Logic Unit):

Auxillary carry flag

SRINIVASAN ENGINEERING COLLEGE

Timing and control unit

microprocessor and peripherals. The control signals RD (read) and WR (write)

Instruction register and decoder

SRINIVASAN ENGINEERING COLLEGE

Address bus it is a group of 16-bit lines generally identified as A0 A15.

Control bus it consist of various single lines that carry synchronizing

SRINIVASAN ENGINEERING COLLEGE

1(A). 8 BIT DATA ADDITION

Initialize memory pointer to data location.

SRINIVASAN ENGINEERING COLLEGE

SRINIVASAN ENGINEERING COLLEGE

Transfer first data to

SRINIVASAN ENGINEERING COLLEGE

1(B). 8 BIT DATA SUBTRACTION

Initialize memory pointer to data location.

SRINIVASAN ENGINEERING COLLEGE

SRINIVASAN ENGINEERING COLLEGE

Transfer first data to

SRINIVASAN ENGINEERING COLLEGE

1(C). 8 BIT DATA MULTIPLICATION

Initialize memory pointer to data location.

SRINIVASAN ENGINEERING COLLEGE

[A] [A] +[M]

SRINIVASAN ENGINEERING COLLEGE

SRINIVASAN ENGINEERING COLLEGE

Transfer first data to

Clear C reg for carry

SRINIVASAN ENGINEERING COLLEGE

1(D). 8 BIT DIVISION

SRINIVASAN ENGINEERING COLLEGE

SRINIVASAN ENGINEERING COLLEGE