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Digital Electronics
Chapter 8. NMOS Logic
By:
B
y: FARHAD
FARHAD FARADJI,
FA
ARA
ADJI, Ph.D.
Ph.D.
Assistant Professor,,
Electrical and Computer Engineering,
Engineering
K. N. Toosi University of Technology
http://wp.kntu.ac.ir/faradji/DigitalElectronics.htm
Reference:
DIGITAL INTEGRATED CIRCUITS: ANALYSIS and DESIGN, 2005,
John E. Ayers
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8.1. Introduction
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fo
orm
mula pr
redicts 2 solutions.
solutio
ons.
Quadraticc formula
predicts
Solution with plus sign is nonphysical and must be discarded.
VOL depends on ratio of device transconductance parameters but not
their absolute values.
Both devices can be scaled up or down in size without affecting VOL.
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Dissipation
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Dissipation
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Dissipation
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Dissipation
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Dissipation
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Dissipation
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9 f is switching frequency.
fre
eque
ency.
9 fCLK is clock frequency.
equency.
9 is switching activity: (<1)
9 Actual switching frequency for any particular gate will be less than fCLK .
Overall dissipation is:
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tPHL:
Assume that rise time at input is negligible.
At t = 0+:
MNO will be saturated.
MNL will be linear.
rentss aare:
re:
Drain currents
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9 tPLH is:
proportional to CL ,
inversely proportional to current driving
capability of MNL.
9 tPHL is:
directly proportional to CL,
inversely proportional to current driving capability of MNO.
As a first approximation, is also inversely proportional to VDD.
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