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IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMSII: EXPRESS BRIEFS, VOL. 55, NO. 3, MARCH 2008

Design Techniques of CMOS Ultra-Wide-Band


Amplifiers for Multistandard Communications
Tommy K. K. Tsang, Kuan-Yu Lin, and Mourad N. El-Gamal

AbstractThis paper presents design techniques of CMOS


ultra-wide-band (UWB) amplifiers for multistandard communications. The goal of this paper is to propose a compact, simple,
and robust topology for UWB low-noise amplifiers, which yet consumes a relatively low power. To achieve this goal, a common-gate
amplifier topology with a local feedback is employed. The first
amplifier uses a simple inductive peaking technique for bandwidth
extension, while the second design utilizes a two-stage approach
with an added gain control feature. Both amplifiers achieve a flat
bandwidth of more than 6 GHz and a gain of higher than 10 dB
with supply voltages of 1.82.5 V. Designs with different metal
thicknesses are compared. The advantage of using thick-metal
inductors in UWB applications depends on the chosen topology.
Index TermsUltra-wide-band (UWB), CMOS integrated circuits, low-noise amplifier (LNA).

I. INTRODUCTION

HE ultra-wide-band (UWB) technology is experiencing a


rebirth in the wireless arena, since the U.S. Federal Communications Commission (FCC) opened up a 7.5 GHz of unlicensed spectrum for commercial applications in the United
States in early 2002 [1]. The potential of the UWB technology
for future wireless applications is multifaceted, ranging from
Mb/s) wireless multimedia applicahigh data rate (i.e.,
Kb/s) very low-power sensing
tions, to low data rate (i.e.,
and tracking applications [2]. In particular, the quest for lowcost system-on-a-chip (SoC) wireless systems has resulted in
a remarkable growth of interest in CMOS UWB designs (e.g.,
[3][13]).
There are several advantages in using an UWB technology,
compared to traditional wireless technologies. An UWB signal
behaves as a noise-like signal, which has low probability of interception and detection by unintended radio systems, due to
its low equivalent isotropically radiated power (EIRP) emission
limit. Besides, due to their wide bandwidth nature, UWB signals have excellent multipath immunity and less susceptibility
to interferences from other radios.
In wireless multistandard applications, it is highly desirable
to incorporate new communication standards such as the UWB
Manuscript received August 14, 2007; revised November 10, 2007. This work
was supported in part by the Canadian Microelectronics Corporation (CMC), the
Natural Sciences and Engineering Research Council of Canada (NSERC), and
the Regroupement Stratgique en Microsystmes du Qubec. This paper was
recommended by Guest Editor A. Tasic.
The authors are with the Department of Electrical and Computer Engineering, McGill University, Montreal, QC H3A 2A7, Canada (e-mail:
tommy.tsang@mail.mcgill.ca;
kuan-yu.lin@mail.mcgill.ca;
mourad.elgamal@mcgill.ca).
Digital Object Identifier 10.1109/TCSII.2008.918925

technology, while maintaining backward compatibility with


existing standards. For these multistandard radios, the overall
power consumption, chip size, and cost can be significantly
reduced by multiplexing all the antennas and pre-select filters
to a single UWB low-noise amplifier (LNA ) instead of using
several standard specific LNAs.
This paper presents two multistandard UWB LNA: a wideband dc to 6-GHz low-power inductive peaking common-gate
amplifier with local feedback (CGF), and a wide-band dc to
7-GHz gain controllable two-stage amplifier. They are designed
and fabricated in a standard CMOS 0.18- m process targeting
very low-power consumption applications.
In Section II, a review of existing UWB amplifier designs is
presented. Circuit designs for the LNA presented here are examined in details in Section III. The paper will conclude with a
performance summary of fabricated chips, as well as a discussion of the use of thick metal inductors in UWB applications.
II. REVIEW OF UWB AMPLIFIER DESIGNS
In the literature, both nonfeedback [3][9] and feedback
LNA topologies [10][13] have been implemented to meet
the different UWB receiver specifications. Examples of nonfeedback UWB amplifier topologies are distributed amplifiers
(DAs), which utilize several parallel transistors and artificial
transmission lines to periodically combine the gain of each
stage on the output line. This topology offers good wide-band
input impedance matching, a relatively flat gain, a high IIP3,
and a good group delay over wide-band frequencies (e.g., dc
to 40 GHz) [3][6]. However, CMOS DA often consume high
power, due to their low quality on-chip passives. With careful
design optimization, UWB amplifiers with good performance
dB,
dB) and moderate power
(e.g.,
mW) can be implemented, as demonstrated
consumption (
in [6].
For low-cost, high-integration, and low-system-complexity
applications, a single wide-band LNA is generally preferred. By
using a multisection reactive network such as a Chebyshev filter
[7], [8], conventional narrowband techniques for a common
source LNA can be extended to wide-band applications, with
mW). However, this
moderate power consumption (i.e.,
topology requires a large number of lossy passive components
at its input, thus limiting noise performance and increasing
silicon area.
Another popular wide-band topology of interest, due to
its simplicity, is the common gate amplifier [9], [10]. By
connecting the input signal to the source of a common gate
amplifier, wide-band matching and gain can be achieved,
through proper setting of the transconductance of the gain

1549-7747/$25.00 2008 IEEE

TSANG et al.: DESIGN TECHNIQUES OF CMOS UWB AMPLIFIERS FOR MULTISTANDARD COMMUNICATIONS

transistor. However, for an input of 50 , the required input


has to be 20 mS, which translates into
transconductance
high power consumption. Besides, wide-band matching often
degrades at high frequency due to parasitics.
In addition to the multisection reactive network and the
common gate amplifier, a feedback topology can be used to
enhance the wide-band characteristics of UWB LNAs. Many
variations of wide-band resistive feedback LNAs have been
implemented [10], [11]. A resistive feedback offers higher
stability and gain bandwidth enhancement. However, the noise
performance is limited. Alternatively, an UWB reactive feedback implementation provides better noise performance and
an increase in linearity [12]. However, a larger silicon area is
required.
III. LOW-POWER UWB AMPLIFIER TOPOLOGY
Most of the existing UWB amplifier designs are either inevitably complex, with multiple LC elements, or consume a relmW), which is not suitable for
atively high power (e.g.,
low-power applications. The goal of this section is to propose
a compact, simple, and robust topology for UWB LNAs, which
yet consumes a relatively low power (i.e., under 10 mW).
Wide-Band Input MatchingThe use of a common-gate
(CG) amplifier is a simple technique to achieve wide-band input
matching, however, as mentioned earlier, it requires high power
to match for 50 , since the input impedance is inversely proportional to its
. In other words, when biased under a low
current condition, the input impedance of a CG amplifier is
much higher than 50 . In order to reduce the input impedance
under low-power/current conditions, a local feedback stage can
be added at the input [13]. The schematic of a common-gate amplifier with a local feedback stage is shown in Fig. 1. We refer
to it here as the CGF topology.
According to small-signal analysis, the input impedance of
the CG amplifier with local feedback is given by
(1)
is the voltage gain of the local feedback
where
stage.
The addition of local feedback reduces the input impedance
, when
by the amount of its own voltage gain (i.e.,
compared to the CG stage. Qualitatively, it can be viewed as a
.
CG stage with a boosted transconductance of
One important note here is that the local feedback stage inherently adds a zero, which causes a peaking in the frequency
response of the system. The peaking frequency can be approximated by
(2)
where
and
are the parasitic gatesource and
and
, respectively.
gatedrain capacitances of
To avoid excessive peaking in the frequency response,
should be set such that a flat band gain is achieved. Since the
is much smaller than those of the other
contribution of
and
), the resistance
and the sizing
two terms (i.e.,

215

Fig. 1. (a) Conceptual view of the inductive peaking technique. (b) Schematic
of the inductive peaking CGF for UWB applications.

of
should be designed such as to place the zero at the frequency which would achieve the desired maximally flat bandhas a negative impact
width extension. Note that decreasing
on the voltage gain of the local feedback, as well as on the input
impedance (1), which has to be compensated for by increasing
of
. This is clearly not desirthe transconductance
able from a power consumption perspective. Hence, reducing
(i.e., the sizing of
) is the preferred method to push the
zero up in frequency. However, excessive reduction of the size
(resulting in a smaller
) would lead to an unacceptof
able high input impedance and excessive channel thermal noise.
has to be chosen carefully, to meet
Therefore, the sizing of
both the noise figure and power consumption specifications.
Bandwidth Extension TechniquesCombined with parasitic capacitances, purely resistive loads would result in limited
high frequency performance. Simulations have shown that the
gain roll-off starts as early as 4 GHz, due to significant nodal parasitic capacitances, contributed by both the gain and buffer transistors. This bandwidth is clearly insufficient, and bandwidth extension techniques are needed. In the first design presented here,
a simple inductive shunt peaking approach is used. The detailed
schematic is shown in Fig. 1. This technique enhances the bandwidth of the amplifier by transforming the frequency response
from a single pole system to one with two poles and a zero,
time conwhere the zero is determined primarily by the
stant for bandwidth enhancement. The shunt peaking inductor
and the resistor
in Fig. 1 are designed to achieve a
60% bandwidth extension with an optimum group delay, which
is desirable for optimizing pulse fidelity in broadband systems
[14]. The final design shown in Fig. 1 has a flat band gain above
6 GHz, which is sufficient to cover both the WLAN and the
lower band of the UWB standards.
The second bandwidth extension technique explained here
utilizes a two-gain stage approach, where a wide-band first gain
stage is followed by a narrowband second stage [9]. The conceptual view of this technique and the design schematic are shown
in Fig. 2.
In this design, the first stage is implemented by a wide-band
CGF amplifier with a 3-dB cutoff frequency at around 5 GHz.1
The narrowband second gain stage is designed to have the LC
1Note that this cutoff frequency is higher than the one in the single-stage design, because the second gain stage in Fig. 2 contributes less parasitic capacitances than the buffer stage in Fig. 1.

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IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMSII: EXPRESS BRIEFS, VOL. 55, NO. 3, MARCH 2008

Fig. 2. (a) Conceptual view of the bandwidth extension technique in a twostage amplifier design. (b) Schematic of a gain controllable two-stage amplifier
design for multistandard applications

Fig. 3. Microphotographs of the UWB amplifiers. (a) Single-stage inductive


peaking CGF amplifier. (b) Two-stage gain controllable CGF amplifier.

elements resonate at 7 GHz. The combination of both frequency


responses results in bandwidth extension.
In order to ensure a flat bandwidth extension, the peak gain
of the narrowband stage should be equal to the gain of the wideband stage. This can be achieved by properly sizing the transistor of the second stage and its bias current level.
To satisfy the dc bias point of the second stage, a dc shifting
is needed [Fig. 2(b)]. By controlling the gate
transistor
, the bias current and gain of the second stage
voltage of
can be tuned. This provides an added gain-control feature for
this topology.
IV. AMPLIFIERS PERFORMANCE
With a power budget of less than 10 mW, an upper limit for
and current in the CGF amplifier is set.
the transconductance
Based on the discussion in Section II, a minimum sizing of
that satisfies the gain requirement is chosen, while the maximum
allowable sizing of
, within the power budget limit, is used.
is approximately three times larger than
The final sizing of
. The voltage gain of the local feedback is set to be six, which
is again constrained by the power budget, as well as the desired
input impedance level. With a supply voltage of 1.8 V, the core
power consumption is 5.8 mW. This CGF amplifier is used for
both the first and second UWB amplifiers in this work.
The second gain stage is a narrowband common source amplifier with a nominal bias current of 1 mA at 1.8 V. An ac ground
is connected to the source of transistor
coupling capacitor
, as shown in Fig. 2. The buffer stage, which is designed to
drive a 50- external load for testing purposes, is independently
biased by a current mirror. This results in a 6-dB difference between the measured power gain at the output of the test setup
and the actual voltage gain of the LNA core.
Fig. 3 and 4 show the microphotographs and the S-paramand
) of the two UWB amplifiers, respectively.
eters (
Both designs are implemented in a standard CMOS 0.18- m
process. Including the buffer, but excluding all testing pads, the
single-stage inductive peaking amplifier occupies an active area
of 0.14 mm , while the two-stage CGF amplifier consumes an
area of 0.17 mm . A ratioed design approach, with the same
unit transistor and resistor fingers, is employed to minimize the
effect of mismatch and process variations on the amplifiers performances.

Fig. 4. Measured S and S plots of: (a) the single-stage inductive peaking
CGF amplifier and (b) the two-stage gain controllable CGF amplifier.

The measured
and
plots of the single-stage inductive
peaking CGF amplifier are shown in Fig. 4(a). A good widedB) is achieved across
band input matching (i.e.,
the 110 GHz band. With a power consumption of 5.8 mW
at 1.8 V, a 6-GHz flat-band gain of 12 dB is achieved, with a
3-dB cutoff frequency above 7 GHz. The amplifier continues
to provide a wide-band gain of higher than 7 dB with good input
matching at 1.4-V supply. This demonstrates the effectiveness

TSANG et al.: DESIGN TECHNIQUES OF CMOS UWB AMPLIFIERS FOR MULTISTANDARD COMMUNICATIONS

217

TABLE I
PERFORMANCE SUMMARY OF THE TWO CMOS UWB AMPLIFIERS IN THIS WORK, AND A COMPARISON WITH [13]

Fig. 6. Measured IIP2 and IIP3 plots of the two-stage gain controllable CGF
amplifier.
Fig. 5. Measured noise figure of the two UWB amplifiers in this work.

of this approach for multistandard applications. The measured


noise figure across the 26 GHz band is ranging from 4.4 to
6.7 dB, as shown in Fig. 5. Two-tone tests at 3 GHz with a
tone spacing of 1 MHz are performed to measure intermodulation (IM) distortions of the amplifier. A center frequency of
3 GHz is chosen because both the IM2 @ 6 GHz and IM3 @
3 GHz fall within the flat-band region of the amplifier. From the
IM measurements, the second-order (IIP2) and the third-order
(IIP3) intermodulation intercept points are 7 and 13.5 dBm,
respectively. The measured 1-dB compression gain
is
23 dBm. The measured group delay is almost identical to the
one shown in Fig. 7. The performance of this amplifier design
is summarized in Table I.
and
plots of the twoFig. 4(b) shows the measured
stage UWB amplifier. At a 2.5-V supply, the amplifier has a
flat band gain of 13 dB over a 7-GHz bandwidth. The 3dB
cutoff frequency is at 8.5 GHz. By controlling the gate voltage
in the second gain stage [Fig. 2(b)], a 5-dB conof transistor
trol of the overall amplifier gain is achieved, without affecting
the quality of the input matching. An excellent input reflecdB is achieved across the full
tion coefficient of

Fig. 7. Measured group delay of the two-stage gain controllable CGF amplifier.

110-GHz frequency band. The measured noise figure (Fig. 5)


is 4.14.8 dB between 27 GHz. It is approximately 0.61 dB
higher than the expected value. The main causes of this discrepancy are the inaccurate modeling of the transistors gate noise
and the slight reduction in the overall gain of the amplifier. From
, IIP2,
the two-tone test, as shown in Fig. 6, the measured
and IIP3 are 23.7, 7.5, and 13 dBm, respectively. The measured group delay is as shown in Fig. 7. Both designs have good

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IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMSII: EXPRESS BRIEFS, VOL. 55, NO. 3, MARCH 2008

Fig. 8. Measured S21 and S11 comparison plots of thick and standard metal
inductor implementations of a single inductive peaking CGF amplifier.

reverse isolation
lower than 32 dB and output reflection
lower than 13 dB, across the band of interest.
coefficient
The performance of this design is also summarized in Table I.
A comparison to a recent LNA in the literature [13] is included
in Table I.
Thick top metal options in modern CMOS processes are often
used in narrowband RFIC designs, as they enable the implementation of high-Q inductors for power reduction and performance
enhancement. However, this is not necessarily true for UWB designs, due to the inherent wide-band nature of the system. In
fact, the benefits of using high-Q inductors in UWB designs depend on the chosen topology. For example, in the single-stage
CGF amplifier of this work (Fig. 1), the inductor
is only
used for frequency peaking, and its series resistance can be
of the amplifier. Hence,
easily absorbed by the resistive load
high-Q inductors are not necessary in this case. Fig. 8 shows the
and
comparison plots of the thick and stanmeasured
dard inductor implementations of the inductive peaking CGF
amplifier. No significant difference is observed between the two
responses, under the same biasing conditions. The thick and
standard metal inductors used are estimated to have Q-factors
of 10 and 6 at 5 GHz, respectively. The Agilent ADS EM-simulator was used to obtain these metrics, based on the details of
the process used.
In the case of the two-stage UWB design in this work (Fig. 2),
the thick metal inductor has a significant effect on power reduction, because it is used as an inductive load in the narrowband
amplifier of the second stage. Results have shown that, for the
same gain, there is a 20% reduction in power consumption with
the use of high-Q inductors when compared to the standard implementation.

V. CONCLUSION
We have demonstrated in this work, two low-power CMOS
UWB amplifiers for multistandard communications. Both
designs employ a common-gate amplifier topology with
local feedback to achieve robust wide-band, 110-GHz, input
impedance matching. Two different bandwidth extension techniques, namely inductive peaking and a two-stage topology,
were examined and discussed in detail. Both UWB amplifiers
have a flat bandwidth of over 6 GHz and a gain of higher than
10 dB, while consuming only 5.8 and 9.3 mW, respectively,
making them among the lowest power 3.110.6-GHz UWB
LNAs reported to date. A 5-dB gain-controllability is incorporated in one of the amplifiers, without affecting the quality of
the input matching.
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