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IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMSII: EXPRESS BRIEFS, VOL. 55, NO. 3, MARCH 2008
I. INTRODUCTION
TSANG et al.: DESIGN TECHNIQUES OF CMOS UWB AMPLIFIERS FOR MULTISTANDARD COMMUNICATIONS
215
Fig. 1. (a) Conceptual view of the inductive peaking technique. (b) Schematic
of the inductive peaking CGF for UWB applications.
of
should be designed such as to place the zero at the frequency which would achieve the desired maximally flat bandhas a negative impact
width extension. Note that decreasing
on the voltage gain of the local feedback, as well as on the input
impedance (1), which has to be compensated for by increasing
of
. This is clearly not desirthe transconductance
able from a power consumption perspective. Hence, reducing
(i.e., the sizing of
) is the preferred method to push the
zero up in frequency. However, excessive reduction of the size
(resulting in a smaller
) would lead to an unacceptof
able high input impedance and excessive channel thermal noise.
has to be chosen carefully, to meet
Therefore, the sizing of
both the noise figure and power consumption specifications.
Bandwidth Extension TechniquesCombined with parasitic capacitances, purely resistive loads would result in limited
high frequency performance. Simulations have shown that the
gain roll-off starts as early as 4 GHz, due to significant nodal parasitic capacitances, contributed by both the gain and buffer transistors. This bandwidth is clearly insufficient, and bandwidth extension techniques are needed. In the first design presented here,
a simple inductive shunt peaking approach is used. The detailed
schematic is shown in Fig. 1. This technique enhances the bandwidth of the amplifier by transforming the frequency response
from a single pole system to one with two poles and a zero,
time conwhere the zero is determined primarily by the
stant for bandwidth enhancement. The shunt peaking inductor
and the resistor
in Fig. 1 are designed to achieve a
60% bandwidth extension with an optimum group delay, which
is desirable for optimizing pulse fidelity in broadband systems
[14]. The final design shown in Fig. 1 has a flat band gain above
6 GHz, which is sufficient to cover both the WLAN and the
lower band of the UWB standards.
The second bandwidth extension technique explained here
utilizes a two-gain stage approach, where a wide-band first gain
stage is followed by a narrowband second stage [9]. The conceptual view of this technique and the design schematic are shown
in Fig. 2.
In this design, the first stage is implemented by a wide-band
CGF amplifier with a 3-dB cutoff frequency at around 5 GHz.1
The narrowband second gain stage is designed to have the LC
1Note that this cutoff frequency is higher than the one in the single-stage design, because the second gain stage in Fig. 2 contributes less parasitic capacitances than the buffer stage in Fig. 1.
216
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMSII: EXPRESS BRIEFS, VOL. 55, NO. 3, MARCH 2008
Fig. 2. (a) Conceptual view of the bandwidth extension technique in a twostage amplifier design. (b) Schematic of a gain controllable two-stage amplifier
design for multistandard applications
Fig. 4. Measured S and S plots of: (a) the single-stage inductive peaking
CGF amplifier and (b) the two-stage gain controllable CGF amplifier.
The measured
and
plots of the single-stage inductive
peaking CGF amplifier are shown in Fig. 4(a). A good widedB) is achieved across
band input matching (i.e.,
the 110 GHz band. With a power consumption of 5.8 mW
at 1.8 V, a 6-GHz flat-band gain of 12 dB is achieved, with a
3-dB cutoff frequency above 7 GHz. The amplifier continues
to provide a wide-band gain of higher than 7 dB with good input
matching at 1.4-V supply. This demonstrates the effectiveness
TSANG et al.: DESIGN TECHNIQUES OF CMOS UWB AMPLIFIERS FOR MULTISTANDARD COMMUNICATIONS
217
TABLE I
PERFORMANCE SUMMARY OF THE TWO CMOS UWB AMPLIFIERS IN THIS WORK, AND A COMPARISON WITH [13]
Fig. 6. Measured IIP2 and IIP3 plots of the two-stage gain controllable CGF
amplifier.
Fig. 5. Measured noise figure of the two UWB amplifiers in this work.
Fig. 7. Measured group delay of the two-stage gain controllable CGF amplifier.
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IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMSII: EXPRESS BRIEFS, VOL. 55, NO. 3, MARCH 2008
Fig. 8. Measured S21 and S11 comparison plots of thick and standard metal
inductor implementations of a single inductive peaking CGF amplifier.
reverse isolation
lower than 32 dB and output reflection
lower than 13 dB, across the band of interest.
coefficient
The performance of this design is also summarized in Table I.
A comparison to a recent LNA in the literature [13] is included
in Table I.
Thick top metal options in modern CMOS processes are often
used in narrowband RFIC designs, as they enable the implementation of high-Q inductors for power reduction and performance
enhancement. However, this is not necessarily true for UWB designs, due to the inherent wide-band nature of the system. In
fact, the benefits of using high-Q inductors in UWB designs depend on the chosen topology. For example, in the single-stage
CGF amplifier of this work (Fig. 1), the inductor
is only
used for frequency peaking, and its series resistance can be
of the amplifier. Hence,
easily absorbed by the resistive load
high-Q inductors are not necessary in this case. Fig. 8 shows the
and
comparison plots of the thick and stanmeasured
dard inductor implementations of the inductive peaking CGF
amplifier. No significant difference is observed between the two
responses, under the same biasing conditions. The thick and
standard metal inductors used are estimated to have Q-factors
of 10 and 6 at 5 GHz, respectively. The Agilent ADS EM-simulator was used to obtain these metrics, based on the details of
the process used.
In the case of the two-stage UWB design in this work (Fig. 2),
the thick metal inductor has a significant effect on power reduction, because it is used as an inductive load in the narrowband
amplifier of the second stage. Results have shown that, for the
same gain, there is a 20% reduction in power consumption with
the use of high-Q inductors when compared to the standard implementation.
V. CONCLUSION
We have demonstrated in this work, two low-power CMOS
UWB amplifiers for multistandard communications. Both
designs employ a common-gate amplifier topology with
local feedback to achieve robust wide-band, 110-GHz, input
impedance matching. Two different bandwidth extension techniques, namely inductive peaking and a two-stage topology,
were examined and discussed in detail. Both UWB amplifiers
have a flat bandwidth of over 6 GHz and a gain of higher than
10 dB, while consuming only 5.8 and 9.3 mW, respectively,
making them among the lowest power 3.110.6-GHz UWB
LNAs reported to date. A 5-dB gain-controllability is incorporated in one of the amplifiers, without affecting the quality of
the input matching.
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