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for data, and moves data from system memory into fast
IA-32 processors.
Arch State
Arch State
Execution
Resources
Execution
Resources
L1 Caches
L1 Caches
APIC
APIC
Thermal Control
Thermal Control
Shared L2 Cache
Power Mgmt.
Coordination Logic
Core
Coordination Logic
Bus Interface
Intel Core2 Duo processors, based on Intel Core microarchitecture, include two complete execution cores, shared L2 cache,
and intelligent power management capabilities. These features
deliver significantly greater performance-per-watt over previousgeneration dual-core Intel processors.
against software-based attacks and helps protect confidentiality and integrity of data stored or created on the system.
Enables each application to run within its own space, protected
from all other software on the system.
Front-Side
Bus Speed
L2 Cache
Thermal
Design Power
VID
Tj Max
Package5
1066 MHz
1066 MHz
6 MB Unified
6 MB Unified
35 watts
35 watts
0.75 V-1.3 V
0.75 V-1.3 V
105 C
105 C
479 FC-BGA
478 FC-PGA
1066 MHz
1066 MHz
3 MB Unified
3 MB Unified
25 watts
25 watts
0.75 V-1.3 V
0.75 V-1.3 V
105 C
105 C
479 FC-BGA
478 FC-PGA
1066 MHz
6 MB Unified
17 watts
0.75 V-1.25 V
105 C
800 MHz
6 MB Unified
17 watts
0.75 V-1.25 V
105 C
1066 MHz
6 MB Unified
25 watts
0.75 V-1.3 V
105 C
800 MHz
3 MB Unified
10 watts
0.75 V-1.3 V
105 C
800 MHz
800 MHz
4 MB Unified
4 MB Unified
35 watts
35 watts
0.75 V-1.35 V
0.75 V-1.35 V
100 C
100 C
479 FC-BGA
478 FC-PGA
667 MHz
667 MHz
4 MB Unified
4 MB Unified
34 watts
34 watts
0.75 V-1.3 V
0.75 V-1.3 V
100 C
100 C
479 FC-BGA
478 FC-PGA
800 MHz
4 MB Unified
17 watts
0.75 V-1.3 V
100 C
479 FC-BGA
667 MHz
4 MB Unified
17 watts
0.75 V-1.1 V
100 C
479 FC-BGA
533 MHz
2 MB Unified
10 watts
0.75 V-0.975 V
100 C
479 FC-BGA
Product Number
45nm process technology
Printed in USA
0309/KSC/OCG/XX/PDF
Please Recycle
316663-012US