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The effect of the inversion channel at the AlN/Si interface on the vertical breakdown
characteristics of GaN-based devices

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2014 Semicond. Sci. Technol. 29 115012
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Semiconductor Science and Technology

Semicond. Sci. Technol. 29 (2014) 115012 (6pp)

doi:10.1088/0268-1242/29/11/115012

The effect of the inversion channel at the

AlN/Si interface on the vertical breakdown
characteristics of GaN-based devices
H Yacoub1, D Fahle1, M Finken1, H Hahn1, C Blumberg2, W Prost2,
H Kalisch1, M Heuken1,3 and A Vescan1
1

GaN Device Technology, RWTH Aachen University, Aachen, Germany

Institute of Semiconductor Technology, Duisburg Germany
3
AIXTRON SE, Herzogenrath Germany
2

E-mail: yacoub@gan.rwth-aachen.de
Received 23 May 2014, revised 18 July 2014
Accepted for publication 28 July 2014
Published 3 September 2014
Abstract

GaN-on-Si transistors attract increasing interest for power applications. However, the breakdown
behavior of such devices remains below theoretical expectations, for which the Si substrate is
typically made responsible. In this work, the effect of the thickness of an aluminum nitride buffer
layer on the vertical breakdown voltage, measured relative to a grounded silicon substrate, has
been investigated. A voltage-polarity-dependent breakdown mechanism has been observed. It
has been found that the breakdown in the positive bias voltage regime is initiated by carrier
injection, for which the carriers originate from an inversion channel formed between the epitaxial
layers and the p-silicon substrate. TCAD simulations have conrmed the proposed explanations,
and suggest that appropriate modication of the electronic structure at the AlN/silicon interface
could signicantly improve the vertical breakdown voltage.
Keywords: vertical breakdown, GaN-on- Silicon, inversion channel, asymmetric breakdown
(Some gures may appear in colour only in the online journal)
1. Introduction

thickness of GaN [2] and buffer compensation doping with

elements such as carbon or iron [4], the breakdown was still
found to be limited by vertical breakdown through the silicon
substrate [5]. This imposes serious design and processing
challenges for this technology towards higher operational
voltages. Understanding the mechanisms of vertical breakdown in GaN-on-Si devices plays a pivotal role in overcoming this limitation and enhancing device performance. As
a proposed mechanism, trap assisted-tunneling combined with
resistive hopping is believed to be the main current
mechanism during breakdown [6, 7]. However, to our
knowledge, the source of the carrier injected from the substrate has not been claried experimentally until now. Hence,
in this work, a detailed investigation of breakdown was
conducted with the analysis focusing on the epitaxial layer/
substrate interface. We show that the assymetric bandstructure results in polarity dependant IV characterisitcs. In

GaN devices grown on silicon substrates (GaN-on-Si) are of

increasing importance for electronic application. They will
enable the fabrication of power electronics modules such as
inverters and converters, with system efciencies beyond
those of current Si-based technology [1, 2]. Still, there remain
several challenges to be resolved such as the realisation of
enhancement mode devices [3], the suppression of the current
collapse phenomenon [4], and last but not least the
improvement of breakdown voltages, the latter challenge
mainly provoked by the Si substrates. However, the use of
large-area silicon substrates is vital in order to achieve a
competitive edge, also with respect to cost. Though possessing a great potential for high-power applications, so far,
GaN-on-Si-based transistors show properties below the
expectations when it comes to scaling up the breakdown
voltage. With attempts at increasing the epitaxial layer
0268-1242/14/115012+06$33.00

2014 IOP Publishing Ltd Printed in the UK

H Yacoub et al

Semicond. Sci. Technol. 29 (2014) 115012

Figure 1. Sample structure showing full epitaxial stack (Structure A),

20 nm AlN nucleation samples (Structure B) and standard p-dopded
silicon substrates (Structure C)

Figure 2. Breakdown dependence on AlN layer thickness (Structure

A). Shown are average values and standard deviation from several
measurements. Inset showing IV measurements on the 1 m thick
AlN samples

particular, we demonstrate that the inversion channel formation is responsible for the breakdown at the positive bias.
For the study of the AlN/Si interface a 20 nm thick AlN
nucleation layer was deposited on p-Si at 930 C after thermal
oxide removal (gure 1, structure B), AFM measurements
were done for the samples, giving a surface roughness RMS
of 1.1 nm, which is a clear indication that a closed layer is
grown. After local removal of the AlN, ohmic contacts were
deposited creating contact to the AlN/Si interface and the
silicon substrate simultaneously, thus forming van der Pauw
structures for conductivity and Hall measurements. The same
ohmic contacts were fabricated on bare silicon substrates for
the sake of Hall measurements calibration. Additionally, a Ni/
Au contact was deposited on top of the AlN as a Schottky
contact for capacitancevoltage (CV) measurements. Buffer
breakdown measurements on epitaxial structures were performed, in addition, Hall, CV and temperature-dependent
IV measurements were excuted on the 20 nm AlN nucleation
samples. All measurements were carried out with the silicon
substrate held at ground potential.

2. Experiment
All samples were grown in a planetary hot-wall metal-organic
vapor phase epitaxy (MOVPE) research system in a 10 2inch wafer conguration using standard precursors and carrier
gases. To remove any residuals from the reactor chamber, a
high-temperature bake (T = 1450 C) was performed before
every run. The native oxide of the p-type silicon substrate
(boron doped RSheet = 265 sq1) was removed by a thermal cleansing step at 920 C for 10 min under hydrogen
ambient and a pressure of 50 mbar. Afterwards, the temperature was raised to 970 C for AlN nucleation layer
(27 nm) growth, which was initiated by a short Al (TMAl)
pre-ow. The AlN buffer was divided into two sub-layers,
whereas the rst 240 nm were grown at a high V/III ratio and
the second at a low V/III ratio. The thickness of the second
sub-layer was adjusted to obtain total AlN thicknesses of
0.5 m, 1 m and 1.5 m, respectively. A 0.85 m thick Al
0.25Ga 0.75N layer was deposited on the HT-AlN buffer, followed by a 1.4 m thick GaN buffer, a 1 nm AlN spacer and a
28 nm Al 0.25Ga 0.75N barrier, (gure 1, sample structure A).
Deep mesa structures (of about 2.5 m) were etched
using a BCl3-based RIE process. Afterwards, Ti-Al-Ni-Au
ohmic contacts were evaporated and annealed at 830 C in
nitrogen atmosphere. Currentvoltage measurements were
carried out, for which positive and negative voltages were
applied to the top ohmic contact while contacting the silicon
substrate to ground via a highly conducting backside contact
(gure 1, structure A).
Currentvoltage characteristics in positive and negative
bias region were recorded to investigate the symmetry of the
current transport in the full structure. The breakdown voltage
was determined for both bias polarities, dened at a current
density of 1 A cm2 .

3. Results and Discussion

3.1. IV measurements

Figure 2 shows the IV-characteristics (inset) and the vertical

breakdown voltages of structure A for both positive and
negative polarity. It can be seen that the breakdown has an
almost linear dependence on the AlN thickness for the
negative bias. In the positive bias regime, the breakdown
appears to be independent of the AlN thickness, thus indicating the existence of a different limiting mechanism which
governs the breakdown voltage. This different behavior for
both polarities is also reected in the clearly asymmetric IV
characteristics. It can be seen that the two curve shapes are
distinct, indicating different conduction mechanisms. In
comparison to [6] it is also clear that the substrate doping
2

H Yacoub et al

Semicond. Sci. Technol. 29 (2014) 115012

Figure 3. A double-logarithmic plot (red) for negative bias showing

SCLC, and electric eld normalized current density versus square

root of electric eld (black) for positive bias indicating
PooleFrenkel

Figure 4. Temperature-dependent IV measurement showing

PooleFrenkel conduction. Inset showing emission barrier extraction
from the Y-axis intercept yielding 0.68 e V under the conduction
band of AlN.

plays an important role in the symmetry of the breakdown

voltage.
To further analyze the current mechanisms leading to
breakdown, current density was plotted as a function of the
applied voltage and of the square root of the electric eld
strength for both negative and positive bias voltages,
respectively, (gure 3). The double-log JV plot shows
clearly a square-law dependence of the current density in the
low bias voltage regime from about 40 V to 200 V, indicating a space charge limited current (SCLC) [8, 9]
mechanism in negative direction. Here electrons are being
injected from the top ohmic contact into the buffer layer and
current transport is limited by space-charge formation in the
low-mobility AlN layer. The current density actually scales
quite well with the third power of the AlN layer thickness, as
required by the MottGurney law [9]. The electron mobility
extracted from this is about 1 cm2 V. s1, which is a reasonable value for AlN. Nevertheless, this value is a coarse
approximation due to the inhomogeneous current distribution
in the buffer which makes it difcult to calculate the effective
current density. On the other hand the semi-log plot of the
electric eld normalized current density versus the square root
of the electric eld (calculated by assuming that the entire
voltage drop over the AlN layer stack) shows almost constant
current and a linear increase beyond 1.1(kV cm)1 2 which is

was investigated more closely. To analyze the effect of the

interface on the conduction mechanism, structure B with
20 nm AlN grown on p-doped silicon was examined. Due to
the reduced thickness, the evaluation of breakdown behavior
can be performed at signicantly lower voltages as compared
to the whole epitaxial layer stack of structure A. Previous
publications have suggested that the formation of an inversion
channel at the AlN/Si interface is possible [7, 11]. It is
thought that the formation of such a channel can greatly affect
the breakdown behavior and the leakage currents in GaN-onSi devices. As shown by Umeda et al [11] the inversion
channel might be connected to ground via the samples edges,
thereby acting as current path during breakdown
measurements.
3.2. Hall measurements

To analyze the existence of an inversion channel in our device

structure, Van der Pauw structures on samples B (Hall) and C
(Hall) were analyzed. The IV characteristics (inset of gure 5
conrm that the contacts are reasonably linear to be used in 4point measurements. Due to the non negligible p-doping in
the silicon substrate, one has to account for both electron and
hole contributions in Hall measurements performed on sample structure B. Therefore, the bipolar formulae have to be
used [12]:

qE

the signature of PooleFrenkel conduction J E e Jo k B T

where Jo is related to the emission barrier height B by

Jo =

R sh =

[10] .
kBT
To investigate the transport in more detail in the positive
regime, temperature-dependent IV measurements were performed on the sample structure A. Figure 4 shows the current
density versus the square root of the electric eld for different
temperatures from room temperature to 423 K. From the
Arrhenius plot of Jo found as the extrapolated y-axis intercept,
the emission barrier for PooleFrenkel transport was found to
be 0.68 eV. With PooleFrenkel mechanism dominating the
positive breakdown current, the source of the injected carriers

q pp + nn
RH =

pp2 nn2

q pp + nn

(1)

(2)

Here Rsh is the measured effective sheet resistance, n and p

are the actual electron and hole concentrations, respectively,
n and p are the actual electron and hole mobilities,
respectively, and nally RH is the effective measured Hall
3

H Yacoub et al

Semicond. Sci. Technol. 29 (2014) 115012

Figure 6. : CV measurements of the 20 nm grown AlN on p-silicon

(NA = 1 1015 cm3) at 500 kHz (black curve). CV measurements

of AlN grown on p+ silicon (NA = 1 1019 cm3) showing the
effect of the depletion capacitance on the measurements (red curve)

in the silicon substrate (NA = 1 1015 cm3), the simple

shunt RC circuit model can not be directly applied to give
the value of AlN capacitance.
In standard silicon MOS-capacitance, at strong inversion,
the depletion capacitance is always much larger than the
insulator capacitance and hence is often neglected in the CV
analysis [15, 16]. The case here differs as the depletion width
in silicon is signicantly larger due to the much higher
channel carrier density (as seen from Hall measurements)
when compared to the p-silicon doping. This leads to a much
smaller depletion capacitance, which in turn becomes the
dominant capacitance at inversion regime. To reduce this
contribution, a similar experiment in which AlN was grown
on highly doped silicon substrates (red curve in gure 6 ),
the contribution of the depletion region is signicantly
reduced and the symmetry of the bell-shaped curve is
strongly enhanced, however leakage currents still prevent
the saturation of the capacitance at accumulation
(CAlN 400 nF cm2).

Figure 5. Temperature-dependent Hall measurement

coefcient. For the substrate hole mobility p and hole concentration p, the Hall results of sample C were inserted in
equation(1) & (2), and solved for electron carrier concentration n and mobility n according to:
nn2 = pp2

RH
qR sh2

(3)

and
nn =

1
p p
qR sh

(4)

With the corrections for the p-substrate measurements contribution, the Hall measurement results from sample B reveal
an electron channel at the interface with a temperature-independent density of about 3 1013 cm2 , and a mobility which
is slightly decreasing from 77 K to room temperature
(gure 5). This indicates a polarization-induced 2DEG
between the AlN and silicon substrate [13, 14].

4. Simulation

Synopsis TCAD [17] simulations were carried out in

accordance to the results obtained from the previous experiments. The complete epitaxial structure (structure A in
gure 1) was simulated taking into consideration the polarization difference between AlN and the silicon substrate. The
inset of gure 7 shows the band diagram at thermodynamical
equilibrium. The band structure indicates that the formation of
the inversion channel at the AlN/substrate interface as concluded from Hall and CV measurement results is a plausible
explanation. To simulate the current conduction, deep donor
traps were inserted in the AlN layer with PooleFrenkel
transport mechanism taken into account. The initial trap tting energy was used from the extracted value from the

3.3. CV measurements

CV measurements (black curve in gure 6) performed on

structure B (CV) show a typical bell-shaped curve in which
inversion takes place in the negative bias voltage range. This
proves the existence of the electron channel already without
applied bias conrming the result of the Hall measurement.
However due to the thin AlN layer large leakage currents
prevented the precise characterization of the accumulation
regime. At inversion, due to the depletion capacitance formed
4

H Yacoub et al

Semicond. Sci. Technol. 29 (2014) 115012

Figure 8. Simulated IV curves showing the effect of suppressing the

inversion channel by interface charges (red curve) in comparison to
the reference case (black curve)

Figure 7. : Measured (circles) versus simulated (solid line) IV

curves using the PooleFrenkel mechanism and the inversion

channel as the basis of the simulated structures. Inset shows the band
diagram simulated at thermodynamical equilibrium.

Elimination of this inversion layer may signicantly boost

their high-voltage performance. It was found that the breakdown is initiated by carrier injection from an inversion
channel between the substrate and the AlN nucleation layer,
which plays a much more pivotal role than the total AlN layer
thickness. This channel is formed due to the polarized nature
of AlN, and can already be formed without applied bias. The
data indicated that at positive biases, PooleFrenkel conduction is supporting the carrier transport. TCAD simulation
showed excellent agreement between the proposed theory and
the experimental measurements. Supported by simulations we
suggest that the suppression of the inversion channel can
improve the breakdown voltage. Further experiments are
needed to investigate if substrate choice, pretreatment or
growth conditions can be found to totally eliminate the
inversion layer and thus signicantly enhance the high-voltage capability of GaN-on-Si.

temperature-dependent IV measurements of 0.68 eV; trap

density was taken to be 1 1016cm3.
Figure 7 shows a t to actual measurements using the
simulated structures with a best t realized at a trap energy
0.75 eV under the conduction band. The simulation follows
the IV characteristics very well and predicts the onset of
breakdown behavior to a very good extent. This suggests that
the breakdown is governed by carrier injection from the Si
substrate to the AlN leading to carrier transport via
PooleFrenkel.
Based on the experimental results and the simulation
which consistently connect the inversion channel formation
with the breakdown behavior, the question arises if by eliminating the inversion channel between AlN and silicon substrate, carrier injection would be hindered leading to a higher
breakdown voltage.
An insight was obtained by simulating the total suppression of the inversion channel. This was realized by
inserting negative xed charges between the AlN and silicon
to compensate the AlN polarization. The IV characteristics
were simulated as before and compared to the original
simulations without additional interface charge. Figure 8
shows the two conditions, where in the case of interface
charge presence (i.e. total suppression of the inversion
channel), the breakdown occurs at almost double that of the
voltage in the reference case, demonstrating that the inversion
channel suppression can indeed enhance the high-voltage
capability.

References
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5. Conclusion
In this work we have provided the rst direct experimental
proof for the existence of an inversion channel at the AlN/Si
interface, which is shown to be detrimental for the vertical
breakdown characteristics of GaN-on-Si structures.
5

H Yacoub et al

Semicond. Sci. Technol. 29 (2014) 115012

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