DESIGN AND CONSTRUCTION OF AN AUTOMATIC

ROOM LIGHT CONTROLLER WITH VISITOR COUNTER

BY

WADAWASINA SAMAILA ZIRA

04/15438/2

SUBMITTED TO

ELECTRICAL AND ELECTRONICS ENGINEERING PROGRAMME

OF
ABUBAKAR TAFAWA BALEWA UNIVESITY, BAUCHI
IN PARTIAL FULFILMENT OF THE COURSE
EE412 (PROJECT AND SEMINAR I)

UNDER THE SUPERVISSION OF

ENGR. AHMAD

DEDICATION
This project report is dedicated to my late father Mr. Zira Wadawasina and my
mum Mrs. Mary Wadawasina.

DECLARATON
I hereby declare that this project report was written by me and it is a record of my
own research work it has not been presented before in any previous application for a higher
degree. References made to published literature have been duly acknowledged

Sign

Date

CERTIFICATION

This project report entitled AUTOMATIC ROOM LIGHT CONTROLLER WITH

VISITOR COUNTER was carried out and written by Wadawasina Samaila Zira in partial
fulfilment of the course EE412 (project and seminar 1) of Abubakar Tafawa Balewa
University Bauchi and is approved as adequate in scope and content and as contribution to
Knowledge and literary presentation.

TABLE OF CONTENTS
Contents
Title page-

Page

Dedication-

Declaration-

Certification- -

Acknowledgement-

Abstract-

CHAPTER ONE: INTRUDUCTION

1.1General Introduction-

1.2 Statement Of The Problem-

1.3 Objectives-

1.4 Scope Of The Project-

1.5 Justification-

CHAPTER TWO: LITERATURE REVIEW

2.1 Review of projects on counters and switchesCHAPTER THRE
3.0 Design Analysis- -

--

3.1 Block Diagram-

3.2 Design of the Transmitter Unit- -

--

3.3 Design of the Receiver Unit-

3.4 Design of the Control Logic Unit-

3.5 Design of the Counter Unit-

3.6 Design of the Display Unit-

3.7 Design of the Switching and Load Units--

3.8 The Power Supply Unit- -

CHAPTER FOUR: TEST RESULT AND DISCUSSIONS

4.1 Test
4.2 Results
4.3 Discussion
CHAPTER FIVE: SUMMARY, CONCLUSION AND RECOMMENDATION
5.1 Summary
5.2 Conclusion
5.3 Recommendation

ACKNOWLEDGEMENT
My first thanks goes to Almighty God for His guidance and strength throughout the
period of this project. My second thanks goes to my supervisor Engineer Ahmad for his
support and directions in making the project a success. My gratitude also goes to my elder
brother Mr. Peter Z. Wadawasina for his financial support in the conduct of this project.
Finally I want to appreciate my friends and colleagues who in one way or the other have
lend their support during this researc

ABSTRACT
It has always been a challenge to count the number of people entering a public
facilities or a private room and at the same time avoiding the waste or energy in leaving the
electrical facilities ON when they are suppose to be OFF. This project consist of a sensor
circuit which produces the up/down clock, a logic circuit which processes the clock, an up
and down counter, a display circuit and a switching circuit which switches ON and/or OFF
the light when there is /no one in the room respectively.

Lists of figurex
Figure 3.1: Block Diagram of the Automatic Room Light with Visitor Count.13
Figure 3.2: The Transmitter14
Figure 3.3: The Receiver15
Figure 3.4: The Control Logic17
Figure 3.5: The Counter..
Figure 3.7: The Switching Unit
Figure 3.6: The Display Unit.
Figure 3.7: The Switching Unit.
Figure 3.8: The Power Supply Unit.

List of Tables....xi
Table 3.1: Function Table of SN7473..18
Table 3.2: Truth Table of the Switching Circuit

CHAPTER ONE: INTRUDUCTION

1.1GENERAL INTRODUCTION
In todays world we need to save electricity, our projects help us to achieve this
purpose. In this project the circuit counts the number of persons entering inside any room
like conference room, seminar hall or class room. The number of persons is displayed on a
seven segment display. When the number of person is equal to zero, then the fan or light is
turned off using a relay. The counter used is bi-directional, this means that, count will
increase by one when a person enters the room and vice versa when he leaves, therefore
when ever count is greater than or equal to one, the relay is turned on and respectively the
light or fan is turned on.
This project is useful because many times we come out of the room but forget to
switch OFF the light or fan which is electricity and power wastage, but we can avoid this
by using this project.

1.2 STATEMENT OF THE PROBLEM

Due to the role of counting in human life especially in order to determine the
quantity of certain parameter for recording and/or inspection purposes, it is imperative to
count and also to save power when not being used. But as we all know that some public
places have limited space for many intending users and lack measures of controlling the
lights and other electrical appliances therefore it is vital to have a means of knowing the
number of users at any given time and to ensure that power is adequately switched ON,
and OFF when not being used.

1.3 OBJECTIVES
At the end of the project, this design will be able to count the number of people
entering and going out of a room and at the same time taking control of switching ON and
OFF of the light. this project also aims at the minimization of power wastage since it
switches OFF the light when there is no one in the room.

1.4 SCOPE OF THE PROJECT

The system is made up of the following units; - sensors, monostable multivibrators,
J-k flip flop up/down decade counters, BCD decoder/drivers and seven-segment displays
OR Gates swthching transistor and a relay.
The power supply supplies the 12V DC required for the device. The sensors consist
of laser diodes which illuminate the surface of the LDR ; the 74LS192 up/down decade
counter is used to count up or down when either the entry or exit laser beam is blocked; the
7447 BCD/Decimal decoder/driver converts the BCD output of the counter into the
equivalent decimal format for the 7-segment display and also provides sufficient current to
drive the 7-segment display directly. The 555 timer monostable multivibrators are used to
trigger the counters. The common anode 7-segment display is used to display the decimal
digits. The maximum digit that can be displayed by the counter is 999 (nine hundred and
ninety nine) and entry and exit cannot be counted at the same instant.

1.5 JUSTIFICATION
At the end of the construction, a realization of an automatic switch and an up/down
counter was made and proper counting of the number of people entering and exiting the
room simultaneously. And if installed in the room, power could also be effective save.

CHAPTER TWO
LITERATURE REVIEW
The history of counter is as old as humanity, man has always looked for a way to
get accurate quantity of people, animals or things, so as a result of this, application of
counters vary widely. They are employed in banks for counting money; in medicine they
are designed to count the heart beat, in cinema, houses they count people, in shaft encoders
they measure speed and in library they count number of users.
Different methods have been employed in the past for the construction of counters
by different people. some used discrete components while others used digital components.
The discrete components and digital used vary from one design to another.
Umar (2008) designed a library counter which makes use of a 741 operational
amplifier and phase locj loop(PLL) in the realization of the transducer ection that sends
pulse tto the counter.this amplifier is more costly than a single transistor that can do the
same job of amplification. The phase lock loop(PLL) of Umar is good but not as better as
some digital integrated circuits. selection of time was not easily realized in the project.
Gidado 2008, also designed a digital up/down counters for library users. in the
design he used he used six 555time IC, two LM567, two LM 741. Seven resistors in the
receiver section of the transducer two rheostat, six capacitors for the transducer section,
after his design it was difficult adjusting the to count as required. It counted but some time
it was irregular. The use of rheostat was to adjust the frequencies, but it was very easy to
adjust. Also the transducer cost much more than such realization could take if proper
attention was paid in the circuit design.
Moye (2008), in his design of a shaft encoder which uses counter as well, used a
better transducer. His transmitter did not contain 555 timer IC, only infrared transmitter
with 47k pull down resistor, connected to 4082 IC which serves as comparator. Analysis

showed that a design of up/down counter can take a transmitter which is far less in cost
than that of Gidado (2008).
The transducer of Moye (2008) can also be used instead of 4082 IC comparing the
variation of the light falling on the photo transistor to determine the speed of shaft, a
monostable can be built to take care of peoples movement that is not as fast as shaft
movement.
Uche (2010) designed a better up/down counter but his counter did not use the
same door for entrance and exit and did not have a switch to control the light system.
Donaldson, P. (2009) designed a counter using an LCD display. This method is
more esthetical, compact and cheaper since it involves the use of a microcontroller and an
LCD display.
It was the analysis if these people work that led to the efficient, simple and cost
effective transducer that is achieved in this present project also the designs sited above are
for large buildings which can accommodate large numbers of people. However this design
is intended for smaller buildings with less capacity (i.e. rooms which can accommodate not
more than 99 people at a time).

CHAPTER THRE
3.0 DESIGN ANALYSIS
This work deals with the design and construction of an automatic room light
controller with visitor counter. For simplicity and better understanding, the design of the
automatic room light controller with visitor counter was carried out in modules that
represent the blocks that make up its block diagram.

3.1

BLOCK DIAGRAM
The block diagram of the automatic room light with visitor count is as shown in fig.

3.1. It is made up of eight blocks, that is, the transmitter, the receiver, the control logic, the
counter, the display, the switching circuit, the load and the power supply.

Figure 3.1: Block Diagram of the Automatic Room Light with Visitor Count

3.2

DESIGN OF THE TRANSMITTER UNIT

The transmitter consists of two similar modulated laser light sources. Each is built

around the laser diode and a series pull up(current limiting) resistor as shown in fig. 3.2.

TO VCC

R1
2.2k

D1
LED

Figure 3.2: The Transmitter

3.3

DESIGN OF THE RECIEVER UNIT

Since there are two transmitters, there are two receivers, each using a light dependent

resistor (LDR) to sense the laser signal generated by the transmitter at 2MHz. The LDR is
connected to a series resistor to form a voltage divider circuit whose output goes low when
there is an interruption in the laser signal shone on the LDR and returns back to high when
the interruption is removed. This is used to trigger a 555 timer connected in its monostable
(one-shot) mode so as to provide a pulse of about 1 second. The receiver is as shown in fig.
3.3 below.

TO VCC

R2
1.0

LDR1
4
LDR R

VCC

U1
Q
DC

TR

RV1

C2

3
output
7

CV

GND

10k

TH

6
555

C1
2u2

100n
100k

Figure 3.3: The Receiver

Specifications:
the LDR (voltage divider) circuit is to trigger the 555 timer one shot
triggering should be when the laser ray incident on LDR is interrupted
when triggered the 555 timer should give an output for a second

Choice of Components:
For the voltage divider circuit, the LDR is chosen to be PGM5639D with R DARK =
10M when no light shines on it R LIGHT = 30 ~ 90) when no light shines on it. The value
of the series resistor, R1, required to give the trigger voltage, VT, of the 555 timer
1
V T V CC
3

is given by
R 1

R DARK 10 106
=
=5 M
2
2

Therefore, R1 is chosen to be 5M and for precision and sensitivity, it is chosen to be

variable.
For the 555 one shot circuit, the duration of the pulse also called the time period, T, is
determined by
T =1.1 R 2C 1
Therefore, choosing T = 1s and C1 = 10F, we have
R 2=

T
1
=
=90909.09 10 k
1.1C 1 1.1 10 106

For stability, data books give the value of C2 as 0.01F.

3.4

DESIGN OF THE CONTROL LOGIC UNIT

The control logic accepts the signals from the receiver and decides whether to

provide an up clock signal or a down clock signal. It is built around two JK flip-flops each
connected to detect an input sequence. The sequence is that if the first receiver comes ON
first, an up clock is generated and if the second receiver comes ON first, a down clock is
generated. The flip-flop circuit that detects these input sequences is as shown in fig. 3.4.
Specifications:
all clock outputs should be HIGH at idle times

 the up clock should momentarily go LOW when the first receiver comes ON before
the second receiver

U3:A

U2:A

74LS73

3
2

12
7400

U3:B

CLK
K

13

4
6
UP CLOCK

14
FROM
RX1

7400

U2:B

U3:C

74LS73

10
8

9
7400

CLK
Q

10

7
FROM
RX2

U3:D
13
11

DOWN CLOCK

12
7400

Figure 3.4: The Control Logic

the down clock should momentarily go LOW when the second receiver comes ON
before the first receiver
Choice of Components:
The SN7473 dual J-K flip-flop with clear with the function table of table 3.1 is
chosen to perform the task of the control logic.

Table 3.1: Function Table of SN7473

INPUTS
CLR
CLK

OUTPUTS

TOGGLE

From the function table, it can be seen that with the

K-input Low;
at reset or clear, Q is Low
the clear input is active Low
if J is Low before the clock becomes High, Q

retains its previous value

if J is High before the clock becomes High, Q becomes High regardless of its
previous value
Hence, for the circuit to function according to specifications,
the K-inputs (1K and 2K) of both flip-flops, U1A and U1B, must be grounded
the J-input (1J) and Clock input (1CLK) of U1A are respectively connected to the
outputs of the first and second receivers for up clock generation
the J-input (2J) and Clock input (2CLK) of U1B are respectively connected to the
outputs of the second and first receivers for down clock generation
since both outputs need to be High during idle times, they are taken from the Q
outputs (1Q and 2Q)
both flip-flops need to be cleared after a sequence is recognized, hence both Q
outputs are fed back to the clear (CLR) inputs
to increase the momentary Low period, the feedback is made through the propagation
delay of two NAND gates connected as NOT gates in series for each flip-flop.

3.5

DESIGN OF THE COUNTER UNIT

The record of the number of persons inside the room is kept by the counter which

takes its input from the control logic. It is made up of a 74193 up/down counter which can
be manually reset. When an up clock signal comes in the counter counts up, and when a
down clock signal comes in it counts down. The counter unit is as shown in fig. 3.5.

TO VCC

U4
R3
10k
FROM UP
CLOCK

15
1
10
9
5
4
11
14

FROMDOWN
CLOCK

D0
D1
D2
D3

Q0
Q1
Q2
Q3

UP
DN
PL
MR

TCU
TCD

3
2
6
7

TO
DISPLAY

12
13

74192

Figure 3.5: The Counter

Specifications:
the counter should be able to count up and count down
it should have two inputs; the up and the down clock signals
it should have a Binary Coded Decimal (BCD) output
it should be manually resettable

Choice of Components:
The SN74192 Synchronous BCD Up/Down Counter with dual clock and clear is

chosen to be the counter. And from the data book, its typical clear, load, and count
sequences (see Appendix) suggests that
the up count mode is only operational when the down clock input is high
the down count mode is only operational when the up clock input is high
the clear input is active high
the load input is active low
Thus since the outputs of the control logic are both High at idle times,
the up clock out from the control logic is directly connected to the up input of the
counter
the down clock out from the control logic is directly connected to the down input of
the counter
the load input is connected to Vcc via the current limiting resistor R1
the clear input is connected to ground through the normally closed (NC) contact of
manual reset switch S1
the clear input is also connected to Vcc through the normally open (NO) contact of
S1 and R1 to provide for manual resetting
the value of the current limiting resistor with high level input voltage V IH taken as
3V, is given by
R 1=

3.6

V CCV IH
53
=
=50 k
I IH
40 106

DESIGN OF THE DISPLAY UNIT

The display consists of a 7448 BCD to seven segment display decoder couple to a

common cathode LED seven segment display IC by resistors. Its function is to display the
count of the number of persons in the room kept by the counter and it is as depicted in fig.

TO VCC

TO VCC

R4

R5

10k

2.2k

U5
FROM
CUONTER

7
1
2
6
4
5
3

A
B
C
D
BI/RBO
RBI
LT

QA
QB
QC
QD
QE
QF
QG

13
12
11
10
9
15
14

74LS47

3.6.

Figure 3.6: The Display Unit

Specifications:
receive BCD input from the counter
convert BCD to seven segment display code
display the converted seven segment display code

Choice of Components:
The SN7448 BCD-to-Seven-Segment Decoder and Driver was chosen to convert the
BCD to seven segment display code and from its function table,
the ripple blanking input RBI must be high to display decimal zero
the blanking input BI must be high to display to display 0 through 15
the lamp test input LT must be high to display to display 0 through 15
the outputs are active high
Therefore, a common cathode seven segment display IC is chosen to display the seven
segment codes generated by the SN7448 and the following connections must be made to

achieve specifications;
BI, RBI and LT inputs are connected to Vcc through a current limiting resistor R1
the value of R1 with high level input voltage VIH taken as 3V, is
R 1=

V CCV IH
53
=
=50 k
I IH
40 106

the outputs A, B, C, D, E, F and G of the SN7448 are respectively connected to the

inputs a, b, c, d, e, f and g of the seven segment display IC through current limiting
resistors R2, R3, R4, R5, R6, R7 and R8
from the data sheets, taking the typical value of the high level output voltage of the
SN7448, VOH = 4.2V, the diode forward voltage, VF = 2V, and the diode forward
current, IF = 10mA, the values of R2 ~ R8 are equal and are given by
R=

3.7

V OH V F
4.22
=
=22 0
IF
10 103

DESIGN OF THE SWITCHING AND LOAD UNITS

The switching circuit derives its input from the counter and energizes a relay when

the count is greater than zero and deactivates the relay when the count is zero. This is
implemented using a combinational circuit whose output drives a relay as shown in fig.
3.7.

TO VCC

RL1
12V

D2
1N4007

U6:A
1
3
2
FROM
COUNTER

U6:C
7432

9
8
10

U6:B
4

R6

Q1
BC547

10k
7432

6
5
7432

Figure 3.7: The Switching Unit

Specifications:
accepts its BCD input from the counter output
switches ON the transistor when the BCD input is not zero
switches OFF the transistor when the BCD input is zero
the transistor consequently switches ON and OFF the relay

Choice of Components:
The truth table, the Karnaugh map and the resulting function for the problem are as
shown in table 3.2. The inputs are represented by QA, QB, QC
and QD, while the output is represented by Y.

Table 3.2: Truth Table of the Switching Circuit

DE
QA QB QC QD Y
C
0

00

01

11

10

00

01

11

10

CD
AB

(a) Truth Table

Y = A+ B+C + D
A

( c ) Function
D

(b) Karnaugh Map

Therefore, the SN7432 quad 2-input OR gate was chosen to implement the switching
circuit.
The relay, RLY1, is chosen to be a 6Vdc relay with a coil resistance of 150 and
draws a current of 150mA.
Thus, the transistor, Q1, is required to have a maximum collector current, I C 2IRLY1,
i.e., IC 300mA and a maximum collector to emitter voltage, VCEO 2VCC, i.e., VCEO 10V.
The transistor BC548 is therefore chosen as it has I C = 500mA 300mA and VCEO =
30V 10V. Furthermore, it has a dc current gain, hFE = 110~800.
Hence, taking the average value of hFE = 455, the value of the base resistor, R5, is
given by

R 5=

V OH V OH
4.2
=
=
=12740 13 K
IB
I RLY 1 150 103
h FE
455

The relay coil of RLY1 is protected from reverse using the reverse biased diode, D1,
connected across it. This diode must have a high peak inverse voltage (PIV) rating. Hence
D1 is chosen to be 1N1004 which has a PIV > 100V.
The load is basically the lamps to be switched ON and OFF by the relay and it is
chosen so as to draw a current that is a less than the rating of the the relay switch rating of
10A.

3.8

THE POWER SUPPY UNIT

This simply provides the required energy to drive the circuit. It is basically a +5Vdc

regulated power supply unit generated from the unregulated +12Vdc supply. The power
supply unit is as shown in fig. 3.8.

S1
From
Mains
Supply

T1

D1

U1
LINE
VOLTAGE

C1

VREG

COMMON

To VCC

D2
1 2 3456 0 8

Figure 3.8: The Power Supply Unit

Specification:
to provide a regulated power supply of +5Vdc at 1A

Choice of Components:
The LM7805 positive 5V voltage regulator IC is chosen to be the regulator, and from

its data sheets, it requires an input voltage of 7 ~ 19V to operate adequately and it sources a
current of 1A. This means that it requires an unregulated voltage source with a power
rating a little greater than 5W.
Taking the average of the required input voltage (13V), a 220/12V/500mA (6VA)
transformer which is the nearest standard transformer available is chosen to provide
transformation.
The diodes D1 and D2 are chosen to be 1N4001
Transformer Voltage=Peak Value of V out + Diode Voltage Drop 2(0.6 2)
= 12 + 1.2 = 13.2V
Vout

= 13.2 + (4.3) = 17.2

V out (rms)=

17.2
=12 V
2

Let dv

= ripple voltage = 4.3V, and f = 50Hz

dt=

1
1
1
=
=
=0.001ms
2 f 2 50 100
3

C1 =

3.9

dt 0.001 10
0.001 10
=
=
=1.16 103 1000 F
dv
2 4.3
8.6

AUTOMATIC ROOM LIGHT CONTROLLER WITH VISITOR COUNTER

CIRCUIT
The modules designed above are coupled together to form the automatic room light
with visitor count circuit of fig. 3.9.

R7

R6

47R

50

R2
8

U1

U4:A

U3:A

47R

U5
R5

74HC73

15
50k 1
10
9

RES-VAR

R1

Q
DC

14

1
3

CV

12
7400

LED

10

TH

13

U4:B
4

555

Q0
Q1
Q2
Q3

UP
DN
PL
MR

TCU
TCD

1n

A
B
C
D
BI/RBO
RBI
LT

13
12
11
10
9
15
14

QA
QB
QC
QD
QE
QF
QG

TO VCC

7447

TO LOAD

74192

7400

U3:B
7

1.0

RL1
Q

D3

10
8

CLK
K

RTB14615

U4:C

1N4007

9
Q

U7:A

8
7400

U4:D

10

R3
8

12
13

7
1
2
6
4
5
3

74HC73

1n

U2

3
2
6
7

C1

LDR1 C2
LDR

D1

GND

TR

5
4
11
14

CLK

10k

RV1

VCC

2
4

U6

D0
D1
D2
D3

13

U7:C

7432
11

47R

12

RV2

VCC

10
4

RES-VAR

R4

Q
DC

100R

7432

U7:B
4

CV

LDR2

LED

LDR

6
555

7432

C3
1n

U8
TR1

7805

D4

C4

1n

DIODE

C5
100uF

D5
TRAN-2P3S

DIODE

VI

VO
GND

D2

TH

TR

GND

5
2

47R

7400

R8

Q1
BC547

FROM SOURSE

1.0

CHAPTER FOUR
TEST RESULT AND DISCUSSIONS
4.1 TEST
This chapter gives the detailed achieved result of the theoretical principle and the
designed calculation it explains the test of the various stages.
As stated test were carried at various stages of the designed circuit. The values of each
component used were tested with a digital multimeter.
LEDs (lighting emitting diodes) were used at the required sections to indicate the continual
supply of voltages at the needed points.
POWER SUPPLY
Thje power supply was designed and tested to ensure proper function, off-course it is the heart of
the design. The values show thus:
For 12V (before regulation)
No load voltage 11.85V
Load Voltage 11.55V
For 5V (after regulation)
No load voltage 4.91V
Load Voltage

4.85V

4.2 RESULTS
The various components were tested and the various stages were also tested and were working
accordingly. The total power consumed by the circuit was also recorded.

Total Power used by the Circuit.

BC 547

5mW * 3 = 15mW

555 timer

300mW * 3 = 900mW

74LS192

95mW * 4 = 380mW

LM 7447

80mW * 4 = 250mW

Infrared (5V* 10mA)

50mW * 5 = 250mW

7-Segment Display

50mW * 4 = 200mW

Total Power Sourced

2065mW = 2.065mw

This total power used was what necessitated the design of a total power of 2.500mW of 2.5W
(500mA * 5V).
4.3 DISCUSSION
Once the circuit is powered, the transmitter will begin to transmit constantly. The
transmitter and the receiver sections used the principle of line of sight to transmit and receive
photons of light. So the input of the 555 monostable is always high as the of the configuration of
the circuit and the output constantly low which is inverted to give high input signal to 74LS192
IC. The transmitter and receiver are two for inlet and exit.
This IC count on a rising edge. When someone or an object cut across the line of sight of
the transmitter and receiver, input of 555 monostable becomes low, its output high, so that after
inversion the input of 74LS192 becomes low. At this point the 74LS192 pulse falls rises, thereby
initiating the counting. The 74LS192 send it signals to the decoder that turns it to digital form
that is displayed on LED display.
The bistable is only applicable when the last display reaches 9 (that is 9999), so that the
next passage will send a signal to 555 bistable which is configured to drive the FULL associated

leds in the LED display.

This design has been tested and as described.

CHAPTER FIVE
SUMMARY, CONCLUSION AND RECOMMENDATION
5.1 SUMMARY
After the implementation and construction, the realized up/down counter were found to
be successfully counting as expected. The transducer section responds very fast when the ray
from the infrared transmitter which is being constantly sent to the phototransistor is blocked by
the passage of someone. And this equally send the signal ti the counter which counts and it is
displayed on the LED display. Since there are one counters and one LED display in this project,
the counting counts 9. When it reaches 9, the next signal coming will go the bistable
configurations and drive the LED to FULL
5.2 CONCLUSION
Considering the aim of this project work which is meant to design and implement a
digital up/down counter for counting numbers between the range of 0 to 9 (actually 0-9, the 10th
indicate) and automatic room light controller for used homes or public places such as cinema, car
park or library, the aim was fully and successfully achieved.
5.3 RECOMMENDATION
74LS192 used in this project has it natural limitation. If the design is made to count faster (micro
second) by varying the component of the monstable 555 timer (resistor or capacitor), the
counting become irregular. If a delay for a second or two or more is made, a normal counting
will be achieved. But if the users move faster then it becomes a limitation. And also this project
counts only from 0-9 which is also a limitation in itself.
To overcome this problems for a very busy utilities, a microcontroller can be used, or
other counter whose properties should be very carefully checked before usage. And also more

counters and 7 segment displays could be used to count and display as many as desired.

REFERENCES
Boylestad R. L., & Nashelsky L. (2006). Electronic Devices and Circuit Theory (Ninth Edition)
(pp711-714, pp846-847, pp808-809). New Delhi India. Prentice Hall of India pvt Ltd.
DM7447 BCD-7segment Decoder/Drivers data sheet. (1989). National Semiconductor
Corporation.
Floyd, T. L. & Jain, R. P., (2006). Digital Fundamentals (pp318-pp323). India. Dorling
Kindersley pvt Ltd.
HC192 Synchronous Up/Down Decade Counter data sheet. (1994). SGC Thompson
Microelectronics.
Pilant, Michael S. mathematics. Microsoft Encarta 2009 (DVD). Redmond, WA: Microsoft
Corporation, 2008.