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Roll No:
(To be filled in by the candidate)
Page No: 1
1588
PART - B Marks: 5 x 10 = 50
11. (a) Explain about the register used for setting maximum number of conversion in ADC.
How to configure this register to set the maximum number of conversion as 9? (5)
(b) What is total sampling window width? Brief about its significance (5)
12. (a) How can a slower oscillator of 20 MHz is used to drive the core at maximum
operating frequency in F28335 control card? Discuss about the registers to be
programmed. (6)
(b) What is the significance of watch-dog timer? Discuss about the problem associated
with disabling watch-dog timer. (4)
13. Write short notes about the following registers:
a. GPACTRL
b. GPAQSEL1
c. GPAMUX1
d. GPADIR
14. Explain about various PIE registers associated with digital controller.
15. (a) Compare the CPLD with FPGA. (5)
(b) With help of a neat sketch, describe the Xilinx XC3000 with respect to power
electronic applications. (5)
16. What are Clarkes and Parks Transformation? Describe how to implement Clarkes and
Parks Transformation in F28335.
PART - C Marks : 1 x 20 = 20
17. (a) Write the principle of BLDC motor, Describe each component of the BLDC motor
drive system. (10)
(b) Write a program to configure GPIO31 as general purpose digital input and GPIO34
as general purpose digital output (Assume that all the necessary header files are
linked). Describe the flow of a Multiplexed Interrupt Request from a Peripheral to the
F28335 CPU Core. (10)
/END/
FD/JU
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