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National Semiconductor
Universal Balancing Linear Brief 9
August 1969
Techniques
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FIGURE 3. Offset Voltage Adjustment for FIGURE 4. Offset Voltage Adjustment for
Non-Inverting Amplifiers Voltage Followers
A voltage follower may be balanced by the technique shown Differential amplifiers are somewhat more difficult to bal-
in Figure 4. R1 injects a current which produces a voltage ance. The offset adjustment used for a differential amplifier
drop across R3 to cancel the offset voltage. The addition of can degrade the common mode rejection ratio. Figure 5
the adjustment resistors causes a gain error, increasing the shows an adjustment circuit which has minimal effect on the
gain by 0.05%. This small error usually causes no problem. common mode rejection. The voltage at the arm of the pot is
The adjustment circuit essentially causes the offset voltage divided by R4 and R5 to supply an offset correction of 7.5
to appear at full output, rather than at low output levels, mV. R4 and R5 are chosen such that the common mode
where it is a large percentage error. rejection ratio is limited by the amplifer for values of R3
greater than 1 k. If R3 is less than 1k the shunting of R4 by
R5 must be considered when choosing the value of R3.
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The techniques described for balancing offset voltage at the terfering with the internal circuitry of the amplifier. The elec-
input of the amplifier offer two main advantages: First, they trical parameters of the amplifiers are tested and guaranteed
are universally applicable to all operational amplifiers and without balancing. Although it doesnt usually happen, bal-
allow device interchangeability with no modifications to the ancing could degrade performance.
balance circuitry. Second, they permit balancing without in-
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Universal Balancing Techniques
Notes
National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.