Table 1a 8086 Data transfer instruction set summary

Opcode Operand Mnemonics Symbolic Operation Comments

MOV destination, source MOV AX, BX AX BX Register to register
MOV AL, BL AL BL Register to register
MOV AX, MEMW AL [0100H]; AH Memory to register
[0101H]
MOV AL, MEMB AL[0100H] Memory to register
MOV MEMW, AX [0100H] AL; [0101H] Register to memory
AH
MOV MEMB, BL [0100H] BL Register to memory
MOV MEMW, 2244H [0100H] 44H; Immediate data to
[0101H] 22H memory
MOV MEMB, 44H [0100H] 44H Immediate data to
memory
MOV AL, 22H AL 22H Immediate data to
register
MOV AX, 2000H AL 00H; AH20H Immediate data to
register
MOV DS, AX DS AX General register to
segment register
MOV DX, ES DX ES Segment register to
general register
MOV ES, MEMW ES [0101H : 0100H] Memory to segment
register
MOV MEMW, CS [0101H: 0100H] CS Segment register to
memory
XCHG destination, source XCHG AX, BX AX BX Exchange the contents
XCHG AL, BL AL BL of the word or byte
XCHG [SI], BX [SI] BL; source operand with
[SI+1] BH the destination
operand; none of the
flags are affected.
LAHF LAHF AH Flags L Copy the low order
flag byte into AH.
SAHF SAHF Flags L AH Copy AH into the low
order flag byte.
IN Accumulator, port IN AL, 01H AL Port 01H Input a byte or word
IN AX, 02H AL Port 02H; AH from direct I/O ports
03H 00H to FFH.
IN AL, DX AL Port DX Input a byte or word
IN AX, DX AL Port DX; AH from indirect I/O
Port DX + 1 ports 0000H to
FFFFH; The port
address is in DX;
None of the flags are
affected.
OUT Port, accumulator OUT 01H, AL Port 01H AL Output a byte or
OUT 02H, AX Port 02H AL; Port word to direct I/O
03H AH ports 00H to FFH.
OUT DX, AL Port DX AL Output a byte or
OUT DX, AX Port DX AL; Port word to indirect I/O
DX+1 AH ports 0000H to
FFFFH; The port
address is in DX; The
flags are not affected.
 Table 1b 8086 Data transfer instruction set summary
Opcode Operand Mnemonics Symbolic Operation Comments
LEA destination, source LEA DX, MEMB BL 00; BH 01H The effective address
of the source operand
is transferred to the
destination operand;
The flags are not
affected.
LDS destination, source LDS BX, DWORD BL [SI]; BH[SI+1]; Transferred 32-bit
PTR[SI] DS [SI+3:SI+2] pointer variable from
LES destination, source LES BX, DWORD BL [SI]; the source operand in
PTR[SI] BH [SI+1]; memory to the
ES [SI+3:SI+2] destination register
and register DS or
ES; none of the flags
are affected.
XLAT XLAT AL [BX+AL] Replace the byte in
Al with the byte from
the 256 byte lookup
table beginning at
[BX]; AL is used as
an offset into this
table; The flags are
not affected.

MEMB = 0100 is used to locate a byte in data segment

MEMW= 0100 is used to locate a word in data segment

Table 2 8086 PUSH and POP Instructions set summary

Opcode Operand Mnemonics Symbolic Operation Comments

PUSH Source PUSH BX SP SP 2; Decrement SP by 2 and transfer the

[SP + 1] BH; word from the source operand to the
[SP] BL top of the stack pointed by SP and
PUSH DS SP SP 2; SS
[SP + 1: SP] DS;
PUSH [DI + 5] SP SP 2;
[SP + 1] [DI + 6];
[SP] [DI + 5]
POP Destination POP BX BL [SP]; BH [SP + 1 ]; Increment SP by 2 and transfer the
SP SP + 2 word from the top of the stack pointed
POP DS DS [SP + 1: SP]; by SP and SS to the destination
SP SP + 2 operand.
POP [DI + 5] [DI + 6] [SP + 1];
[DI + 5] [SP];
SP SP + 2
PUSHF None PUSHF SP SP 2; Push the 16-bit flag word onto the top
[SP + 1: SP] Flags; of stack

POPF none POPF Flags [SP + 1: SP]; Pop the top of the stack into the 16-
SP SP + 2 bit flag word
 Table 3 8086 Arithmetic instructions set summary
Opcode Operand Mnemonics Symbolic Operation Comments
ADD destination, ADD SI, AX SI SI+AX Substitute the
source ADD [BX], CL [BX] [BX]+CH destination byte or word
ADD DI, 4000H DI DI+4000H with the sum of the
ADD MEMW, 4000H [0101H:0100H] source and destination
[0101H:0100H]+4000H operands. All flags are
updated.
ADC destination, ADC SI, AX SISI +AX+ CF Replace the destination
source byte or word with the
ADC [BX], CL BX] [BX]+CL+ CF sum of the source and
ADC DI, 4000H destination operands
DI DI+4000H+ CF
plus the carry. All flags
ADC MEMW, 4000H [0101H:0100H] are updated.
[0101H:0100H]+4000H +CF
SUB destination, SUB SI, AX SI SI-AX Substitute the
source destination byte or word
SUB [BX], CL [BX] [BX]-CL with the difference
SUB DI, 4000H DI DI-4000H between of destination
SUB MEMW, 8000H [0101H:0100H] operands & source
[0101H:0100H]-4000H operand. All flags are
updated.
SBB destination, SBB SI, AX SI SI-AX-CF Replace the destination
source SBB [BX], CL [BX] [BX]-CL-CF byte or word with the
SBB DI, 4000H DI DI-4000H-CF difference between of
SBB MEMW, 8000H [0101H:0100H] destination operands &
[0101H:0100H]-4000H-CF source operand plus the
carry. All flags are
updated.
INC destination INC CL CL CL +1 Increment by one or
INC WORD [DI] [DI+ 1:DI] [DI+1:DI]+1 Add one the byte or
INC MEMBS [0100H] [0100H]+1 word destination
operand. Store the result
in the destination
operand. All flags
except CF are updated.
DEC destination DEC CL CL CL -1 Subtract one from byte
or word destination
DEC WORD [DI] [DI+ 1:DI] [DI+1:DI]-1 operand. Store the result
DEC MEMB [0100H] [0100H]-1 in the destination
operand. All flags
except CF are updated.
NEG destination NEG AL AL 0 - AL Find the 2s complement
of the byte or word
NEG WORD [DI] [DI+ 1:DI] 0 -[DI+1:DI] destination operand. All
NEG MEMB [0100H] 0- [0100H] flags except CF are
updated.
CMP AL, BL AL-BL; update flags Subtract the byte or
CMP destination CMP [DI],BX [DI+1:DI]-BX; update flags word source operand
from the similar
CMP MEMW, 4000H [0101H:0100H]-4000H; update destination operand. The
flags operands remain
unchanged. All flags are
CMP DI,4000H DI-4000H; update flags updated.
 Table 4 8086 Multiplication and division instructions set summary

Opcode Operand Mnemonics Symbolic Operation Comments

MUL source MUL BL AX AL* BL Unsigned multiplication of the
(Unsigned multiplication) source operand byte or word & the
MUL BX DX: AX AX*BX accumulator. Results are stored in
(Unsigned multiplication) AX. Double word results are stored
MUL [BX] AX AL* [BX] in DX:AX, if the result cannot be
(Unsigned multiplication) stored in a single word CF and
MUL MEMW DX:AX AX* [0101H:0100H] OF are set. All other flag are
(Unsigned multiplication) undefined.
IMUL source IMUL BL AX AL* BL Its operation is same as MUL. The
(signed multiplication) source operand is limited to 128
IMUL BX DX: AX AX*BX to +127 for byte multiplication & -
(signed multiplication) 32768 to +32767 for word
IMUL [BX] AX AL* [BX] multiplication. The CF & OF are
(signed multiplication) set if the result cannot be
IMUL MEMW DX:AX AX* [0101H:0100H] represented in the low order
(signed multiplication) register. Then the sign bit is
extended to the high order register
and the other flags are undefined.
DIV source DIV BL AX AL / BL Unsigned division of the
(Unsigned division) accumulator and the source
DIV BX DX: AX AX / BX operand byte or word. The result
(Unsigned division) is stored in AL and the remainder
DIV [BX] AX AL / [BX] is stored in AH. For word divisors
(Unsigned division) the result is stored in AX with
DIVL MEMW DX:AX AX / [0101H:0100H] remainder in DX. When the
(Unsigned division) quotient exceeds the capacity of its
destination register (AL or AX), a
type 0 interrupt is generated and ;
all flags are not affected.
IDIV source DIV BL AX AL / BL Its operation is same as DIV. The
(signed division) source operand is limited to 128
DIV BX DX: AX AX / BX to + 127 for byte division and
(signed division) 32768 to +32767 for word
DIV [BX] AX AL / [BX] division.
(signed division)
DIVL MEMW DX:AX AX / [0101H:0100H]
(signed division)
 Table 5 8086 Arithmetic adjust instructions set summary
Opcode Operand Mnemonics Symbolic Operation Comments
DAA none DAA If AL.0F >09 or AF = 1, Adjust the content of AL to a pair of valid
then ALAL + 6; AF 1 packed decimal digits though the addition of
If AL.F0 > 90 or CF= 1, two valid packed or unpacked decimal
then AL AL + 60H; CF 1 operands. All flags except OF are affected.
DAS none DAS If AL . 0F > 9 or AF = 1, Adjust the content of AL to a pair of valid
then ALAL - 6; AF 1 packed decimal digits after the subtraction of
If AL.F0 > 90 or CF= 1, two valid packed or unpacked decimal
then AL AL - 60H; CF 1 operands. All flags except OF are affected
AAA none AAA If AL . 0F > 9 or AF = 1, then Adjust the content of AL to a single unpacked
ALAL + 6; AF AH + 1 decimal number following the addition of two
AF 1; CF AF; valid unpacked decimal operands. The high
AL AL . 0F order half-byte of AL is zeroed and AH is
incremented by 1. All flags except AF and CF
are not affected.
AAS none AAS If AL . 0F > 9 or AF = 1, then Adjust the content of AL to a single unpacked
ALAL - 6; AF AH -1 decimal number following the subtraction of
AF 1; CF AF; two valid unpacked decimal operands. The
AL AL . 0F high order half-byte of AL is zeroed and AH
is decremented by 1. All flags except AF and
CF are not affected.
AAM none AAM AH AL/0AH After the multiplication of two valid unpacked
AL Remainder decimal operands, AAM converts the result in
AL to two valid unpacked decimal digits in
AH and AL. PF, SF, and ZF are affected.
AAD none AAD AL (AH * 0AH) + AL Before dividing AX by a single-digit
AL 0 unpacked, decimal operand, AAD converts
the two-digit unpacked decimal number in AX
to a binary number in AL & 0 in AH. The
quotient will be a valid unpacked decimal
number in AL & remainder in AH. PF, SF, &
ZF flags are affected.
CBW none CBW If AL > 80H , then AH 0 Before dividing AX by a byte operand, CBW
extends the sign of a byte dividend in AL into
AH, thus converting AL into a valid signed
If AL 7F, then AH FFH word in AX. Flags are not affected

CWD none CWD If AX < 8000H, then DX 0 It works as CBW but extends the sign of a
If AX > 7FFFH, then word dividend in AX into double word in
DX FFFFH DX:AX. Flags are not affected
 Table 6 8086 Logical instructions set summary
Opcode Operand Mnemonics Symbolic Comments
Operation
NOT Destination NOT AX AX AX Complement all bits of the
byte or word operand;
NOT [SI] [SI] [ SI ] Flags are not affected.

AND Destination , AND AX, BX AXAX . BX Perform logical AND

source AND AL, [SI] ALAL . [SI] operation of the source
AND AX,0200H AXAX. 0200H and destination byte or
word operands bit by bit.
The result is stored in the
destination operand. AF is
undefined, all other flags
are updated.
OR Destination , OR AX, BX AXAX + BX Perform logical OR
source OR AL,[SI] ALAL + [SI] operation of the source
OR AX,0200H AXAX+0200H and destination byte or
word operands bit by bit.
The result is stored in the
destination operand. AF is
undefined, all other flags
are updated.
XOR Destination , XOR AX, BX AXAX BX Perform logical
source XOR AL, [SI] ALAL [SI] exclusive-OR operation
XOR AX,0200H AXAX of the source and
0200H destination byte or word
operands bit by bit. The
result is stored in the
destination operand. AF is
undefined, all other flags
are updated.
TEST Destination , TEST AX,BX AX . BX; Perform logical AND
source update flags operation of the source
TEST AL,[SI] AL . [SI]; and destination byte or
update flags word operands bit by bit.
TEST AX,0200H AX . 0200H; The operands remain
update flags unchanged; AF is
undefined, all other flags
are updated

Table 7 8086 Shift and Rotate Instructions set summary

Opcode Operand Mnemonics Symbolic Operation Comments

SAL/SHL Destination, SAL AX,1 A n+1 A n , A 15 A 14 , Shift word or byte
count SAL AX,CL A 0 0 CFA 15 operand left or right
once or CL times.
SAR Destination, SAR AX,1 A n A n+1 , CFA 0 , AF is undefined, all
count SAR AX,CL A 15 A 15 other flags are updated.
For single-bit shift
SHR Destination, SHR AX,1 A n A n+1 , CFA 0 , operation, OF is set if
the sign of the operand
count SHR AX,CL A 15 0
changes.
RCL AX,1
 count RCL AX,CL A 0 CF operand left or right
once or CL times.
CF and OF are affected;
RCR Destination, RCR AX,1 A n A n+1 , A 15 CF, For single-bit shift
count RCR AX,CL CFA 0 operation, OF is set if
the sign of the operand
ROL Destination, ROL AX,1 A n+1 A n , A 0 A 15 , changes.
count ROL AX,CL CFA 15
ROR Destination, ROR AX,1 A n A n+1 , A 15 A 0 ,
count ROR AX,CL CFA 0

Table 8 8086 Jump instructions set summary

Opcode Operand Mnemonics Symbolic Operation Comments

JMP Near target JMP MEM IPMEM After execution of JMP
JMP [MEMW] IP[MEMW+1:ME instruction, transfer control to near
MW] target location within the segment.
JMP [BX] IP[BX+1:BX] The addressing mode will be
JMP AX IPAX direct, memory indirect or register
indirect.
JMP Short target JMP SHORT MEM IPMEM After execution of this instruction
transfer control to short target
location. The addressing mode will
be direct only.
JMP Far target JMP FAR MEMF IP0003H; After execution of this instruction
CS9000H transfer control to far target
JMP[MEMW] IP[0102H:1001H]; location within the segment.
CS[0104H:0103H]
JMP DWORD [BX] IP[BX+1:BX];
CS[BX+3:BX+2]
Jcond Short target JNC MEM If CF=0, then After execution of this instruction
IPMEMS transfer control to the short target
address if the condition is true.
Conditional jumps are possible
only for short targets.

JCXZ MEM If CX=0, then

JCXZ Short target IPMEMS If CX=0, transfer control to the
short target address.

Table 9 8086 Loop instructions set summary

Opcode Operand Mnemonics Symbolic Operation Comments

LOOP Short target LOOP MEM CX CX 1 Decrement CX register and transfer
If CX 0 , then IP MEM control to the short target address if CX
0.
LOOPE/ Short target LOOPZ MEM CX CX 1 Decrement CX register and transfer
LOOPZ If (CX 0) . (ZF = 1) , control to the short target address if (CX
then IP MEM 0). (ZF=1) This instruction affect the
flag ZF = 1.
 Short target LOOPNZ MEM CX CX 1 Decrement CX register and transfer
LOOPNE/ If (CX 0) . (ZF = 0), control to the short target address if (CX
LOOPNZ then IP MEM 0). (ZF = 0). This instruction affect the
flag ZF = 0.

Table 10 8086 CALL and RETRUN instructions set summary

Opcode Operand Mnemonics Symbolic Operation Comments

Call Near target CALL MEM SP SP 2; IP is pushed onto the top of the
[SP + 1: SP] IP; stack and control is transferred
IP MEM within the segment to the near
CALL [MEMW] SP SP 2; target address
[SP + 1: SP] IP;
IP [0101H; 0100H]
CALL [DI] SP SP 2;
[SP + 1: SP] IP;
IP [DI+ 1: DI]
CALL DI SP SP 2;
[SP + 1: SP] IP;
IP DI
CALL Far target CALL FAR MEMF SP SP 2; CS and IP are pushed onto the top
[SP + 1: SP] CS; of the stack and control is
SP SP- 2; transferred to the new segment
[SP+ 1:SP] IP; and far target address
IP 0100H
CALL [MEMW] Same as above except:
CS [0103H : 0102H];
IP [0101H;0100H]
CALL DWORD [DI] Same as above except:
CS [DI +3:DI +2];
IP [DI + 1: DI]
RET n(near) RET IP [SP + 1: SP]; The word at the top of the stack is
SP SP+2 popped into IP transferring control
RET 8 IP [SP + 1: SP]; to this new address; RET normally
SP SP+2+8 used to return control to the
instruction following a near
subroutine call; if included, the
optional pop value (n) is added to
SP
RET n(far) RET IP [SP + 1: SP]; As the above except that double
SP SP+2; word at the top of the stack is
CS[SP + 1: SP]; popped into IP and CS transferring
SP SP+ 2; control to this new far address.

RET 8 IP [SP + 1: SP];

SP SP+2;
CS[SP + 1: SP];
SP SP+ 2 + 8 ;
 Table 11 8086 String Instructions set summary

Opcode Operand Mnemonics Symbolic Operation Comments

STOSB None STOSB ES:[DI] AL Transfer a byte or word from register AL to
If DF=0, DI DI+1. the string element addressed by DI in the extra
If DF=1, DI DI-1. segment; When DF=0, increment DI,
otherwise decrement DI. Flags are not
affected.
STOSW None STOSW ES:[DI] AL Transfer a word from register AX to the string
ES:[DI+1] AH. element addressed by DI in the extra segment.
If DF=0, DI DI+2. If DF=0, increment DI, else decrement DI.
If DF=1, DI DI-2. Flags are not affected.
STOS Destination STOS MEMB ES:[MEMB] AL Transfer a byte from register AL to the string
If DF=0, element addressed by DI in the extra segment.
MEMB MEMB + 1. When DF=0, increment MEMB, otherwise
If DF=1, decrement MEMB. Flags are not affected.
MEMB MEMB -1.
STOS MEMW ES:[MEMW] AL Transfer a word from register AX to the string
ES:[ MEMW +1] AH. element addressed by DI in the extra segment.
If DF=0, If DF=0, increment MEMW, else decrement
MEMW MEMW +2. MEMW. Flags are not affected.
If DF=1,
MEMW MEMW -2.
LODSB LODSB ALDS:[SI]. Transfer a byte from the string element
If DF=0, SISI+1. addressed by DS:SI to register AL. If DF=0,
If DF=1, SI SI-1. increment SI, else decrement SI. Flags are not
affected.
LODSW LODSW ALDS:[SI]. Transfer a word from the string element
AHDS:[SI+1]. addressed by DS:SI to register AX. If DF=0,
If DF=0, SISI+2. increment SI, else decrement SI. Flags are not
If DF=1, SISI-2. affected.

LODS Source LODS MEMB ALDS:[MEMB]. Transfer a byte from the string element
If DF=0, MEMBMEMB+1. addressed by DS:MEMB to register AL.
If DF=1, MEMBMEMB-1. When DF=0, increment MEMB, else
decrement MEMB. Flags are not affected.

LODS ALDS:[MEMW]. Transfer a word from the string element

MEMW AHDS:[MEMW+1]. addressed by DS : MEMW to register AX.
If DF=0, When DF=0, increment MEMW, otherwise
MEMWDSMEMW+2. decrement MEMW. Flags are not affected
If DF=1,
MEMWMEMW-2.
MOVSB None MOVSB ES:[DI] DS:[SI]. Transfer a byte from the string element
If DF=0, addressed by DS:SI to the string element
DIDI+1, SISI+1. addressed by ES: DI. If DF=0, increment SI
If DF=1, and DI, else decrement SI and DI. Flags are
DIDI-1, SISI-1. not affected
MOVSW None MOVSW ES:[DI] DS:[SI] Transfer a word from the string element
ES:[DI+1] DS:[SI+1] addressed by DS:SI to the string element
If DF=0, DIDI+2 addressed by ES:DI. If DF=0, increment SI
SISI+2 and DI, else decrement SI and DI. Flags are
If DF=1, DI DI-2 not affected
SI SI-2.
 Table 12 8086 String Instructions set summary

Opcode Operand Mnemonics Symbolic Operation Comments

MOVS Destination, MOVS ES:[MEMBE] Transfer a byte from the string element
Source MEMBES,ME DS:[MEMBD]. addressed by DS:MEMBD to the string
MBDS If DF=0, element addressed by ES:MEMBE. If DF=0,
MEMBEMEMBE+1 increment MEMBD and MEMBE, else
decrement MEMBD and MEMBE. Flags are
MEMBDMEMBD+1. not affected
If DF=1,
MEMBEMEMBE-1
MEMBDMEMBD-1.
MOVS ES:[ MEMWE] DS:[ Transfer a word from the string element
MEMWE, MEMWD] addressed by DS: MEMWD to the string
MEMWD ES:[ MEMWE +1] DS:[ element addressed by ES: MEMWE in the
MEMWD +1] extra segment. If DF=0, increment MEMWD
If DF=0, and MEMWE, else decrement MEMWD and
MEMWE MEMWE +2 MEMWE. Flags are not affected
MEMWD MEMWD +2
If DF=1,
MEMWE MEMWE -2
MEMWD MEMWD -2.
SCASB SCASB AL - ES:[DI]; Subtract the byte of the string element
If DF=0, DIDI+1. addressed by ES:DI from AL. If DF=0,
If DF=1, DIDI-1. increment DI, else decrement DI. Flags are
updated.
SCASW SCASW AX - ES:[DI+1:DI]; Subtract the word of the string element
If DF=0, DIDI+2 addressed by ES:DI from AX. If DF=0,
If DF=1, DIDI-2. increment DI, else decrement DI. Flags are
updated.
SCAS Destination SCAS AL - ES:[ MEMBE ]; Subtract the byte of the string element
MEMBE If DF=0, addressed by ES: MEMBE from AL. If DF=0,
MEMBE MEMBE +1. increment MEMBE, else decrement MEMBE.
If DF=1, Flags are updated.
MEMBE MEMBE -1.
SCAS AX - ES:[ MEMWE +1: Subtract the word of the string element
MEMWE MEMWE]; addressed by ES: MEMWES from AX. If
If DF=0, DF=0, increment MEMWE, else decrement
MEMWE I MEMWE +2 MEMWE. Flags are updated.
If DF=1,
MEMWE MEMWE -2.
CMPSB CMPSB DS:[SI] ES:[DI]; Subtract the byte of the destination string
If DF=0, DIDI+1 element addressed by ES:DI in the extra
SISI+1 segment from byte of the source string
If DF=1, DIDI-1 element addressed by DS:SI. If DF=0,
SISI-1. increment DI and SI, else decrement SI and
DI. Flags are updated.
CMPSW CMPSW DS:[SI+1:SI] ES:[DI+1 :DI] Subtract the word of the destination string
If DF=0, DIDI+2 element addressed by ES:DI from word of the
SISI+2. source string element addressed by DS:SI. If
If DF=1, DIDI-2 DF=0, increment DI and SI, else decrement SI
SISI-2 and DI. Flags are updated.
 Table 13 8086 String Instructions set summary

Opcode Operand Mnemonics Symbolic Operation Comments

CMPS Dest,source CMPS DS:[ MEMBD] ES:[ Subtract the byte of the destination string
MEMBE, MEMBDS]; element addressed by ES:MEMBE from byte
MEMBD If DF=0, of the source string element addressed by
MEMBE MEMBE +1 DS:MEMBD. If DF=0, increment MEMBE
MEMBD MEMBD +1 and MEMBD, else decrement MEMBD and
If DF=1, MEMBE. Flags are updated.
MEMBE MEMBE -1
MEMBD MEMBD -1.
CMPS DS:[MEMWD+1: MEMWD] Subtract the word of the destination string
MEMWES, ES:[MEMWE+1 : element addressed by ES:MEMBE from word
MEMWDS MEMWE]; of the source string element addressed by
If DF=0, DS:MEMBD. If DF=0, increment MEMBES
MEMWE MEMWE +2 and MEMBDS, else decrement MEMBDS
MEMWD MEMWDS +2. and MEMBES. Flags are updated.
If DF=1,
MEMWE MEMWE -2
MEMWD MEMWDS
REP REP STOSB CXCX-1. The string instruction following the REP
Repeat until CX=0 prefix is repeated until CX becomes to 0.

REP STOSW CXCX-1.

Repeat until CX=0
REP MOVSB CXCX-1.
Repeat until CX=0
REP MOVSW CXCX-1.
Repeat until CX=0
REPE/RE REPZ SCASB CXCX-1. Repeat if ZF=1 Repeat the string operation if (ZF=1) and
PZ and CX0. CX0;
REPZ CXCX-1. Repeat if ZF=1
SCASW and CX0.
REPZ CMPSB CXCX-1. Repeat if ZF=1
and CX0.
REPZ CXCX-1. Repeat if ZF=1
CMPSW and CX0.
REPNE/R REPNE CXCX-1. Repeat if ZF=0 Repeat the string operation if ( ZF=0) and
EPNZ SCASB and CX0. CX0;
REPNE CXCX-1. . Repeat if ZF=0
SCASW and CX0.
REPNE CXCX-1. . Repeat if ZF=0
CMPSB and CX0.
REPNE CXCX-1. Repeat if ZF=0
CMPSW and CX0.
 Table 14 8086 Processor control instructions set summary

Opcode Operand Mnemonics Symbolic Operation Comments

STC None STC CF 1 Set carry flag

CLC None CLC CF 0 Clear carry flag

CMC None CMC CF CF Complement carry flag

STD None STD DF 1 Set direction flag

CLD None CLD DF 0 Clear direction flag

STI None STI IF 1 Set interrupt flag

CLI None CLI IF 0 Clear interrupt flag

HLT None HLT None Halt

WAIT None WAIT None Wait state when TEST 1
LOCK Instruction LOCK MOV AX,BX None LOCK 0 used to prevent
coprocessors from accessing the
bus during execution of instruction
NOP None NOP None No operation
ESC Number, ESC FF, MEMW Data bus [MEMW] Put the contents of the memory
source source operand on the data bus and
execute NOP instruction.