constant gain: std_logic_vector(29 downto 0):="000000001000000000000000000000";

begin

reset<=DDS_sync_output and reference_sync_wave;

process (DDS_sync_output, reference_sync_wave) --phase comparator flip flops

begin
if (DDS_sync_output'event and DDS_sync_output = '1') then
if(reset='1') then
comparator_out_neg <= '0';
else
comparator_out_neg <= '1';
end if;
end if;

if (reference_sync_wave'event and reference_sync_wave = '1') then

if(reset='1') then
comparator_out_pos <= '0';
else
comparator_out_pos <= '1';
end if;
end if;
end process;

Process (clk_in)
variable neg_temp1: std_ulogic;
variable pos_temp1: std_ulogic;
begin
if (clk_in'event and clk_in = '1') then
pos_temp1:=comparator_out_pos;
neg_temp1:=comparator_out_neg;

if ((neg_temp1='1') and (pos_temp1='0')) then

DDS_feedback_out_1(29 downto 0)<=std_logic_vector(unsigned(DDS_feedback_out_1)-
64);
elsif ((pos_temp1='1') and (neg_temp1='0')) then
DDS_feedback_out_1(29 downto
0)<=std_logic_vector(unsigned(DDS_feedback_out_1)+64);
end if;
if (pos_temp1='1') then
neg_gain <= (others =>'0');
pos_gain <= gain;
elsif (pos_temp1='0') and (neg_temp1='1') then
pos_gain <= (others =>'0');
neg_gain <= gain;
else
pos_gain <= (others =>'0');
neg_gain <= (others =>'0');
end if;
end if;
end process;

DDS_feedback_out <= std_logic_vector(unsigned(DDS_feedback_out_1) +

unsigned(pos_gain) - unsigned(neg_gain) + 64);

end Behavioral;