Lesson 2

LabVIEW FPGA Basics

TOPICS
A. Hardware Configuration
B. LabVIEW FPGA Development Process
C. Reconfigurable I/O Architectures
D. Creating a LabVIEW FPGA Project

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A. Hardware Configuration

Configure LabVIEW FPGA-compatible devices in MAX

Before installing any device:
1. Install LabVIEW
2. Install LabVIEW FPGA
3. Install the appropriate driver
(for example, NI-RIO)
Two types of devices:
• Devices connected directly to
the PC (through PCI, PXI, and
so on)
• Remote devices connected
through a network connection

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A. Hardware Configurations
Measurement & Automation Explorer (MAX) is the gateway for managing
connections to all
NI devices.
Before connecting any device, you must complete the following steps to install
the software and drivers for the device.
1. Install LabVIEW.
2. Install the compatible version of LabVIEW FPGA.
3. Install the latest compatible version of driver software for your device.
Refer to ni.com/updates to find the latest updated driver software .
After you install the appropriate software you can connect the device to the
computer in use. The installation instructions may vary depending on which
device is in use. Devices may be connected directly to the PC or connected
remotely through a network connection.

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Devices Connected Directly to the PC

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If you are using a PCI or PXI device that is running in
your Windows PC, follow the installation instructions
included with the device to recognize the FPGA device.
After following the installation instructions, your device
will appear in MAX under My System»Devices and
Interfaces, and you can directly target your FPGA
device. This form of setup typically is the easiest
because you do not have to worry about network
connection problems.

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 Exercise 2-1: Configuring the RIO Hardware

Open MAX, find the RIO device, and verify that the device
is functioning.
GOAL

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B. LabVIEW FPGA Development Process

Steps to Develop a LabVIEW FPGA Application

Evaluate Configure Emulate and

System Hardware in Compile the
Requirements Project FPGA VI

Design the Create and Build the Host

Software Implement the Interface
Architecture FPGA VI

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B. LabVIEW FPGA Development Process
The figure above shows the basic steps of developing a
LabVIEW FPGA application.
Let’s walk through each of these steps.

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Evaluate System Requirements

Evaluate System Requirements Use the following steps to identify

the software requirements:
Design the Software Architecture 1. Determine software purpose
2. Elicit requirements from
stakeholders
Configure Hardware in Project
3. Determine system requirements
4. Determine user interface
Create and Implement the FPGA VI requirements

Emulate and Compile the FPGA VI

Build the Host Interface

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Evaluate System Requirements
The first step in any development project is to evaluate the requirements of the system. Create a list of all of the
tasks that the system should perform and any restrictions on the system such as development time, cost, and size.
The requirements definition process includes the following items, not necessarily in this order.
• Identification
• Constraints
• Analysis
• Representation
• Communication
• Validation
• Management1

1 Brackett,
John W. Software Requirements. Pittsburgh, Pennsylvania: SEI, Jan. 1990.
CMU/SEI-CM-19-1.2.

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Design the Software Architecture

Evaluate System Requirements The Software Architecture

chosen must:
Design the Software Architecture
1. Set out which processes occur
on which targets
Configure Hardware in Project
2. Satisfy all system requirements
3. Be modular in implementation
Create and Implement the FPGA VI

Emulate and Compile the FPGA VI

Build the Host Interface

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Once the system requirements are set, thought must be put into
how the application should work as a whole. The process of
determining how the system should function from a software
standpoint is known as the software architecture. The key in this
stage is to set up a clear direction for how the application should
work, so that time is not wasted coding with no clear direction.
The chosen software architecture should be robust enough to
handle even the most demanding of scenarios set forth in the
system requirements; yet, as simple as possible to facilitate rapid
development.
In this step you do not do any programming; rather, you create a
project plan so that the application can have a focused
development path.

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Configure Hardware in Project

Evaluate System Requirements

Design the Software Architecture

Configure Hardware in Project

Create and Implement the FPGA VI

Emulate and Compile the FPGA VI

Build the Host Interface

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When we launch LabVIEW, we will need to create a LabVIEW
Project. Use the LabVIEW Project to manage and configure all
resources for FPGA devices, such as CompactRIO Modules, I/O,
clocks, FIFOs and VIs. When using a LabVIEW Real-Time
platform with a LabVIEW FPGA device, you must add the
following resources in order:
1.Real-Time target (if you are using CompactRIO or PXI
controller, otherwise My Computer is the target)
2.FPGA Target (that is, the CompactRIO backplane or R Series
device)
3.CompactRIO Expansion Chassis (R Series only)
4.CompactRIO Modules (if applicable)

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Create and Implement the FPGA VI

Evaluate System Requirements

Design the Software Architecture

Configure Hardware in Project

Create and Implement the FPGA VI

Windows OS
LabVIEW Project Emulate and Compile the FPGA VI

FPGA VI
Build the Host Interface

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Now you can create your new FPGA VI. In the Project
Explorer, right-click the FPGA target and select
New»VI to open a blank LabVIEW VI.
Once the VI is created you can implement your FPGA
VI on your host PC. Refer to Lesson 3, FPGA
Programming Basics, for more information about the
FPGA programming environment. After you finish
building your FPGA application, you must compile the
code to execute on the FPGA.

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Emulate and Compile the FPGA VI

First emulate the VI Evaluate System Requirements

• Emulation successful
− Compile VI Design the Software Architecture

• Emulation failed
− Debug FPGA VI Configure Hardware in Project

Create and Implement the FPGA VI

Emulating the VI prevents
wasting time compiling a Emulate and Compile the FPGA VI
non-functional FPGA VI
Build the Host Interface

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Emulation runs the VI as if it was targeted for Windows, allowing you to use
debugging tools such as highlight execution and probes.
Initiate the compile by clicking Run in the VI when the emulator is turned off,
or by right-clicking the VI within the Project Explorer and selecting Compile.
Because of the technology used in FPGA, compiling FPGA code can take
anywhere from minutes to hours and LabVIEW FPGA is no exception. By
initiating a compile, LabVIEW converts the LabVIEW graphical code to
VHDL (these are called intermediate files). These intermediate files are then
sent to the compile server (a separate application from LabVIEW) where the
Xilinx ISE tools compile the VHDL into a bit file. The bit file is then passed
back to LabVIEW and associated with the FPGA VI. Anytime you change
your LabVIEW FPGA code, the code must be recompiled. You can compile on
a remote PC or server to free up your machine for other operations (such as
building the FPGA interface) while the code compiles. You also can disconnect
from the compile server and continue working. While possible to use a remote
PC, the development PC is typically sufficient for compiling FPGA
applications.

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 Emulate and Compile the FPGA VI (continued)

Compile Server turns FPGA VI

into a bitstream file
• Can take minutes to hours to compile
• Bitstream file loads on FPGA when you
Windows OS click Run on the FPGA VI
LabVIEW

FPGA VI Intermediate Files

Linked but Compile
separate Server
Bitstream File Compiled Bitstream File

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Build the Host Interface
Evaluate System Requirements After the FPGA VI is functioning, create
an FPGA interface on the host
Design the Software Architecture

Windows OS
Configure Hardware in Project
LabVIEW FPGA
Target FPGA
FPGA VI Control
Create and Implement the FPGA VI Bitstream File
(Front Panel) Data (Running)
Emulate and Compile the FPGA VI

Build the Host Interface

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The last step in the FPGA development process is to create
the host interface for your FPGA VI. Build the host interface
using a small set of VIs from the NI RIO driver to
seamlessly integrate your FPGA hardware with the rest of
your measurement and control system. The FPGA interface
exchanges information from your LabVIEW VI running in
Windows or LabVIEW Real-Time with the front panel
controls and indicators on your LabVIEW FPGA VI. Refer
to Lesson 6, Controlling the FPGA VI, and Lesson 7,
Synchronizing FPGA and Host Data Transfers, for more
information about building the host interface.
Let’s now look at two common architectures for LabVIEW
applications that use LabVIEW FPGA.

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C. Reconfigurable I/O Architectures

• LabVIEW FPGA Architecture on Windows

• LabVIEW FPGA Architecture with LabVIEW Real-Time

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LabVIEW FPGA Architecture on Windows

Windows PC FPGA Reconfigurable FPGA

Interface

LabVIEW LabVIEW
For Windows VI FPGA VI

Enterprise

LabVIEW LabVIEW FPGA

for Windows

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The basic architecture for a LabVIEW FPGA application is similar to the
FPGA development process just described. You create the LabVIEW FPGA VI
to execute in the FPGA hardware and then run the LabVIEW host interface VI
on a Windows PC. You use the RIO hardware to implement any custom
hardware functionality such as timing, triggering, precise synchronization,
custom counters, or other custom mix of I/O. You then transfer the data from
the FPGA device to the PC for off-line floating-point analysis, networking, file
I/O, or to display on a graphical user interface.
Any control that the user has of the application is handled from the Windows
PC and passed as data to the FPGA. Data can be passed from the FPGA VI up
to the host interface VI or vice versa. LabVIEW FPGA makes it seem like the
FPGA VI is the only application running, however, the front panel displayed
on the Windows PC only communicates data to the FPGA VI running on the
actual hardware. Because the FPGA can run at resolutions of nanoseconds and
the PC can only run at resolutions in the milliseconds range, the PC does not
always display the most recent information from the hardware.
This configuration is ideal for PXI or a desktop PC running Windows.

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LabVIEW FPGA Architecture with
LabVIEW Real-Time

Windows PC LabVIEW Real-Time System Reconfigurable

FPGA

Windows
User Network Normal Priority Inter-Thread Time-Critical FPGA LabVIEW
Interface Communication
VI Communication Interface VI Interface FPGA VI
Host VI

Enterprise Data Storage

LabVIEW LabVIEW FPGA

for Windows LabVIEW Real-Time

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The other major architecture uses LabVIEW FPGA within a LabVIEW Real-Time System.
This is the architecture for PXI and CompactRIO platforms that run LabVIEW Real-Time.
This architecture has the following components:
− LabVIEW FPGA VI—Implements custom I/O or ultra high-speed control. Because
your LabVIEW code executes directly in hardware, you can achieve hardware-level
(ns) determinism.
− LabVIEW Real-Time Module—Adds deterministic floating-point processing and
control algorithms on a dedicated processor. The LabVIEW Real-Time application has
two parts: the time-critical loop and the normal priority loop. These loops are contained
within separate VIs. Any code that must execute deterministically is placed in the time-
critical loop, with all other code in the normal priority loop. In most programs, the
time-critical loop handles all control tasks and/or safety monitoring, and the normal
priority loop handles all communication and datalogging.
− LabVIEW for Windows Host VI—Contains the user interface for your real-time
system.
Refer to the LabVIEW Real-Time customer education course or visit ni.com/realtime for
more information about developing well-architected LabVIEW Real-Time applications.

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D. Creating a LabVIEW FPGA Project

Complete the following steps to create a LabVIEW FPGA

Project:
1. Configure hardware in the project
2. Select a category for your application
3. Discover existing system or create new system
4. LabVIEW FPGA Project Wizard creates a new LabVIEW FPGA
project

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D. Creating a LabVIEW FPGA Project
This section explores the following steps to create a
LabVIEW FPGA project.
1.Configure hardware in the project.
2.Select a category for your application
3.Discover existing system or create new system
4.LabVIEW FPGA Project Wizard creates a new
LabVIEW FPGA project

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Evaluate System Requirements

System Requirements for this course:

• Acquire voltages at 100kS/s
• Output voltages up to 1MS/s
• Connect directly to PC
• Create custom triggers

NI PCI-7831R best match for hardware needs

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Before starting any project, you must first review the system requirements. The
project for this course has the following requirements:
− Acquire analog voltages at a rate of 100-200kS/s
− Output analog voltages at a rate of up to 1 MS/s
− Create custom triggering behavior
− Pass data to a PC for processing
− Capable of processing information onboard
The NI PCI-7831R suits our needs for this course.
If you have different requirements, always do an extensive evaluation to
determine the end goal of your project and make sure that the hardware you
choose is the best suited to your application. If the project requires ns
resolution, a DAQ device in a PC will not suffice. However, if you only need
hardware to acquire temperature data once per hour, developing a complex
FPGA system will probably exceed the needs of your application.

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Configure Hardware in the Project

Create a LabVIEW Project

to begin creation of
application(s)
• Open LabVIEW
• Select Targets»FPGA Project
• Click Go

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Now that the hardware is properly selected, you can begin
creation of the software.
The application in this course uses the NI PCI-7831R, which
is an FPGA device. To create a LabVIEW Project for use
with this device from the LabVIEW Getting Started
window, select Targets»FPGA Project and click Go. You
also can select Tools»FPGA Module»FPGA Project.
Either step launches the FPGA Project Wizard. Use the
FPGA Project Wizard to create a LabVIEW Project and add
all the components necessary for development of an
application with the selected hardware to the project.

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Select a Category for Your Application

• Select the most appropriate

category for your application
• For NI PCI-7831R select
R Series Intelligent DAQ on
My Computer
• Click Next

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Choose the appropriate category for the hardware and
application in use.
For this course we are assuming the use of an NI PCI-
7831R. For the NI PCI-7831R select R Series
Intelligent DAQ on My Computer.
If you have a different piece of hardware then choose
the most appropriate category and click Next.

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Discover Existing System or Create New System

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Choose Discover existing system if the device is already
configured in MAX.
The FPGA Project Wizard finds all RIO devices in the
category that you chose and lists the available devices.
If there are multiple RIO devices on the computer, select the
device that you want to work with, then click Next.
If the device is not configured properly in MAX or you
would like to begin development of the software before the
hardware is available, select Create new system. Use this
method only if Discover existing system is not applicable.

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LabVIEW FPGA Project Wizard Creates New
Project

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Based on the selections that you made, the LabVIEW FPGA Project Wizard
creates a LabVIEW Project. You can review the LabVIEW Project in the
FPGA Project Wizard. If there are any changes that need to be made, click the
Back buttons and update your configuration.
The Launch FPGA Wizard when finished checkbox is selected by default.
You can choose to leave this selected and use the wizard; however, this option
adds more complexity to the project than needed at this point. The FPGA
Wizard can be a useful utility after you are more familiar with building FPGA
applications and you can use it to create many of the VIs needed for larger
projects.
After you click Finish, the untitled LabVIEW Project appears exactly as
presented by the FPGA Project Wizard. If the project appears as you expected,
save the LabVIEW Project file before beginning work on the rest of your
application.
The RIO device is now set up and configured so that you can begin application
development within LabVIEW.

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Using LabVIEW Projects

LabVIEW Project necessary

for FPGA development
• PCI-7831R is inside the PC
− FPGA Target under My Computer
• Folders refer to physical
channels on the FPGA Target
− Can create folders for maintaining
software hierarchy
• Create target-specific items by
right-clicking on the target and
adding or creating items

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Use projects to group together LabVIEW files and non-LabVIEW files, create build
specifications, and deploy or download files to targets. When you save a project,
LabVIEW creates a project file (.lvproj), which includes references to files in the
project, configuration information, build information, deployment information, and so
on. You must use a project to build applications and shared libraries. You also must use
a project to work with an RT, FPGA, PDA, Touch Panel, DSP, or embedded target.
Project:Name – All targets and files are under this heading
–My Computer – All targets or hardware used in the computer are contained at this
level. Any VIs created at this level will be targeted to the host machine and will have
the full LabVIEW for Windows Palette available.
– –FPGA Target (Reference, Hardware) – Refers to the FPGA hardware found
within the project. In this case, since the FPGA Target is connected via the PCI bus, the
FPGA Target is found under My Computer.
– – –Connector0, Connector1, and Connector2 – These folders contain physical
channels that via the related 68-pin connectors on the front of the device. For full
details about the pinout of these connectors refer to the LabVIEW help for the PCI-
7831R.

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– – –RTSI – The RTSI bus is a timing and triggering bus located on the top of
the card. This bus is useful for sharing triggers or timing signals between this
board and other devices with RTSI buses located within the same computer.
– – – –40 MHz Onboard Clock – The default timebase used by the FPGA
Target
– – –Dependencies – Shows all VI dependencies for VIs targeted to the
FPGA.
– – –Build Specifications – Allows you to create a Source Distribution of your
application.
– –Dependencies – Shows all VI dependencies for VIs targeted to the host.
– –Build Specifications – Allows you to create an Application, Installer,
Shared Library, Source Distribution or Zip File of the application.
Note FPGA Applications made with CompactRIO would have the FPGA
Target located under the CompactRIO target. And the CompactRIO target
would be parallel to My Computer in the LabVIEW Project hierarchy.

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 Exercise 2-2: Creating a LabVIEW FPGA Project

Use the FPGA Project Wizard to create a LabVIEW FPGA

Project for the PCI-7831R.
GOAL

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Quiz
1. Arrange the LabVIEW FPGA
Development Process steps
in order:
• Configure Hardware in Project
• Build the Host Interface
• Emulate and Compile the
FPGA VI
• Design the Software
Architecture
• Evaluate System
Requirements
• Create and Implement the
FPGA VI
2. What is the name of the
software used to verify that
hardware is properly
installed and connected?
a. LabVIEW
b. Measurement and Automation
Explorer (MAX)
c. Windows Explorer
d. LabVIEW FPGA
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Quiz

3. Installing LabVIEW FPGA 4. An FPGA Target must be

assures that the proper connected directly to a
drivers for your device are Real-Time Host
installed? a. True
a. True b. False
b. False

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This concludes this lesson on LabVIEW FPGA Basics. We covered how to
configure your remote systems in MAX, the basic development steps for
LabVIEW FPGA applications, and the common architectures for using
LabVIEW for Windows or LabVIEW Real-Time as your host application.
1. Evaluate System Requirements
Design the Software Architecture
Configure Hardware in Project
Create and Implement the FPGA VI
Emulate and Compile the FPGA VI
Build the Host Interface
2. Measurement and Automation Explorer (MAX)
3. False – LabVIEW FPGA is the software needed for programming an FPGA
target, but the device specific drivers still need to be installed before the device
can be used by LabVIEW FPGA.
4. False

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