module halfad(s,c,a,b);

input a,b;

output s,c;

xor new(s,a,b);

and new1(c,a,b);

endmodule

module fullad(s,cout,a,b,cin);

input a,b,cin;

output s,cout;

wire s1,c1,c2;

halfad h1(s1,c1,a,b);

halfad h2(s,c2,s1,cin);

or new1(cout,c1,c2);

endmodule

module fullad4(s,cout,a,b,cin);

output [3:0]s;

output cout;

input [3:0] a,b;

input cin;

wire c1,c2,c3;

fullad new1(s[0],c1,a[0],b[0],cin);

fullad new2(s[1],c2,a[1],b[1],c1);

fullad new3(s[2],c3,a[2],b[2],c2);

fullad new4(s[3],cout,a[3],b[3],c3);

endmodule