Memristor Based

Multilevel Memory
 Memristor Based Multilevel Memory
In anticipating the end of Moore’s law a decade from now, many new approaches
to extend the end of this law have been proposed by the memory industry. One
approach is to develop the Multi-Level Cell (MLC) technology which stores
multiple bits in a multilevel form of information in a memory element.

Commercially available MLC NAND memories can store four states per cell in
the current technology. Most approaches are the transistor-based PRAM (Phase
Change RAM) , except HP’s resistance-based RRAM .

Recently, Stanley Williams et al. from HP had developed a remarkable memory

element called memristor which is based on the pinched hysteresis loop exhibited
by Titanium Dioxide thin films, when sandwiched between Platinum electrodes.

The memristor was postulated by Leon O. Chua as the fourth basic element of
electrical circuits in 1971. It is based on the nonlinear characteristics of the electro-
magnetic mechanism in nature.

ADVANTAGES

There are several advantages of the memristor memory over conventional

transistor-based memories. One is its strikingly small size. Though memristor is
still at its early development stage, its size is at most one tenths of its RAM
counterparts. If the fabrication technology for memristor is improved, the size and
advantage could be even more significant.

Another feature of the memristor is its incomparable potential to store analog

information which enables the memristor to keep multiple bits of information in a
memory cell.

PRACTICAL DIFFICULTIES AND IMPLEMENTATION

A method to utilize the memristor as a multilevel memory has been proposed.
There are several roadblocks in the practical use of memristors for multilevel
memory.

A difficulty comes from the nonlinearity in the φ vs. q curve which makes it
difficult to determine the proper pulse width for desired resistance values. Another
one comes from the property of the memristor which integrates any kind of signals
including noise that appeared at the memristor and causes memristors to be
perturbed from their original values.

The proposed method enables the memristor to be used as multilevel memory

using a reference resistance array by forcing the memristor to stick at a set of
predetermined fixed reference resistance values. We propose the write-in
(programming) circuit and the read-out/restoration circuit which share the
information storing technique using the reference resistance array.

REFERENCE RESISTANCE ARRAY-BASED

MULTILEVEL MEMORY OF MEMRISTOR

The proposed method has the operating point of the memristor be maintained its
desired location (or resistance value) utilizing a set of pre-determined multiple
resistance levels. Fig. 3 shows the basic idea of the proposed method, where the
Resistance array to be referenced and the memristor to be programmed (tuned) are
shown. The goal is to have the memristor keep any of the resistance level selected
from the resistance array.

If a predetermined magnitude of the current Pulse I s(t ) is applied to the

resistance array, different levels of voltages Vk will appear at each node of the
resistance array. The same current pulse I s(t ) is also applied to the memristor.
 The programming (tuning) of the memristor is performed by
applying additional current pulses to the memristor with the appropriate directions
until the voltage of the memristor equals to that of the selected node voltage in the
resistance array. If the voltage of the memristor reaches that of the selected node,
the resistance value of the memristor becomes the same as the partial sum of the
resistance from the ground to the selected node of the resistance array.

This idea is employed in both the “write-in” and the “read-

out/restoration” circuits. Detailed description of these circuits will be presented in
the following sections.