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DC/DC
DRAM Power
1.8V, 0.9V
PG 43
SHELBY-INTEGRATED
+3V_SRC
A A
+5VSUS
1.5VSUS, 1.05V
PG 46
PG 44
IMVP-6
CPU VR
AC/BATT
Yonah CLOCKS SYSTEM SWTICH & LED & FAN & THERMAL
PG 48 RESET CKT IO CONN
PG 45 CONNECTOR ICS954301
PG 33 PG 32
(478 Micro-FCPGA) PG 17 PG 40
BATT
RUN POWER PG 41
SELECTOR PG 3,4
SW
Panel Connector
PG 47 BATT 533/667 PG 19
PG 42
CHARGER MHz FSB LVDS

B
POWER DC/DC sDVO SI1362
DVI
B

Calistoga PG 18
400/533/667 MHZ DDR II TVOUT S-Video
DDR2-SODIMM1
PG 20
PG 15,16
1466 uFCBGA
400/533/667 MHZ DDR II VGA CRT
DDR2-SODIMM2 PG 5,6,7,8,9,10 PG 20
PG 15,16
USB2.0 (P5,P6)
2 Rear Ports PG 33
DMI X4 Interface
USB2.0 (P3,P4)
2 right Side PG 33
USB2.0 (P7)
SATA - HDD SATA
33MHz PCI DOCKING
PG 21 CONNECTOR
ICH7-M
ATA 66/100 1394 CONN CARDBUS PCMCIA LAN (100/10)
Internal Media Bay 652 BGA PG 39
C OZ711 CON. BCM4401 C
CD-ROM PG 21 USB2.0(P2)
PG 25 PG 24 PG 24
PG 36
AC97/Azalia PG 11,12,13,14
USB2.0 (P0)
E-Switch
PCIE MINI-PCIE
Wireless LAN
PI3L110Q
LPC USB2.0 (P1)
SPI
ECE_USB2.0(P1) PG 23 PG 37
AUDIO MDC
STAC9200 I/O Board CONN
PG 26 SIO MEC5004 SIO ECE5018
PG 34,35 PG 33
128KB Flash Expander ECE_USB2.0(P2) Bluetooth
BC
TMKBC USB 2.0 Hub(4) PG 31
SPI DOCK LPC
128 Pins VTQFP 128 Pins VTQFP
S/PDIF to Audio RJ11 to Tip
PG 27 PG 28
DOCK Jacks DOCK Ring
D
PG 39 PG 35 PG 39 PG 26 D

PS/2 QUANTA
Flash Touchpad
Keyboard IrDA Serial
Title
COMPUTER
PG 30 PG 27 PG 31 PG 38 PG 29 Schematic Block Diagram1

Size Document Number R ev


DM5 1A

Date: 星期二, 十二月 27, 2005 Sheet 1 of 59


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INDEX
Power & Ground
Pg# Description DNI LIST
Label Pg# Description Control Signal
1 Schematic Block Diagram 1
DC_IN+ AC ADAPTER (20V)
2 Front Page
PBATT+ MAIN BATTERY + (10~17V)
3-4 Yonah
A A
PWR_SRC MAIN POWER (10~20V)
5-10 Calistoga
11-14 ICH7
15-16 DDRII SO-DIMM(200P)
VHCORE CPU CORE POWER (1.25/1.15V) RUNPWROK
17 Clock Generator
1.05V AGTL+ POWER (1.05V) I/O RUNPWROK
18 SI1362
19 LCD Conn. & SSP
+3VRUN SLP_S3# CTRLD POWER RUN_ON
20 CRT & TV Conn.
+3VSUS SLP_S5# CTRLD POWER SUS_ON
21 SATA & IDE Conn.
+5VALW 8051 POWER (5V)
22 PAD & Screw Hole
+5VRUN SLP_S3# CTRLD POWER RUN_ON
23 MiniCard
B B
+5VSUS SLP_S5# CTRLD POWER SUS_ON
24 PCCARD&CONN
+5VHDD HDD POWER (5V) HDDC_EN#
25 1394
+5VMOD MODULE POWER (5V) MODC_EN#
26 MDC Conn.
STRB#/5V EXTERNAL FDD POWER (5V) FDD/LPT#
27-28 SIO (MEC5004 & ECE5018)
+5VRUN FAN POWER (5V) FAN_OFF/ON#
29 Serial Port
VDDA AUDIO ANALOG POWER (5V) RUN_ON
30 Flash ROM
1_8VSUS RESUME WELL IN ICH
31 Touch Pad CONN.& Bluetooth CONN
1_8VRUN SLP_S3# CTRLD POWER
32 FAN & Thermal
+3VALW 8051 POWER (3V)
33 Switch Board Conn. & LED & IO Board
V1_5RUN ALVISO POWER Non-CPU I/O
C 34-35 Azelia CODEC (STAC9751) & Phone Jack C

36 LAN BCM4401 10/100


GND ALL PAGES DIGITAL GROUND
37 LAN SWITCH / LAN POWER

38 FIR COMBO CONN GND

39 Docking Conn.

40 SYSTEM RESET/POWER GOOD


41-42 Battery Selector & Charger
43 1.8VSUS/0.9V
44 1.5V/1.05V
45 CPU Power
D 46 D/D Power D

47 RUN Power Switch QUANTA


48 DCIN , Batt
Title
COMPUTER
Index, DNI, Power & Ground
49 Power Block Diagram
Size Document Number R ev
DM5 3A
50 SMBUS Block Diagram
Date: 星期二, 十二月 27, 2005 Sheet 2 of 59
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1 2 3 4 5 6 7 8

H_A#[3..16] U6A H_D#[0..63] U6B H_D#[0..63]


5 H_A#[3..31] 5 H_D#[0..63] H_D#[0..63] 5
H_A#3 J4 H1 H_D#0 E22 AA23 H_D#32
A[3]# ADS# H_ADS# 5 D[0]# D[32]#
H_A#4 L4 E2 H_D#1 F24 AB24 H_D#33
A[4]# BNR# H_BNR# 5 D[1]# D[33]#
H_A#5 M3 G5 H_D#2 E26 V24 H_D#34
A[5]# BPRI# H_BPRI# 5 D[2]# D[34]#
H_A#6 K5 H_D#3 H22 V26 H_D#35
A[6]# D[3]# D[35]#

DATA GRP 0
H_A#7 H_D#4 H_D#36

DATA GRP 2
M1 A[7]# DEFER# H5 H_DEFER# 5 F23 D[4]# D[36]# W25

ADDR GROUP 0
H_A#8 N2 F21 H_D#5 G25 U23 H_D#37
A[8]# DRDY# H_DRDY# 5 D[5]# D[37]#
H_A#9 J1 E1 H_D#6 E25 U25 H_D#38
A[9]# DBSY# H_DBSY# 5 D[6]# D[38]#

CONTROL
H_A#10 N3 H_D#7 E23 U22 H_D#39
A
H_A#11 A[10]# H_D#8 D[7]# D[39]# H_D#40 A
P5 A[11]# BR0# F1 H_BR0# 5 K24 D[8]# D[40]# AB25
H_A#12 P2 H_D#9 G24 W22 H_D#41
H_A#13 A[12]# D[9]# D[41]#
L1 A[13]# IERR# D20 H_IERR# H_D#10 J24 D[10 D[42]# Y23 H_D#42
H_A#14 P4 B3 H_INIT# H_D#11 J23 AA26 H_D#43
A[14]# INIT# H_INIT# 11 D[11]# D[43]#
H_A#15 P1 H_D#12 H26 Y26 H_D#44
H_A#16 A[15]# H_D#13 D[12]# D[44]# H_D#45
R1 A[16]# LOCK# H4 H_LOCK# 5 F26 D[13]# D[45]# Y22
L2 H_D#14 K22 AC26 H_D#46
5 H_ADSTB#0 ADSTB[0]# D[14]# D[46]#
B1 H_RESET# H_D#15 H25 AA24 H_D#47
RESET# H_RESET# 5 D[15]# D[47]#
5 H_REQ#0 K3 REQ[0]# RS[0]# F3 H_RS#0 5 5 H_DSTBN#0 H23 DSTBN[0]# DSTBN[2]# W24 H_DSTBN#2 5
5 H_REQ#1 H2 REQ[1]# RS[1]# F4 H_RS#1 5 5 H_DSTBP#0 G22 DSTBP[0]# DSTBP[2]# Y25 H_DSTBP#2 5
5 H_REQ#2 K2 REQ[2]# RS[2]# G3 H_RS#2 5 5 H_DINV#0 J26 DINV[0]# DINV[2]# V23 H_DINV#2 5
5 H_REQ#3 J3 REQ[3]# TRDY# G2 H_TRDY# 5
L5 H_D#[0..63] H_D#[0..63]
5 H_REQ#4 H_A#[17..31] REQ[4]# 5 H_D#[0..63] H_D#[0..63] 5
G6 H_D#16 N22 AC22 H_D#48
5 H_A#[17..31] HIT# H_HIT# 5 D[16]# D[48]#
H_A#17 Y2 E4 H_D#17 K25 AC23 H_D#49
A[17]# HITM# H_HITM# 5 D[17]# D[49]#
H_A#18 U5 H_D#18 P26 AB22 H_D#50
H_A#19 A[18]# ITP_BPM#0 H_D#19 D[18]# D[50]# H_D#51
R3 A[19]# BPM[0]# AD4 R23 D[19]# D[51]# AA21

DATA GRP 1
H_A#20 ITP_BPM#1 Place voltage H_D#20 H_D#52

DATA GRP 3
W6 A[20]# BPM[1]# AD3 L25 D[20]# D[52]# AB21
divider within

XDP/ITP SIGNALS
H_A#21 U4 AD1 ITP_BPM#2 H_D#21 L22 AC25 H_D#53
H_A#22 A[21]# BPM[2]# ITP_BPM#3 0.5" of GTLREF H_D#22 D[21]# D[53]# H_D#54
Y5 A[22]# BPM[3]# AC4 L23 D[22]# D[54]# AD20
H_A#23 U2 AC2 ITP_BPM#4 pin H_D#23 M23 AE22 H_D#55
H_A#24 A[23]# PRDY# ITP_BPM#5 H_D#24 D[23]# D[55]# H_D#56
R4 A[24]# PREQ# AC1 P25 D[24]# D[56]# AF23
H_A#25 T5 AC5 ITP_TCK H_D#25 P22 AD24 H_D#57
H_A#26 A[25]# TCK ITP_TDI +1.05V_VCCP H_D#26 D[25]# D[57]# H_D#58
T3 A[26]# TDI AA6 P23 D[26]# D[58]# AE21
H_A#27 W3 AB3 ITP_TDO H_D#27 T24 AD21 H_D#59
H_A#28 A[27]# TDO ITP_TMS H_D#28 D[27]# D[59]# H_D#60
W5 A[28]# TMS AB5 R24 D[28]# D[60]# AE25
H_A#29 Y4 AB6 ITP_TRST# H_D#29 L26 AF25 H_D#61
H_A#30 A[29]# TRST# H_D#30 D[29]# D[61]# H_D#62
W2 A[30]# DBR# C20 ITP_DBRESET# 13,27 T25 D[30]# D[62]# AF22
H_A#31 Y1 H_D#31 N24 AF26 H_D#63
A[31]# D[31]# D[63]#
B
5 H_ADSTB#1 V4 ADSTB[1]# PROCHOT D21 H_PROCHOT# 5 H_DSTBN#1 M24 DSTBN[1]# DSTBN[3]# AD23 H_DSTBN#3 5 B

THERMDA A24 H_THERMDA H_THERMDA 32


R146
5 H_DSTBP#1 N25 DSTBP[1]# DSTBP[3]# AE24 H_DSTBP#3 5
THERM

H_A20M# A6 A25 H_THERMDC Routing together 1K/F M26 AC20


11 H_A20M# A20M# THERMDC H_THERMDC 32 Trace width/Spacing 5 H_DINV#1 DINV[1]# DINV[3]# H_DINV#3 5
H_FERR# A5
11 H_FERR# FERR# =10/10 mil
H_IGNNE# C4 C7 H_THERMTRIP# V_CPU_BTLREF AD26 R26 COMP0
11 H_IGNNE# IGNNE# THERMTRIP# H_THERMTRIP# 32 GTLREF COMP[0]
MISC U26 COMP1
H_STPCLK# CT_1214:Change R29 R29 *1K_NC COMP[1] COMP2
11 H_STPCLK# D5 STPCLK# COMP[2] U1
C6 from 51_NC to 1K_NC 1 2 TEST1 C26 V1 COMP3
H CLK

11 H_INTR LINT0 TEST1 COMP[3]


B4 A22 R142
11 H_NMI LINT1 BCLK[0] CLK_CPU_BCLK 17
H_SMI# A3 A21 2K/F 1 51 2 TEST2 D25 E5
11 H_SMI# SMI# BCLK[1] CLK_CPU_BCLK# 17 TEST2 DPRSTP# H_DPRSTP# 11,45
R28 B5
DPSLP# H_DPSLP# 11
AA1 Pop R28 for Yonah B0 & forward D24 H_DPWR# 5
RSVD[01]# DPWR#
AA4 RSVD[02]# RSVD[12]# T22 6,17 CPU_MCH_BSEL0 B22 BSEL[0] PWRGOOD D6 H_PWRGOOD 11
AB2 RSVD[03]# 6,17 CPU_MCH_BSEL1 B23 BSEL[1] SLP# D7 H_CPUSLP# 5,11

2
RESERVED

AA3 RSVD[04]# 6,17 CPU_MCH_BSEL2 C21 BSEL[2] PSI# AE6 H_PSI# 45


M4 D2 R154 R156 R155 R158
RSVD[05]# RSVD[13]# 54.9/F 27.4/F 54.9/F 27.4/F
N5 RSVD[06]# RSVD[14]# F6 Yonah
T2 RSVD[07]# RSVD[15]# D3
V3 C1

1
RSVD[08]# RSVD[16]#
B2 RSVD[09]# RSVD[17]# AF1
C3 D22 R30 *56_NC
RSVD[10]# RSVD[18]# H_DPRSTP#
RSVD[19]# C23 1 2
B25 C24 +1.05V_VCCP
RSVD[11]# RSVD[20]# R32 *56_NC Comp0,2 connect with Zo=27.4ohm.
Yonah R31 56 H_DPSLP# 1 2
H_THERMTRIP# 1 2
Comp1,3 connect with Zo=55ohm,
make these trace length shorter than 0.5".
R165 56
H_IERR# 1 2
C Populate for Yonah A0, C
de-pop for Yonah A1

+1.05V_VCCP +1.05V_VCCP +1.05V_VCCP


1
2

1
1

2
R218 R220R221 R222
51/F 39.2/F 150 R168
51
JITP1 +1.05V_VCCP +3.3V_SUS 75/F
2
1

2
2

1
ITP_TDI 1 27
TDI VTT0
1

ITP_TMS 2 28 0_0402
TMS VTT1
2

ITP_TCK 5 26 C337 R215 H_PROCHOT# CPU_PROCHOT#


TCK VTAP CPU_PROCHOT# 28
ITP_TDO 1 2 7 150
ITP_TRST# R219 22.6/F TDO 0.1U_10V R448
3
1

TRST#
2

H_RESET# 1 2 12 25 ITP_DBRESET#
R217 22.6/F RESET# DBR#
DBA# 24
+1.05V_VCCP ITP disable guidelines
ITP_TCK 11 FBO Signal Resistor Value Connect To Resistor Placement
1

D 8 23 ITP_BPM#0 TDI 150 ohm +/- 5% VTT Within 2.0" of the CPU D
17 CLK_CPU_ITP# BCLKN BPM0#
9 21 ITP_BPM#1
17 CLK_CPU_ITP BCLKP BPM1# TMS 39 ohm +/- 5% VTT Within 2.0" of the CPU
19 ITP_BPM#2
BPM2# ITP_BPM#3
10
14
GND0 BPM3# 17
15 ITP_BPM#4 R216 TRST# 680 ohm +/- 5% GND Within 2.0" of the CPU QUANTA
2

R150 27.4/F GND1 BPM4# ITP_BPM#5


16 GND2 BPM5# 13
ITP_TCK
ITP_TRST#
1
1
2
2
18
20
GND3
GND4 NC0 4
*54.9/F_NC TCK

TDO
27 ohm +/- 5%

Open
GND

VTT
Within 2.0" of the CPU

Within 2.0" of the CPU Title


COMPUTER
22 GND5 NC1 6
R153 680 Yonah Processor (HOST)
ITP_EN R268 Depop +3VRUN Close to CK410M Pin8
Size Document Number R ev
*ITP700_NC DM5 1A
Note: Populate R214, R216, C366, and R268 when ITP connector is populated.
Date: 星期二, 十二月 27, 2005 Sheet 3 of 59
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1 2 3 4 5 6 7 8

+VCC_CORE +VCC_CORE
+VCC_CORE U6C
A7 VCC[001] VCC[68] AB20 U6D
A9 VCC[002] VCC[69] AB7
A10 VCC[003] VCC[70] AC7 A4 VSS[001] VSS[082] P6
A12 VCC[004] VCC[71] AC9 A8 VSS[002] VSS[083] P21
C266 C248 C67 C66 C65 A13 AC12 A11 P24
10U_4V 10U_4V 10U_4V 10U_4V 10U_4V VCC[005] VCC[72] VSS[003] VSS[084]
A15 VCC[006] VCC[73] AC13 A14 VSS[004] VSS[085] R2
A17 VCC[007] VCC[74] AC15 A16 VSS[005] VSS[086] R5
A
A18 VCC[008] VCC[75] AC17 A19 VSS[006] VSS[087] R22 A
A20 VCC[009] VCC[76] AC18 A23 VSS[007] VSS[088] R25
B7 VCC[010] VCC[77] AD7 A26 VSS[008] VSS[089] T1
+VCC_CORE B9 AD9 B6 T4
VCC[011] VCC[78] VSS[009] VSS[090]
B10 VCC[012] VCC[79] AD10 B8 VSS[010] VSS[091] T23
B12 VCC[013] VCC[80] AD12 B11 VSS[011] VSS[092] T26
B14 VCC[014] VCC[81] AD14 B13 VSS[012] VSS[093] U3
B15 VCC[015] VCC[82] AD15 B16 VSS[013] VSS[094] U6
C64 C63 C61 C269 C267 B17 AD17 B19 U21
10U_4V 10U_4V 10U_4V 10U_4V 10U_4V VCC[016] VCC[83] VSS[014] VSS[095]
B18 VCC[017] VCC[84] AD18 B21 VSS[015] VSS[096] U24
B20 VCC[018] VCC[85] AE9 B24 VSS[016] VSS[097] V2
C9 VCC[019] VCC[86] AE10 C5 VSS[017] VSS[098] V5
C10 VCC[020] VCC[87] AE12 C8 VSS[018] VSS[099] V22
C12 VCC[021] VCC[88] AE13 C11 VSS[019] VSS[100] V25
+VCC_CORE C13 AE15 C14 W1
VCC[022] VCC[89] VSS[020] VSS[101]
C15 VCC[023] VCC[90] AE17 C16 VSS[021] VSS[102] W4
C17 VCC[024] VCC[91] AE18 C19 VSS[022] VSS[103] W23
C18 VCC[025] VCC[92] AE20 C2 VSS[023] VSS[104] W26
D9 VCC[026] VCC[93] AF9 C22 VSS[024] VSS[105] Y3
C60 C59 C58 C57 C273 D10 AF10 C25 Y6
10U_4V 10U_4V 10U_4V 10U_4V 10U_4V VCC[027] VCC[94] VSS[025] VSS[106]
D12 VCC[028] VCC[95] AF12 D1 VSS[026] VSS[107] Y21
D14 VCC[029] VCC[96] AF14 D4 VSS[027] VSS[108] Y24
D15 VCC[030] VCC[97] AF15 D8 VSS[028] VSS[109] AA2
D17 VCC[031] VCC[98] AF17 D11 VSS[029] VSS[110] AA5
D18 VCC[032] VCC[99] AF18 D13 VSS[030] VSS[111] AA8
+VCC_CORE E7 AF20 +1.05V_VCCP D16 AA11
VCC[033] VCC[100] VSS[031] VSS[112]
E9 VCC[034] D19 VSS[032] VSS[113] AA14
E10 VCC[035] VCCP[01] V6 D23 VSS[033] VSS[114] AA16
E12 VCC[036] VCCP[02] G21 D26 VSS[034] VSS[115] AA19
E13 VCC[037] VCCP[03] J6 E3 VSS[035] VSS[116] AA22
B C272 C271 C270 C268 C283 E15 K6 + C261 E6 AA25 B
10U_4V 10U_4V 10U_4V 10U_4V 10U_4V VCC[038] VCCP[04] *330U_2.5V_NC VSS[036] VSS[117]
E17 VCC[039] VCCP[05] M6 E8 VSS[037] VSS[118] AB1
E18 VCC[040] VCCP[06] J21 E11 VSS[038] VSS[119] AB4
E20 VCC[041] VCCP[07] K21 E14 VSS[039] VSS[120] AB8
F7 VCC[042] VCCP[08] M21 E16 VSS[040] VSS[121] AB11
F9 VCC[043] VCCP[09] N21 E19 VSS[041] VSS[122] AB13
F10 VCC[044] VCCP[10] N6 E21 VSS[042] VSS[123] AB16
+VCC_CORE F12 R21 E24 AB19
VCC[045] VCCP[11] +1.5V_RUN VSS[043] VSS[124]
F14 VCC[046] VCCP[12] R6 F5 VSS[044] VSS[125] AB23
F15 VCC[047] VCCP[13] T21 F8 VSS[045] VSS[126] AB26
F17 VCC[048] VCCP[14] T6 F11 VSS[046] VSS[127] AC3
F18 VCC[049] VCCP[15] V21 F13 VSS[047] VSS[128] AC6

1
C62 C252 C251 C250 C249 F20 W21 C68 C69 F16 AC8
10U_4V 10U_4V 10U_4V 10U_4V 10U_4V VCC[050] VCCP[16] 0.01U_25V 10U_4V VSS[048] VSS[129]
AA7 VCC[051] F19 VSS[049] VSS[130] AC11
AA9 B26 F2 AC14

2
VCC[052] VCCA CT_0530: Modify VSS[050] VSS[131]
AA10 VCC[053]
Place C28 F22 VSS[051] VSS[132] AC16
AA12 netname. near PIN B26 F25 AC19
VCC[054] VSS[052] VSS[133]
AA13 VCC[055] VID[0] AD6 CPU_VID0 45 G4 VSS[053] VSS[134] AC21
+VCC_CORE AA15 AF5 G1 AC24
VCC[056] VID[1] CPU_VID1 45 VSS[054] VSS[135]
AA17 AE5 +VCC_CORE G23 AD2
VCC[057] VID[2] CPU_VID2 45 VSS[055] VSS[136]
AA18 VCC[058] VID[3] AF4 CPU_VID3 45 G26 VSS[056] VSS[137] AD5
AA20 VCC[059] VID[4] AE3 CPU_VID4 45 H3 VSS[057] VSS[138] AD8
AB9 VCC[060] VID[5] AF2 CPU_VID5 45 H6 VSS[058] VSS[139] AD11
C247 C246 C245 C281 C282 AC10 AE2 H21 AD13
VCC[061] VID[6] CPU_VID6 45 VSS[059] VSS[140]
10U_4V 10U_4V 10U_4V 10U_4V 10U_4V AB10 R138 H24 AD16
VCC[062] 100/F VSS[060] VSS[141]
AB12 VCC[063] J2 VSS[061] VSS[142] AD19
AB14 VCC[064] J5 VSS[062] VSS[143] AD22
AB15 AF7 VCCSENSE J22 AD25
VCC[065]VCCSENSE VCCSENSE 45 VSS[063] VSS[144]
+VCC_CORE AB17 J25 AE1
VCC[066] VSSSENSE VSS[064] VSS[145]
C
AB18 VCC[067] VSSSENSE AE7 VSSSENSE 45 K1 VSS[065] VSS[146] AE4 C
K4 VSS[066] VSS[147] AE8
Yonah K23 AE11
VSS[067] VSS[148]
Route VCCSENSE and VSSSENSE Place PU & PD within K26 VSS[068] VSS[149] AE14
traces at 27.4ohms with 50mil R139 L3 AE16
C229 C215 100/F 1 inch of CPU L6
VSS[069] VSS[150]
AE19
spacing. Place PU and PD VSS[070] VSS[151]
10U_4V 10U_4V L21 AE23
within 0.5 inch of CPU. VSS[071] VSS[152]
L24 VSS[072] VSS[153] AE26
M2 VSS[073] VSS[154] AF3
M5 VSS[074] VSS[155] AF6
M22 VSS[075] VSS[156] AF8
M25 AF11
22uF 0805 X6S->105 degree C N1
VSS[076]
VSS[077]
VSS[157]
VSS[158] AF13
8 inside cavity north side secondary layer, 8 inside cavity N4 VSS[078] VSS[159] AF16
N23 AF19
south side secondary layer, 6 inside cavity north side N26
VSS[079] VSS[160]
AF21
VSS[080] VSS[161]
primary layer, 6 inside cavity south side primary layer. P3 VSS[081] VSS[162] AF24

Yonah

D +1.05V_VCCP D

QUANTA
1

C264 C254 C255 C256 C263 C262

0.1U_10V 0.1U_10V 0.1U_10V 0.1U_10V 0.1U_10V 0.1U_10V


COMPUTER
2

Title
Yonah Processor (POWER)

Size Document Number R ev


DM5 1A

Date: 星期二, 十二月 27, 2005 Sheet 4 of 59


1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

Layout note: H_XRCOMP & H_YRCOMP


trace width and spcaing is 10/20 mil
H_XRCOMP H_YRCOMP

1
R50 H_D#[0..63] U7A H_A#[3..31]
3 H_D#[0..63] H_A#[3..31] 3
24.9/F R57 H_D#0 F1 H9 H_A#3
H_D#1 H_D#_0 H_A#_3 H_A#4
24.9/F J1 H_D#_1 H_A#_4 C9
H_D#2 H1 E11 H_A#5
2

A
H_D#3 H_D#_2 H_A#_5 H_A#6 A
J6 G11

2
H_D#4 H_D#_3 H_A#_6 H_A#7
H3 H_D#_4 H_A#_7 F11
H_D#5 K2 G12 H_A#8
H_D#6 H_D#_5 H_A#_8 H_A#9
G1 H_D#_6 H_A#_9 F9
H_D#7 G2 H11 H_A#10
H_D#8 H_D#_7 H_A#_10 H_A#11
K9 H_D#_8 H_A#_11 J12
H_D#9 K1 G14 H_A#12
H_D#10 H_D#_9 H_A#_12 H_A#13
K7 H_D#_10 H_A#_13 D9
Layout note: H_YSCOMP & H_XSCOMP H_D#11 J8 J14 H_A#14
H_D#12 H_D#_11 H_A#_14 H_A#15
H4 H13
resistor should be less than 0.5" inch. H_D#13 J3
H_D#_12 H_A#_15
J15 H_A#16
H_D#14 H_D#_13 H_A#_16 H_A#17
K11 H_D#_14 H_A#_17 F14
+1.05V_VCCP +1.05V_VCCP H_D#15 G4 D12 H_A#18
H_D#16 H_D#_15 H_A#_18 H_A#19
T10 H_D#_16 H_A#_19 A11
H_D#17 W11 C11 H_A#20 H_VREF decoupling cap should be
H_D#_17 H_A#_20
1

H_D#18 T3 A12 H_A#21


R48 R52 H_D#19 U7
H_D#_18 H_A#_21
A13 H_A#22 placed within 100mils
H_D#20 H_D#_19 H_A#_22 H_A#23
54.9/F 54.9/F U9 H_D#_20 H_A#_23 E13
H_D#21 U11 G13 H_A#24 +1.05V_VCCP
H_D#22 H_D#_21 H_A#_24 H_A#25
T11 F12
2

H_XSCOMP H_YSCOMP H_D#23 H_D#_22 H_A#_25 H_A#26


W9 H_D#_23 H_A#_26 B12
H_D#24 T1 B14 H_A#27
H_D#25 H_D#_24 H_A#_27 H_A#28
T8 H_D#_25 H_A#_28 C12

2
H_D#26 T4 A14 H_A#29
H_D#27 H_D#_26 H_A#_29 H_A#30 R212
W7 H_D#_27 H_A#_30 C14
H_D#28 U5 D14 H_A#31 100/F
H_D#29 H_D#_28 H_A#_31
T9 H_D#_29
H_D#30 W6 E8 H_ADS# 3

1
H_D#31 H_D#_30 H_ADS#
H_SWING0,H_SWING1 should be 10mil T5 H_D#_31 H_ADSTB#_0 B9 H_ADSTB#0 3
B H_D#32 AB7 C13 B
wide & 20mil spacing. H_D#33 AA9
H_D#_32 H_ADSTB#_1
J13
H_ADSTB#1 3
H_VREF
H_D#34 H_D#_33 H_VREF_0
H_SWING0,H_SWING1 Resistors & Caps W4 H_D#_34 H_BNR# C6 H_BNR# 3
H_D#35 W3 F6
should be placed within 0.5"

HOST
H_D#_35 H_BPRI# H_BPRI# 3

1
H_D#36 Y3 C7
H_D#_36 H_BREQ#0 H_BR0# 3

1
H_D#37 Y7 B7 C336 R213
H_D#_37 H_CPURST# H_RESET# 3
+1.05V_VCCP +1.05V_VCCP H_D#38 W5 A7 0.1U_10V 200/F
H_D#_38 H_DBSY# H_DBSY# 3
H_D#39 Y10 C3 H_DEFER# 3

2
H_D#40 H_D#_39 H_DEFER#
AB8 J9 H_DPWR# 3

2
H_D#41 H_D#_40 H_DPWR#
W2 H_D#_41 H_DRDY# H8 H_DRDY# 3
1

H_D#42 AA4 K13


R47 R54 H_D#43 H_D#_42 H_VREF_1
AA7 H_D#_43
221/F 221/F H_D#44 AA2 J7
H_D#_44 H_DINV#_0 H_DINV#0 3
H_D#45 AA6 W8
H_D#_45 H_DINV#_1 H_DINV#1 3
H_D#46 AA10 U3 H_DINV#2 3
2

H_SWNG0 H_SWNG1 H_D#47 H_D#_46 H_DINV#_2


Y8 H_D#_47 H_DINV#_3 AB10 H_DINV#3 3
H_D#48 AA1 H_D#_48
1

H_D#49 AB4 K4
H_D#_49 H_DSTBN#_0 H_DSTBN#0 3
2

R46 R55 H_D#50 AC9 T7


H_D#_50 H_DSTBN#_1 H_DSTBN#1 3
100/F C321 100/F C84 H_D#51 AB11 Y5
H_D#_51 H_DSTBN#_2 H_DSTBN#2 3
0.1U_10V 0.1U_10V H_D#52 AC11 AC4 H_DSTBN#3 3
1

H_D#53 H_D#_52 H_DSTBN#_3


AB3
2

H_D#54 H_D#_53
AC2 H_D#_54 H_DSTBP#_0 K3 H_DSTBP#0 3
H_D#55 AD1 T6
H_D#_55 H_DSTBP#_1 H_DSTBP#1 3
H_D#56 AD9 AA5
H_D#_56 H_DSTBP#_2 H_DSTBP#2 3
H_D#57 AC1 AC5
H_D#_57 H_DSTBP#_3 H_DSTBP#3 3
H_D#58 AD7
H_D#59 H_D#_58
AC6 H_D#_59
H_D#60 AB5 D3
H_D#_60 H_HIT# H_HIT# 3
H_D#61 AD10 D4
C H_D#_61 H_HITM# H_HITM# 3 C
H_D#62 AD4 B3
H_D#_62 H_LOCK# H_LOCK# 3
H_D#63 AC8 H_D#_63
H_XRCOMP E1
H_XSCOMP H_XRCOMP
E2 H_XSCOMP H_REQ#_0 D8 H_REQ#0 3
H_SWNG0 E4 G8
H_XSWING H_REQ#_1 H_REQ#1 3
H_REQ#_2 B8 H_REQ#2 3
H_YRCOMP Y1 F8
H_YRCOMP H_REQ#_3 H_REQ#3 3
H_YSCOMP U1 A8
H_YSCOMP H_REQ#_4 H_REQ#4 3
H_SWNG1 W1 H_YSWING
H_RS#_0 B4 H_RS#0 3
17 CLK_MCH_BCLK AG2 H_CLKIN H_RS#_1 E6 H_RS#1 3
17 CLK_MCH_BCLK# AG1 H_CLKIN# H_RS#_2 D6 H_RS#2 3

H_SLPCPU# E3 H_CPUSLP# 3,11


H_TRDY# E7 H_TRDY# 3
Calistoga

D D

QUANTA
Title
COMPUTER
Calistoga (Host)

Size Document Number R ev


CustomDM5 1A

Date: 星期二, 十二月 27, 2005 Sheet 5 of 59


1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

U7B VCC3G_PCIE

T32 AY35 U7C R188 24.9/F


RSVD_1 SM_CK_0 M_CLK_DDR0 15
R32 AR1 +3.3V_RUN D32 D40 VCC3G_PCIE_R 1 2
RSVD_2 SM_CK_1 M_CLK_DDR1 15 19,27 BIA_PWM L_BKLTCTL EXP_A_COMPI
F3 AW7 R202 10K J30 D38
RSVD_3 SM_CK_2 M_CLK_DDR2 15 19 PANEL_BKEN L_BKLTEN EXP_A_COMPO
F7 AW40 1 2 LCTLA_CLK H30
RSVD_4 SM_CK_3 M_CLK_DDR3 15 L_CLKCTLA

RSVD
AG11 1 2 LCTLB_DAT H29 F34
RSVD_5 R203 10K L_CLKCTLB EXP_A_RXN_0
AF11 RSVD_6 SM_CK#_0 AW35 M_CLK_DDR#0 15 19 LCD_DDCCLK G26 L_DDC_CLK EXP_A_RXN_1 G38 SDVOB_INT- 18
H7 RSVD_7 SM_CK#_1 AT1 M_CLK_DDR#1 15 19 LCD_DDCDAT G25 L_DDC_DATA EXP_A_RXN_2 H34
J19 RSVD_8 SM_CK#_2 AY7 M_CLK_DDR#2 15 1 2 B38 L_IBG EXP_A_RXN_3 J38
A41 AY40 R183 1.5K/F C35 L34
RSVD_9 SM_CK#_3 M_CLK_DDR#3 15 L_VBG EXP_A_RXN_4
A
CFG[2:0] A35 RSVD_10 19 ENVDD F32 L_VDDEN EXP_A_RXN_5 M38 A
001=FSB533 A34 RSVD_11 SM_CKE_0 AU20 DDR_CKE0_DIMMA 15,16 C33 L_VREFH EXP_A_RXN_6 N34
011=FSB667 D28 RSVD_12 SM_CKE_1 AT20 DDR_CKE1_DIMMA 15,16 C32 L_VREFL EXP_A_RXN_7 P38
Others = Reserved D27 RSVD_13 SM_CKE_2 BA29 DDR_CKE2_DIMMB 15,16 EXP_A_RXN_8 R34
SM_CKE_3 AY29 DDR_CKE3_DIMMB 15,16 19 LCD_ACLK- A33 LA_CLK# EXP_A_RXN_9 T38
19 LCD_ACLK+ A32 LA_CLK EXP_A_RXN_10 V34
SM_CS#_0 AW13 DDR_CS0_DIMMA# 15,16 19 LCD_BCLK- E27 LB_CLK# EXP_A_RXN_11 W38
SM_CS#_1 AW12 DDR_CS1_DIMMA# 15,16 19 LCD_BCLK+ E26 LB_CLK EXP_A_RXN_12 Y34
3,17 CPU_MCH_BSEL0 K16 AY21 DDR_CS2_DIMMB# 15,16 AA38

MUXING
CFG_0 SM_CS#_2 EXP_A_RXN_13

LVDS
3,17 CPU_MCH_BSEL1 K18 CFG_1 SM_CS#_3 AW21 DDR_CS3_DIMMB# 15,16 19 LCD_A0- C37 LA_DATA#_0 EXP_A_RXN_14 AB34
3,17 CPU_MCH_BSEL2 J18 CFG_2 19 LCD_A1- B35 LA_DATA#_1 EXP_A_RXN_15 AC38
PAD T62 CFG3 F18 AL20 M_OCDOCMP0 R255 *40.2/F_NC Place R255,R247 A37
CFG_3 SM_OCDCOMP_0 19 LCD_A2- LA_DATA#_2
PAD T5 CFG4 E15 AF10 M_OCDOCMP1 close to MCH. D34
CFG5 CFG_4 SM_OCDCOMP_1 R247 *40.2/F_NC EXP_A_RXP_0
F15 CFG_5 EXP_A_RXP_1 F38 SDVOB_INT+ 18
1

CFG6 E18 BA13 Stuff R255,R247 G34

GRAPHICS
CFG_6 SM_ODT_0 M_ODT0 15,16 EXP_A_RXP_2
R200 CFG7 D19 BA12 for A1 Calistoga B37 H38
CFG_7 SM_ODT_1 M_ODT1 15,16 19 LCD_A0+ LA_DATA_0 EXP_A_RXP_3
*2.2K_NC PAD T61 CFG8 D16 AY20 B34 J34
CFG_8 SM_ODT_2 M_ODT2 15,16 V_DDR_MCH_REF 19 LCD_A1+ LA_DATA_1 EXP_A_RXP_4

CFG
CFG9 G16 AU21 A36 L38
Low=DMIx2 CFG_9 SM_ODT_3 M_ODT3 15,16 19 LCD_A2+ LA_DATA_2 EXP_A_RXP_5
CFG10 E16 M34
2

High=DMIx4 CFG_10 EXP_A_RXP_6

DDR
CFG11 D15 AV9 SMRCOMPN N38
CFG12 CFG_11 SM_RCOMP# SMRCOMPP EXP_A_RXP_7
G15 CFG_12 SM_RCOMP AT9 19 LCD_B0- G30 LB_DATA#_0 EXP_A_RXP_8 P34

1
CFG13 K15 C93 C559 D30 R38
CFG_13 19 LCD_B1- LB_DATA#_1 EXP_A_RXP_9
PAD T6 CFG14 C15 AK1 V_DDR_MCH_REF .1U_10V .1U_10V F29 T34
CFG_14 SM_VREF_0 19 LCD_B2- LB_DATA#_2 EXP_A_RXP_10
PAD T59 CFG15 H16 AK41 V38

2
CFG16 CFG_15 SM_VREF_1 EXP_A_RXP_11
G18 CFG_16 EXP_A_RXP_12 W34
PAD T63 CFG17 H15 Y38
CFG18 CFG_17 EXP_A_RXP_13
J25 CFG_18 G_CLKIN# AF33 CLK_MCH_3GPLL# 17 19 LCD_B0+ F30 LB_DATA_0 EXP_A_RXP_14 AA34
CFG19 K27 AG33 D29 AB38
CFG_19 G_CLKIN CLK_MCH_3GPLL 17 19 LCD_B1+ LB_DATA_1 EXP_A_RXP_15
CFG20 J26 A27 F28

PCI-EXPRESS
CFG_20 D_REFCLKIN# MCH_DREFCLK# 17 19 LCD_B2+ LB_DATA_2 DVO_RED#_C
CLK
D_REFCLKIN A26 MCH_DREFCLK 17 EXP_A_TXN_0 F36
B G28 C40 G40 DVO_GREEN#_C B
13 PM_BMBUSY# PM_BMBUSY# D_REFSSCLKIN# DREF_SSCLK# 17 EXP_A_TXN_1
PM_EXTTS#0 F25 D41 H36 DVO_BLUE#_C
15 PM_EXTTS#0 PM_EXTTS#_0 D_REFSSCLKIN DREF_SSCLK 17 EXP_A_TXN_2
PM

PM_EXTTS#1 H26 J40 DVO_CLK#_C


PM_EXTTS#_1 EXP_A_TXN_3
32 THERMTRIP_MCH# G6 PM_THRMTRIP# 20,39 TV_CVBS A16 TV_DACA_OUT EXP_A_TXN_4 L36
13,40 ICH_PW RGD AH33 PWROK DMI_RXN_0 AE35 DMI_MRX_ITX_N0 12 20,39 TV_Y C18 TV_DACB_OUT EXP_A_TXN_5 M40
PLTRST#_RAH34 AF39 A19 N36
RSTIN# DMI_RXN_1 DMI_MRX_ITX_N1 12 20,39 TV_C TV_DACC_OUT EXP_A_TXN_6

TV
DMI_RXN_2 AG35 DMI_MRX_ITX_N2 12 EXP_A_TXN_7 P40
DMI_RXN_3 AH39 DMI_MRX_ITX_N3 12 1 2 J20 TV_IREF EXP_A_TXN_8 R36
MISC

H28 R190 150/F B16 T40


18 SDVO_CTRLCLK SDVO_CTRLCLK TV_IRTNA EXP_A_TXN_9
H27 1 2 R208 B18 V36
18 SDVO_CTRLDATA SDVO_CTRLDATA TV_IRTNB EXP_A_TXN_10
K28 AC35 R185 150/F 4.99K/F B19 W40
12 MCH_ICH_SYNC# ICH_SYNC# DMI_RXP_0 DMI_MRX_ITX_P0 12 TV_IRTNC EXP_A_TXN_11
17 CLK_3GPLLREQ# H32 CLK_REQ# DMI_RXP_1 AE39 DMI_MRX_ITX_P1 12 1 2 EXP_A_TXN_12 Y36
AF35 R187 150/F K30 AA40
DMI_RXP_2 DMI_MRX_ITX_P2 12 TV_DCONSEL0 EXP_A_TXN_13
PAD T12 TP_NC0 D1 AG39 1 2 J29 AB36
NC0 DMI_RXP_3 DMI_MRX_ITX_P3 12 TV_DCONSEL1 EXP_A_TXN_14
PAD T60 TP_NC1 C41 AC40
TP_NC2 NC1 EXP_A_TXN_15
PAD T11 C1 NC2
PAD T33 TP_NC3 BA41 AE37 R194 *150/F_NC E23 D36 DVO_RED_C
NC3 DMI_TXN_0 DMI_MTX_IRX_N0 12 20,39 VGA_BLU CRT_BLUE EXP_A_TXP_0
PAD T24 TP_NC4 BA40 AF41 1 2 D23 F40 DVO_GREEN_C
NC4 DMI_TXN_1 DMI_MTX_IRX_N1 12 CRT_BLUE# EXP_A_TXP_1
NC

PAD T32 TP_NC5 BA39 AG37 R193 *150/F_NC C22 G36 DVO_BLUE_C
NC5 DMI_TXN_2 DMI_MTX_IRX_N2 12 20,39 VGA_GRN CRT_GREEN EXP_A_TXP_2

VGA
PAD T27 TP_NC6 BA3 AH41 1 2 B22 H40 DVO_CLK_C
NC6 DMI_TXN_3 DMI_MTX_IRX_N3 12 CRT_GREEN# EXP_A_TXP_3
PAD T35 TP_NC7 BA2 R186 *150/F_NC A21 J36
NC7 20,39 VGA_RED CRT_RED EXP_A_TXP_4
DMI

PAD T28 TP_NC8 BA1 1 2 B21 L40


TP_NC9 NC8 CRT_RED# EXP_A_TXP_5
PAD T8 B41 NC9 DMI_TXP_0 AC37 DMI_MTX_IRX_P0 12 EXP_A_TXP_6 M36
PAD T10 TP_NC10 B2 AE41 N40
NC10 DMI_TXP_1 DMI_MTX_IRX_P1 12 EXP_A_TXP_7
PAD T25 TP_NC11 AY41 AF37 C26 P36
NC11 DMI_TXP_2 DMI_MTX_IRX_P2 12 20 CLK_DDC2 CRT_DDC_CLK EXP_A_TXP_8
PAD T34 TP_NC12 AY1 AG41 C25 R40
NC12 DMI_TXP_3 DMI_MTX_IRX_P3 12 20 DAT_DDC2 CRT_DDC_DATA EXP_A_TXP_9
PAD T22 TP_NC13 AW41 1 2 G23 T36
NC13 20 VGA_HSYNC CRT_HSYNC EXP_A_TXP_10
PAD T26 TP_NC14 AW1 R35 39 1 2 J22 V40
TP_NC15 NC14 R214 255/F CRT_IREF EXP_A_TXP_11
PAD T4 A40 NC15 20 VGA_VSYNC 1 2 H23 CRT_VSYNC EXP_A_TXP_12 W36
PAD T9 TP_NC16 A4 R36 39 Y40
C
TP_NC17 NC16 EXP_A_TXP_13 C
PAD T7 A39 NC17 EXP_A_TXP_14 AA36
PAD T3 TP_NC18 A3 AB40
NC18 EXP_A_TXP_15

Calistoga Calistoga

2 1 PLTRST#_R
12,13,18,23,27,28 PLTRST# 100 R62
+3.3V_RUN
Note: CFG3:17 has internal pullup R206 10K
1 2 PM_EXTTS#0
CFG18:19 has internal pulldown
R201 *10K_NC DVO_RED#_C C326 1 2 .1U_10V
+3.3V_RUN SDVOB_RED- 18
CFG13 CFG12 1 2 PM_EXTTS#1 DVO_GREEN#_C C325 1 2 .1U_10V
SDVOB_GREEN- 18
CFG10 DVO_BLUE#_C C335 1 2 .1U_10V
SDVOB_BLUE- 18
1

CFG[13:12] R205 R227 0 DVO_CLK#_C C339 1 2 .1U_10V


SDVOB_CLK- 18
1

00 = Reserved R223 *2.2K_NC 1 2


*2.2K_NC Host PLL VCC Select R196 VCC Select R225 13,45 DPRSLPVR DVO_RED_C C323 .1U_10V
01 = XOR Mode Enabled 1 2 SDVOB_RED+ 18
10 = All Z Mode Enabled Low=Reserved *2.2K_NC Low=1.05V *1K_NC DVO_GREEN_C C322 1 2 .1U_10V
11 = Normal Operation(Default) High=Mobility High=1.5V SDVOB_GREEN+ 18
DVO_BLUE_C C330 1 2 .1U_10V
SDVOB_BLUE+ 18
2

DVO_CLK_C C334 1 2 .1U_10V


SDVOB_CLK+ 18
2

CFG18
CFG6
+3.3V_RUN +1.8V_SUS
1

CFG7 CFG11
Low= Moby R184
1

High=Calistoga *2.2K_NC +1.05V_VCCP


CPU_Strap R195 PSB 4X CLK Enable R192 DMI Lane Reversal R232 R263 R226 75
Low=RSVD *2.2K_NC Low=Calistoga *2.2K_NC Low=Normal *1K_NC 80.6/F 1 2 THERMTRIP_MCH#
2

High=Mobile CPU High=Reserved High=Lane Reversed


D D
2

CFG19 SMRCOMPN

+3.3V_RUN SMRCOMPP
CFG9 CFG16 PCIe Backward QUANTA
1

Interpoerability mode
1

PCIE Graphics Lane


Low= Reverse Lane R207
FSB Dynamic ODT
Low=Dynamic ODT Disable
R204
Low=Only SDVO or PCIEx1
is operational
*2.2K_NC (defaults)
R224
R261
80.6/F
Title
COMPUTER
*1K_NC
High=Normal operation High=Dynamic ODT Enable High=SDVO and PCIEx1 are Calistoga (VGA,DMI)
2

*2.2K_NC operating simultaneously


2

via PEG port Size Document Number R ev


CFG20 DM5 1A

Date: 星期二, 十二月 27, 2005 Sheet 6 of 59


1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

A A

15 DDR_A_D[0..63] 15 DDR_B_D[0..63]
U7D U7E
DDR_A_D0 AJ35 AU12 DDR_A_BS0 DDR_B_D0 AK39
SA_DQ0 SA_BS_0 DDR_A_BS0 15,16 SB_DQ0
DDR_A_D1 AJ34 AV14 DDR_A_BS1 DDR_B_D1 AJ37 AT24 DDR_B_BS0
SA_DQ1 SA_BS_1 DDR_A_BS1 15,16 SB_DQ1 SB_BS_0 DDR_B_BS0 15,16
DDR_A_D2 AM31 BA20 DDR_A_BS2 DDR_B_D2 AP39 AV23 DDR_B_BS1
SA_DQ2 SA_BS_2 DDR_A_BS2 15,16 SB_DQ2 SB_BS_1 DDR_B_BS1 15,16
DDR_A_D3 AM33 DDR_A_CAS# DDR_B_D3 AR41 AY28 DDR_B_BS2
SA_DQ3 DDR_A_CAS# 15,16 SB_DQ3 SB_BS_2 DDR_B_BS2 15,16
DDR_A_D4 AJ36 AY13 DDR_B_D4 AJ38 DDR_B_CAS#
SA_DQ4 SA_CAS# DDR_A_DM[0..7] 15 SB_DQ4 DDR_B_CAS# 15,16
DDR_A_D5 AK35 AJ33 DDR_A_DM0 DDR_B_D5 AK38 AR24
SA_DQ5 SA_DM_0 SB_DQ5 SB_CAS# DDR_B_DM[0..7] 15
DDR_A_D6 AJ32 AM35 DDR_A_DM1 DDR_B_D6 AN41 AK36 DDR_B_DM0
DDR_A_D7 SA_DQ6 SA_DM_1 DDR_A_DM2 DDR_B_D7 AP41 SB_DQ6 SB_DM_0 DDR_B_DM1
AH31 SA_DQ7 SA_DM_2 AL26 SB_DQ7 SB_DM_1 AR38
DDR_A_D8 AN35 AN22 DDR_A_DM3 DDR_B_D8 AT40 AT36 DDR_B_DM2
DDR_A_D9 SA_DQ8 SA_DM_3 DDR_A_DM4 DDR_B_D9 AV41 SB_DQ8 SB_DM_2 DDR_B_DM3
AP33 SA_DQ9 SA_DM_4 AM14 SB_DQ9 SB_DM_3 BA31
DDR_A_D10 AR31 AL9 DDR_A_DM5 DDR_B_D10 AU38 AL17 DDR_B_DM4
DDR_A_D11 SA_DQ10 SA_DM_5 DDR_A_DM6 DDR_B_D11 AV38 SB_DQ10 SB_DM_4 DDR_B_DM5
AP31 SA_DQ11 SA_DM_6 AR3 SB_DQ11 SB_DM_5 AH8
DDR_A_D12 AN38 AH4 DDR_A_DM7 DDR_B_D12 AP38 BA5 DDR_B_DM6
DDR_A_D13 SA_DQ12 SA_DM_7 DDR_B_D13 AR40 SB_DQ12 SB_DM_6 DDR_B_DM7
AM36 SA_DQ13 DDR_A_DQS[0..7] 15 SB_DQ13 SB_DM_7 AN4
DDR_A_D14 AM34 AK33 DDR_A_DQS0 DDR_B_D14 AW38
DDR_A_D15 AN33
SA_DQ14 A SA_DQS_0
AT33 DDR_A_DQS1 DDR_B_D15 AY38 SB_DQ14
AM39 DDR_B_DQS0
DDR_B_DQS[0..7] 15

B
DDR_A_D16 SA_DQ15 SA_DQS_1 DDR_A_DQS2 DDR_B_D16 BA38 SB_DQ15 SB_DQS_0 DDR_B_DQS1
AK26 SA_DQ16 SA_DQS_2 AN28 SB_DQ16 SB_DQS_1 AT39
DDR_A_D17 AL27 AM22 DDR_A_DQS3 DDR_B_D17 AV36 AU35 DDR_B_DQS2
DDR_A_D18 SA_DQ17 SA_DQS_3 DDR_A_DQS4 DDR_B_D18 AR36 SB_DQ17 SB_DQS_2 DDR_B_DQS3
AM26 SA_DQ18 SA_DQS_4 AN12 SB_DQ18 SB_DQS_3 AR29
DDR_A_D19 AN24 AN8 DDR_A_DQS5 DDR_B_D19 AP36 AR16 DDR_B_DQS4
MEMORY

DDR_A_D20 SA_DQ19 SA_DQS_5 DDR_A_DQS6 DDR_B_D20 BA36 SB_DQ19 SB_DQS_4 DDR_B_DQS5


AK28 AP3 AR10

MEMORY
DDR_A_D21 SA_DQ20 SA_DQS_6 DDR_A_DQS7 DDR_B_D21 AU36 SB_DQ20 SB_DQS_5 DDR_B_DQS6
B AL28 SA_DQ21 SA_DQS_7 AG5 DDR_A_DQS#[0..7] 15 SB_DQ21 SB_DQS_6 AR7 B
DDR_A_D22 AM24 AK32 DDR_A_DQS#0 DDR_B_D22 AP35 AN5 DDR_B_DQS7
SA_DQ22 SA_DQS#_0 SB_DQ22 SB_DQS_7 DDR_B_DQS#[0..7] 15
DDR_A_D23 AP26 AU33 DDR_A_DQS#1 DDR_B_D23 AP34 AM40 DDR_B_DQS#0
DDR_A_D24 SA_DQ23 SA_DQS#_1 DDR_A_DQS#2 DDR_B_D24 AY33 SB_DQ23 SB_DQS#_0 DDR_B_DQS#1
AP23 SA_DQ24 SA_DQS#_2 AN27 SB_DQ24 SB_DQS#_1 AU39
DDR_A_D25 AL22 AM21 DDR_A_DQS#3 DDR_B_D25 BA33 AT35 DDR_B_DQS#2
DDR_A_D26 SA_DQ25 SA_DQS#_3 DDR_A_DQS#4 DDR_B_D26 AT31 SB_DQ25 SB_DQS#_2 DDR_B_DQS#3
AP21 SA_DQ26 SA_DQS#_4 AM12 SB_DQ26 SB_DQS#_3 AP29
DDR_A_D27 AN20 AL8 DDR_A_DQS#5 DDR_B_D27 AU29 AP16 DDR_B_DQS#4
DDR_A_D28 SA_DQ27 SA_DQS#_5 DDR_A_DQS#6 DDR_B_D28 AU31 SB_DQ27 SB_DQS#_4 DDR_B_DQS#5
AL23 SA_DQ28 SA_DQS#_6 AN3 SB_DQ28 SB_DQS#_5 AT10
DDR_A_D29 AP24 AH5 DDR_A_DQS#7 DDR_B_D29 AW31 AT7 DDR_B_DQS#6
DDR_A_D30 SA_DQ29 SA_DQS#_7 DDR_B_D30 AV29 SB_DQ29 SB_DQS#_6 DDR_B_DQS#7
AP20 SA_DQ30 DDR_A_MA[0..13] 15,16 SB_DQ30 SB_DQS#_7 AP5
DDR_A_D31 AT21 AY16 DDR_A_MA0 DDR_B_D31 AW29
SA_DQ31 SA_MA_0 SB_DQ31 DDR_B_MA[0..13] 15,16
DDR_A_D32 DDR_A_MA1 DDR_B_D32 AM19 DDR_B_MA0
SYSTEM

AR12 SA_DQ32 SA_MA_1 AU14 SB_DQ32 SB_MA_0 AY23


DDR_A_D33 DDR_A_MA2 DDR_B_D33 AL19 DDR_B_MA1

SYSTEM
AR14 SA_DQ33 SA_MA_2 AW16 SB_DQ33 SB_MA_1 AW24
DDR_A_D34 AP13 BA16 DDR_A_MA3 DDR_B_D34 AP14 AY24 DDR_B_MA2
DDR_A_D35 SA_DQ34 SA_MA_3 DDR_A_MA4 DDR_B_D35 AN14 SB_DQ34 SB_MA_2 DDR_B_MA3
AP12 SA_DQ35 SA_MA_4 BA17 SB_DQ35 SB_MA_3 AR28
DDR_A_D36 AT13 AU16 DDR_A_MA5 DDR_B_D36 AN17 AT27 DDR_B_MA4
DDR_A_D37 SA_DQ36 SA_MA_5 DDR_A_MA6 DDR_B_D37 AM16 SB_DQ36 SB_MA_4 DDR_B_MA5
AT12 SA_DQ37 SA_MA_6 AV17 SB_DQ37 SB_MA_5 AT28
DDR_A_D38 AL14 AU17 DDR_A_MA7 DDR_B_D38 AP15 AU27 DDR_B_MA6
DDR_A_D39 SA_DQ38 SA_MA_7 DDR_A_MA8 DDR_B_D39 AL15 SB_DQ38 SB_MA_6 DDR_B_MA7
AL12 SA_DQ39 SA_MA_8 AW17 SB_DQ39 SB_MA_7 AV28
DDR_A_D40 AK9 AT16 DDR_A_MA9 DDR_B_D40 AJ11 AV27 DDR_B_MA8
DDR_A_D41 SA_DQ40 SA_MA_9 DDR_A_MA10 DDR_B_D41 AH10 SB_DQ40 SB_MA_8 DDR_B_MA9
AN7 SA_DQ41 SA_MA_10 AU13 SB_DQ41 SB_MA_9 AW27
DDR_A_D42 AK8 AT17 DDR_A_MA11 DDR_B_D42 AJ9 AV24 DDR_B_MA10
DDR_A_D43 SA_DQ42 SA_MA_11 DDR_A_MA12 DDR_B_D43 AN10 SB_DQ42 SB_MA_10 DDR_B_MA11
AK7 SA_DQ43 SA_MA_12 AV20 SB_DQ43 SB_MA_11 BA27
DDR_A_D44 AP9 AV12 DDR_A_MA13 DDR_B_D44 AK13 AY27 DDR_B_MA12
SA_DQ44 SA_MA_13 SB_DQ44 SB_MA_12
DDR

DDR_A_D45 AN9 DDR_B_D45 AH11 AR23 DDR_B_MA13


SA_DQ45 SB_DQ45 SB_MA_13

DDR
DDR_A_D46 AT5 AW14 DDR_A_RAS# DDR_B_D46 AK10
SA_DQ46 SA_RAS# DDR_A_RAS# 15,16 SB_DQ46
DDR_A_D47 AL5 AK23 T70 PAD DDR_B_D47 AJ8 AU23 DDR_B_RAS#
SA_DQ47 SA_RCVENIN# SB_DQ47 SB_RAS# DDR_B_RAS# 15,16
DDR_A_D48 AY2 AK24 T69 PAD DDR_B_D48 BA10 AK16 T71 PAD
DDR_A_D49 SA_DQ48 SA_RCVENOUT# SB_DQ48 SB_RCVENIN#
AW2 SA_DQ49 SA_WE# AY14 DDR_A_WE# DDR_A_WE# 15,16
DDR_B_D49 AW10
SB_DQ49 SB_RCVENOUT# AK18 T68 PAD
DDR_A_D50 AP1 DDR_B_D50 BA4 AR27 DDR_B_WE#
C SA_DQ50 SB_DQ50 SB_WE# DDR_B_WE# 15,16 C
DDR_A_D51 AN2 DDR_B_D51 AW4
DDR_A_D52 SA_DQ51 DDR_B_D52 AY10 SB_DQ51
AV2 SA_DQ52 SB_DQ52
DDR_A_D53 AT3 DDR_B_D53 AY9
DDR_A_D54 SA_DQ53 DDR_B_D54 AW5 SB_DQ53
AN1 SA_DQ54 SB_DQ54
DDR_A_D55 AL2 DDR_B_D55 AY5
DDR_A_D56 SA_DQ55 DDR_B_D56 AV4 SB_DQ55
AG7 SA_DQ56 SB_DQ56
DDR_A_D57 AF9 DDR_B_D57 AR5
DDR_A_D58 SA_DQ57 DDR_B_D58 AK4 SB_DQ57
AG4 SA_DQ58 SB_DQ58
DDR_A_D59 AF6 DDR_B_D59 AK3
DDR_A_D60 SA_DQ59 DDR_B_D60 AT4 SB_DQ59
AG9 SA_DQ60 SB_DQ60
DDR_A_D61 AH6 DDR_B_D61 AK5
DDR_A_D62 SA_DQ61 DDR_B_D62 AJ5 SB_DQ61
AF4 SA_DQ62 SB_DQ62
DDR_A_D63 AF8 DDR_B_D63 AJ3
SA_DQ63 SB_DQ63
Calistoga Calistoga

D D

QUANTA
Title
COMPUTER
Calistoga (DDR2)

Size Document Number R ev


CustomDM5 1A

Date: 星期二, 十二月 27, 2005 Sheet 7 of 59


1 2 3 4 5 6 7 8
5 4 3 2 1

U7G
+1.05V_VCCP AA33 VCC_0
W33 Place near C94 close to U2.AT41
VCC_1
P33 Place near C92 close to U2.AM41
VCC_2
N33 VCC_3
L33 VCC_4 VCC_SM_0 AU41
J33 AT41 VCCSM_LF4
VCC_5 VCC_SM_1 VCCSM_LF5
AA32 VCC_6 VCC_SM_2 AM41
Y32 AU40 +1.05V_VCCP
VCC_7 VCC_SM_3

1
W32 VCC_8 VCC_SM_4 BA34
V32 AY34 C92 C94 U7F
VCC_9 VCC_SM_5 0.47U_10V 0.47U_10V
P32 AW34 AD27

2
VCC_10 VCC_SM_6 VCC_NCTF0
N32 VCC_11 VCC_SM_7 AV34 AC27 VCC_NCTF1 VSS_NCTF0 AE27

1
M32 AU34 C344 AB27 AE26
D VCC_12 VCC_SM_8 + C342 C360 C350 VCC_NCTF2 VSS_NCTF1 D
L32 VCC_13 VCC_SM_9 AT34 AA27 VCC_NCTF3 VSS_NCTF2 AE25
J32 AR34 330U_2.5V 10U_4V 1U_10V 0.22U_10V Y27 AE24

2
VCC_14 VCC_SM_10 VCC_NCTF4 VSS_NCTF3
AA31 VCC_15 VCC_SM_11 BA30 W27 VCC_NCTF5 VSS_NCTF4 AE23
W31 VCC_16 VCC_SM_12 AY30 V27 VCC_NCTF6 VSS_NCTF5 AE22
V31 VCC_17 VCC_SM_13 AW30 U27 VCC_NCTF7 VSS_NCTF6 AE21
T31 VCC_18 VCC_SM_14 AV30 T27 VCC_NCTF8 VSS_NCTF7 AE20
R31 VCC_19 VCC_SM_15 AU30 R27 VCC_NCTF9 VSS_NCTF8 AE19
P31 VCC_20 VCC_SM_16 AT30 AD26 VCC_NCTF10 VSS_NCTF9 AE18
N31 AR30 +1.05V_VCCP AC26 AC17
VCC_21 VCC_SM_17 VCC_NCTF11 VSS_NCTF10
M31 VCC_22 VCC_SM_18 AP30 AB26 VCC_NCTF12 VSS_NCTF11 Y17
AA30 VCC_23 VCC_SM_19 AN30 AA26 VCC_NCTF13 VSS_NCTF12 U17
Y30 VCC_24 VCC_SM_20 AM30 Y26 VCC_NCTF14
W30 VCC_25 VCC_SM_21 AM29 W26 VCC_NCTF15

1
V30 AL29 C345 V26
VCC_26 VCC_SM_22 + C364 C355 C343 VCC_NCTF16
U30 VCC_27 VCC_SM_23 AK29 U26 VCC_NCTF17
T30 AJ29 330U_2.5V 10U_4V 0.22U_10V 0.22U_10V T26

2
VCC_28 VCC_SM_24 VCC_NCTF18
R30 VCC_29 VCC_SM_25 AH29 R26 VCC_NCTF19 VCCAUX_NCTF0 AG27 +1.5V_RUN
P30 VCC_30 VCC_SM_26 AJ28 AD25 VCC_NCTF20 VCCAUX_NCTF1 AF27
N30 VCC_31 VCC_SM_27 AH28 AC25 VCC_NCTF21 VCCAUX_NCTF2 AG26
M30 VCC_32 VCC_SM_28 AJ27 AB25 VCC_NCTF22 VCCAUX_NCTF3 AF26
L30 VCC_33 VCC_SM_29 AH27 AA25 VCC_NCTF23 VCCAUX_NCTF4 AG25
AA29 VCC_34 VCC_SM_30 BA26 Y25 VCC_NCTF24 VCCAUX_NCTF5 AF25
Y29 VCC_35 VCC_SM_31 AY26 W25 VCC_NCTF25 VCCAUX_NCTF6 AG24
W29 AW26 C107 V25 AF24
VCC_36 VCC_SM_32 VCC_NCTF26 VCCAUX_NCTF7

1
V29 AV26 C106 C108 C105 U25 AG23
VCC_37 VCC_SM_33 VCC_NCTF27 VCCAUX_NCTF8
U29 VCC_38 VCC_SM_34 AU26 T25 VCC_NCTF28 VCCAUX_NCTF9 AF23
R29 AT26 .1U_10V .1U_10V .1U_10V .1U_10V R25 AG22

2
VCC_39 VCC_SM_35 VCC_NCTF29 VCCAUX_NCTF10
P29 VCC_40 VCC_SM_36 AR26 AD24 VCC_NCTF30 VCCAUX_NCTF11 AF22
M29 VCC_41 VCC_SM_37 AJ26 AC24 VCC_NCTF31 VCCAUX_NCTF12 AG21
C L29 VCC_42 VCC_SM_38 AH26 AB24 VCC_NCTF32 VCCAUX_NCTF13 AF21 C
AB28 VCC_43 VCC_SM_39 AJ25 AA24 VCC_NCTF33 VCCAUX_NCTF14 AG20
AA28 VCC_44 VCC_SM_40 AH25 Y24 VCC_NCTF34 VCCAUX_NCTF15 AF20
Y28 VCC_45 VCC_SM_41 AJ24 W24 VCC_NCTF35 VCCAUX_NCTF16 AG19
V28 AH24 Plac e C104 close to U3.BA23 V24 AF19
VCC_46 VCC_SM_42 VCC_NCTF36 VCCAUX_NCTF17
U28 VCC_47 VCC_SM_43 BA23 U24 VCC_NCTF37 VCCAUX_NCTF18 R19
T28 VCC_48 VCC_SM_44 AJ23 T24 VCC_NCTF38 VCCAUX_NCTF19 AG18

1
R28 VCC_49 VCC_SM_45 BA22 R24 VCC_NCTF39 VCCAUX_NCTF20 AF18
P28 AY22 C104 AD23 R18
VCC_50 VCC_SM_46 0.47U_10V VCC_NCTF40 VCCAUX_NCTF21
N28 AW22 V23 AG17

2
VCC_51 VCC_SM_47 VCC_NCTF41 VCCAUX_NCTF22
M28 VCC_52 VCC_SM_48 AV22 U23 VCC_NCTF42 VCCAUX_NCTF23 AF17
L28 VCC_53 VCC_SM_49 AU22 T23 VCC_NCTF43 VCCAUX_NCTF24 AE17
P27 VCC_54 VCC_SM_50 AT22 R23 VCC_NCTF44 VCCAUX_NCTF25 AD17
N27 AR22 +1.8V_SUS AD22 AB17
VCC_55 VCC_SM_51 VCC_NCTF45 VCCAUX_NCTF26
M27 VCC_56 VCC_SM_52 AP22 V22 VCC_NCTF46 VCCAUX_NCTF27 AA17
L27 VCC_57 VCC_SM_53 AK22 U22 VCC_NCTF47 VCCAUX_NCTF28 W17
P26 VCC_58 VCC_SM_54 AJ22 T22 VCC_NCTF48 VCCAUX_NCTF29 V17
N26 VCC_59 VCC_SM_55 AK21 R22 VCC_NCTF49 VCCAUX_NCTF30 T17
L26 AK20 AD21 R17
N25
M25
VCC_60
VCC_61
VCC_62
VCC_SM_56
VCC_SM_57
VCC_SM_58
BA19
AY19
+ C88
*330U_2.5V_NC
V21
U21
VCC_NCTF50
VCC_NCTF51
VCC_NCTF52
NCTF VCCAUX_NCTF31
VCCAUX_NCTF32
VCCAUX_NCTF33
AG16
AF16
L25 VCC_63 VCC_SM_59 AW19 T21 VCC_NCTF53 VCCAUX_NCTF34 AE16
P24 VCC_64 VCC_SM_60 AV19 R21 VCC_NCTF54 VCCAUX_NCTF35 AD16
N24 VCC_65 VCC_SM_61 AU19 AD20 VCC_NCTF55 VCCAUX_NCTF36 AC16
M24 VCC_66 VCC_SM_62 AT19 V20 VCC_NCTF56 VCCAUX_NCTF37 AB16
AB23 VCC_67 VCC_SM_63 AR19 U20 VCC_NCTF57 VCCAUX_NCTF38 AA16
AA23 AP19 T20 Y16
Y23
P23
VCC_68
VCC_69
VCC_70
VCC VCC_SM_64
VCC_SM_65
VCC_SM_66
AK19
AJ19
R20
AD19
VCC_NCTF58
VCC_NCTF59
VCC_NCTF60
VCCAUX_NCTF39
VCCAUX_NCTF40
VCCAUX_NCTF41
W16
V16
B
N23 VCC_71 VCC_SM_67 AJ18 V19 VCC_NCTF61 VCCAUX_NCTF42 U16 B
M23 VCC_72 VCC_SM_68 AJ17 U19 VCC_NCTF62 VCCAUX_NCTF43 T16
L23 VCC_73 VCC_SM_69 AH17 T19 VCC_NCTF63 VCCAUX_NCTF44 R16
AC22 AJ16 +1.8V_SUS AD18 AG15
VCC_74 VCC_SM_70 VCC_NCTF64 VCCAUX_NCTF45
AB22 VCC_75 VCC_SM_71 AH16 AC18 VCC_NCTF65 VCCAUX_NCTF46 AF15
Y22 VCC_76 VCC_SM_72 BA15 AB18 VCC_NCTF66 VCCAUX_NCTF47 AE15
W22 VCC_77 VCC_SM_73 AY15 AA18 VCC_NCTF67 VCCAUX_NCTF48 AD15
1

P22 VCC_78 VCC_SM_74 AW15 Y18 VCC_NCTF68 VCCAUX_NCTF49 AC15


N22 AV15 C374 C373 C103 W18 AB15
VCC_79 VCC_SM_75 10U_4V 10U_4V 0.47U_10V VCC_NCTF69 VCCAUX_NCTF50
M22 AU15 V18 AA15
2

VCC_80 VCC_SM_76 VCC_NCTF70 VCCAUX_NCTF51


L22 VCC_81 VCC_SM_77 AT15 U18 VCC_NCTF71 VCCAUX_NCTF52 Y15
AC21 AR15 Place C103 near pin U2.BA15 T18 W15
VCC_82 VCC_SM_78 Place In Cavity VCC_NCTF72 VCCAUX_NCTF53
AA21 VCC_83 VCC_SM_79 AJ15 VCCAUX_NCTF54 V15
W21 VCC_84 VCC_SM_80 AJ14 VCCAUX_NCTF55 U15
N21 VCC_85 VCC_SM_81 AJ13 VCCAUX_NCTF56 T15
M21 VCC_86 VCC_SM_82 AH13 VCCAUX_NCTF57 R15
L21 VCC_87 VCC_SM_83 AK12
AC20 VCC_88 VCC_SM_84 AJ12 Calistoga
AB20 VCC_89 VCC_SM_85 AH12
Y20 VCC_90 VCC_SM_86 AG12
W20 VCC_91 VCC_SM_87 AK11
P20 VCC_92 VCC_SM_88 BA8
N20 VCC_93 VCC_SM_89 AY8
M20 VCC_94 VCC_SM_90 AW8
L20 VCC_95 VCC_SM_91 AV8
AB19 VCC_96 VCC_SM_92 AT8
AA19 VCC_97 VCC_SM_93 AR8
Y19 VCC_98 VCC_SM_94 AP8
N19 VCC_99 VCC_SM_95 BA6
M19 VCC_100 VCC_SM_96 AY6
A L19 VCC_101 VCC_SM_97 AW6 A
N18 VCC_102 VCC_SM_98 AV6
M18 VCC_103 VCC_SM_99 AT6
L18
P17
N17
VCC_104
VCC_105
VCC_SM_100
VCC_SM_101
AR6
AP6
AN6
Place near U2.AV1 & AJ1 QUANTA
VCC_106 VCC_SM_102
M17
N16
VCC_107
VCC_108
VCC_SM_103
VCC_SM_104
AL6
AK6 VCCSM_LF2
C97
1
0.47U_10V
2
Title
COMPUTER
M16 VCC_109 VCC_SM_105 AJ6
L16 AV1 C91 0.47U_10V Calistoga (VCC, NCTF)
VCC_110 VCC_SM_106 VCCSM_LF1
VCC_SM_107 AJ1 1 2
Size Document Number R ev
CustomDM5 1A
Calistoga
Date: 星期二, 十二月 27, 2005 Sheet 8 of 59
5 4 3 2 1
5 4 3 2 1

VCC3G_PCIE +2.5V_RUN
L17 U7H
+1.5V_RUN 1 2 VCC3G_PCIE H22 VCCSYNC

1
BLM18PG330SN1 AC14 +1.05V_VCCP
VTT_0

1
CT_1214: Removed C79
+
C87 C90 Place C79 and C87 on +2.5V_RUN C30
B30
VCC_TXLVDS0 VTT_1 AB14
W14
VCC_TXLVDS1 VTT_2

1
R49 0_0805 ohm. 150U_2V_L 10U_4V 10U_4V same side as A30 V14

2
C328 C305 C312 VCC_TXLVDS2 VTT_3 +1.05V_VCCP
VTT_4 T14
Calostoga. No Vias. .01U 4.7U .1U_10V VCC3G_PCIE AJ41 R14

2
VCC3G0 VTT_5
AB41 VCC3G1 VTT_6 P14
L46 R249 Y41 N14
VCC3G2 VTT_7

1
+1.5V_RUN 1 2 VCCA_3GPLL_R 2 1 VCCA_3GPLL V41 VCC3G3 VTT_8 M14
BLM18PG181SN1 R41 L14 C346 C358
VCC3G4 VTT_9

1
0.5/F N41 AD13 2.2U_6.3V 4.7U

2
VCC3G5 VTT_10

1
D +2.5V_RUN D
C365 L41 AC13
C354 .1U_10V C329 .1U_10V VCCA_3GPLL VCC3G6 VTT_11
AC33 AB13

2
10U_4V VCCA_3GPLL VTT_12
2 1 G41 AA13

2
VCCA_3GBG VTT_13
H41 VSSA_3GBG VTT_14 Y13
C329 should b e place within 200mils W13 Place in Cavity.
VTT_15
F21 VCCA_CRTDAC0 VTT_16 V13
+2.5V_RUN +2.5V_CRTDAC E21 U13
VCCA_CRTDAC1 VTT_17
G21 VSSA_CRTDAC VTT_18 T13
D18 R171 10 L41 R178 0 R13
VCCA_CRTDAC VCCA_DPLLA VTT_19 +1.05V_VCCP
2 1 1 2 1 2 1 2 B26 VCCA_DPLLA VTT_20 N13
+1.05V_VCCP BLM18PG181SN1 VCCA_DPLLB C39 M13
VCCA_DPLLB VTT_21

1
C293 3 1 C324 VCCA_HPLL AF1 L13
RB751V VCCA_HPLL VTT_22
.1U_10V .022U
Route Caps within 250mil or VTT_23 AB12

1
C298 +2.5V_RUN A38 AA12 C78

2
VCCA_LVDS VTT_24
Calistoga. Route FB within *22NF_3P_NC B39 VSSA_LVDS VTT_25 Y12 + C82

1
W12 330U_2.5V .22U

2
VTT_26
3" of Calistoga. C310 C301 VCCA_MPLL AF2 VCCA_MPLL VTT_27 V12
.1U_10V .01U U12

2
VCC_TVBG_R VTT_28
H20 VCCA_TVBG VTT_29 T12
VSS_TVBG
Route VSSACRTDAC gnd from GMCH to decoupling cap G20 VSSA_TVBG VTT_30 R12
P12
VTT_31
ground lead and then connect to gnd plane. VTT_32 N12 Place on the edge.
VTT_33 M12
VCC_TVDACA_R E19 L12
VCCA_TVDACA0 VTT_34
F19 VCCA_TVDACA1 VTT_35 R11
+1.5V_RUN +1.5V_RUN VCC_TVDACB_R C20 P11
L42 L45 VCCA_TVDACB0 VTT_36
D20 VCCA_TVDACB1 VTT_37 N11
2 1 VCCA_DPLLA 2 1 VCCA_HPLL VCC_TVDACC_R E20 M11
10uH BLM11A121S F20
VCCA_TVDACC0
VCCA_TVDACC1 POWER VTT_38
VTT_39 R10
1

C
VTT_40 P10 C
1

1
C319 + C71 +1.5V_RUN AH1 N10
.1U_10V 470U_4V C367 C362 VCCD_HMPLL0 VTT_41
AH2 VCCD_HMPLL1 VTT_42 M10
.1U_10V 22U P9
2

2
VTT_43
+1.5V_RUN A28 VCCD_LVDS0 VTT_44 N9
B28 VCCD_LVDS1 VTT_45 M9

1
C28 VCCD_LVDS2 VTT_46 R8
L16 L47 C304 C311 P8
VCCA_DPLLB VCCA_MPLL 10U_4V .1U_10V VCCD_TVDAC_R VTT_47
2 1 2 1 D21 N8

2
10uH BLM11A121S VCCD_TVDAC VTT_48
VTT_49 M8
1

+3.3V_RUN A23 VCC_HV0 VTT_50 P7


1

C316 + C76 B23 N7


VCC_HV1 VTT_51

1
.1U_10V 470U_4V C375 C378 B25 M7
.1U_10V 22U C308 C303 VCC_HV2 VTT_52
R6 Place close to pin A6
2

10U_4V .1U_10V VCCQ_TVDAC_R VTT_53


H19 P6

2
VCCD_QTVDAC VTT_54 C73 .47U_10V
VTT_55 M6
AK31 A6 VTTLF_CAP3 1 2
VCCAUX0 VTT_56
AF31 VCCAUX1 VTT_57 R5
AE31 VCCAUX2 VTT_58 P5
L40 R180 0 AC31 N5
VCC_TVDACA 1 VCC_TVDACA_R +1.5V_RUN VCCAUX3 VTT_59
+3.3V_RUN 1 2 2 AL30 VCCAUX4 VTT_60 M5
AK30 VCCAUX5 VTT_61 P4
2

BLM18PG181SN1 1 3 AJ30 N4
VCCAUX6 VTT_62
1

R163 C313 C314 AH30 M4


VCCAUX7 VTT_63

1
C278 .1U_10V C306 *22NF_3P_NC .022U C369 AG30 R3
2

10 10U_4V .1U_10V VCCAUX8 VTT_64


AF30 P3
2

D17 VCCAUX9 VTT_65


AE30 N3
1

2
+1.5V_RUN VCCAUX10 VTT_66
2 1 AD30 VCCAUX11 VTT_67 M3
R172 0 AC30 R2
RB751V VCC_TVDACB 1 VCCAUX12 VTT_68
2 VCC_TVDACB_R AG29 P2
B VCCAUX13 VTT_69 B
AF29 VCCAUX14 VTT_70 M2 Place close to pin D2
1

1 3 AE29 D2 VTTLF_CAP2
C279 C320 VCCAUX15 VTT_71 VTTLF_CAP1
AD29 VCCAUX16 VTT_72 AB1
.1U_10V C285 *22NF_3P_NC .022U AC29 R1
2

VCCAUX17 VTT_73

1
AG28 VCCAUX18 VTT_74 P1
AF28 N1 C86 C75
VCCAUX19 VTT_75 .47U_10V .22U
AE28 M1

2
R177 0 VCCAUX20 VTT_76
AH22 VCCAUX21
VCC_TVDACC 1 2 VCC_TVDACC_R AJ21 VCCAUX22
AH21 VCCAUX23 Place close to pin AB1
1

1 3 AJ20 VCCAUX24
C294 C297 AH20
.1U_10V C295 *22NF_3P_NC .022U VCCAUX25
AH19
2

VCCAUX26
P19 VCCAUX27
P16 VCCAUX28
AH15 VCCAUX29
R181 0 P15
VCC_TVBG VCC_TVBG_R VCCAUX30
1 2 AH14 VCCAUX31
AG14 VCCAUX32
1

1 3 AF14 VCCAUX33
C296 C280 C327 AE14
2.2U_6.3V .1U_10V C307 *22NF_3P_NC .022U VCCAUX34
Route VSSA_TVBG_GND from GMCH to Y14
2

VSS_TVBG VCCAUX35
AF13 VCCAUX36
decoupling cap ground lead and then connect AE13 VCCAUX37
AF12 VCCAUX38
to the GND plane. AE12 VCCAUX39
+1.5V_RUN R170 0 AD12
VCCD_TVDAC 1 VCCD_TVDAC_R VCCAUX40
2
1

A C284 1 3 C289 Calistoga A


.1U_10V .022U
2

C286 *22NF_3P_NC
2

L15 R33 0
4.7U, 10U and 22U should be placed <500mils with QUANTA
1 2
BLM18PG181SN1
VCCQ_TVDAC 1 2 VCCQ_TVDAC_R in its pins.
0.1U should be placed <200mils with in its pins.
COMPUTER
1

1 3 Title
C70 C74 Calistoga (Power)
.1U_10V C72 *22NF_3P_NC .022U 22n should be placed with in its pins.
2

Size Document Number R ev


CustomDM5 1A

Date: 星期二, 十二月 27, 2005 Sheet 9 of 59


5 4 3 2 1
5 4 3 2 1

U7I
AC41 AK34 U7J
VSS_0 VSS_97
AA41 VSS_1 VSS_98 AG34 AT23 VSS_180 VSS_273 J11
W41 VSS_2 VSS_99 AF34 AN23 VSS_181 VSS_274 D11
T41 VSS_3 VSS_100 AE34 AM23 VSS_182 VSS_275 B11
P41 VSS_4 VSS_101 AC34 AH23 VSS_183 VSS_276 AV10
M41 VSS_5 VSS_102 C34 AC23 VSS_184 VSS_277 AP10
J41 VSS_6 VSS_103 AW33 W23 VSS_185 VSS_278 AL10
F41 VSS_7 VSS_104 AV33 K23 VSS_186 VSS_279 AJ10
AV40 VSS_8 VSS_105 AR33 J23 VSS_187 VSS_280 AG10
AP40 VSS_9 VSS_106 AE33 F23 VSS_188 VSS_281 AC10
AN40 VSS_10 VSS_107 AB33 C23 VSS_189 VSS_282 W10
D
AK40 VSS_11 VSS_108 Y33 AA22 VSS_190 VSS_283 U10 D
AJ40 VSS_12 VSS_109 V33 K22 VSS_191 VSS_284 BA9
AH40 VSS_13 VSS_110 T33 G22 VSS_192 VSS_285 AW9
AG40 VSS_14 VSS_111 R33 F22 VSS_193 VSS_286 AR9
AF40 VSS_15 VSS_112 M33 E22 VSS_194 VSS_287 AH9
AE40 VSS_16 VSS_113 H33 D22 VSS_195 VSS_288 AB9
B40 VSS_17 VSS_114 G33 A22 VSS_196 VSS_289 Y9
AY39 VSS_18 VSS_115 F33 BA21 VSS_197 VSS_290 R9
AW39 VSS_19 VSS_116 D33 AV21 VSS_198 VSS_291 G9
AV39 VSS_20 VSS_117 B33 AR21 VSS_199 VSS_292 E9
AR39 VSS_21 VSS_118 AH32 AN21 VSS_200 VSS_293 A9
AN39 VSS_22 VSS_119 AG32 AL21 VSS_201 VSS_294 AG8
AJ39 VSS_23 VSS_120 AF32 AB21 VSS_202 VSS_295 AD8
AC39 VSS_24 VSS_121 AE32 Y21 VSS_203 VSS_296 AA8
AB39 VSS_25 VSS_122 AC32 P21 VSS_204 VSS_297 U8
AA39 VSS_26 VSS_123 AB32 K21 VSS_205 VSS_298 K8
Y39 VSS_27 VSS_124 G32 J21 VSS_206 VSS_299 C8
W39 VSS_28 VSS_125 B32 H21 VSS_207 VSS_300 BA7
V39 VSS_29 VSS_126 AY31 C21 VSS_208 VSS_301 AV7
T39 VSS_30 VSS_127 AV31 AW20 VSS_209 VSS_302 AP7
R39 AN31 AR20 AL7
P39
N39
VSS_31
VSS_32
VSS_128
VSS_129 AJ31
AG31
AM20
AA20
VSS_210
VSS_211 VSS VSS_303
VSS_304 AJ7
AH7
M39
L39
VSS_33
VSS_34
VSS_35
VSS VSS_130
VSS_131
VSS_132
AB31
Y31
K20
B20
VSS_212
VSS_213
VSS_214
VSS_305
VSS_306
VSS_307
AF7
AC7
J39 VSS_36 VSS_133 AB30 A20 VSS_215 VSS_308 R7
H39 VSS_37 VSS_134 E30 AN19 VSS_216 VSS_309 G7
G39 VSS_38 VSS_135 AT29 AC19 VSS_217 VSS_310 D7
F39 VSS_39 VSS_136 AN29 W19 VSS_218 VSS_311 AG6
D39 VSS_40 VSS_137 AB29 K19 VSS_219 VSS_312 AD6
C AT38 VSS_41 VSS_138 T29 G19 VSS_220 VSS_313 AB6 C
AM38 VSS_42 VSS_139 N29 C19 VSS_221 VSS_314 Y6
AH38 VSS_43 VSS_140 K29 AH18 VSS_222 VSS_315 U6
AG38 VSS_44 VSS_141 G29 P18 VSS_223 VSS_316 N6
AF38 VSS_45 VSS_142 E29 H18 VSS_224 VSS_317 K6
AE38 VSS_46 VSS_143 C29 D18 VSS_225 VSS_318 H6
C38 VSS_47 VSS_144 B29 A18 VSS_226 VSS_319 B6
AK37 VSS_48 VSS_145 A29 AY17 VSS_227 VSS_320 AV5
AH37 VSS_49 VSS_146 BA28 AR17 VSS_228 VSS_321 AF5
AB37 VSS_50 VSS_147 AW28 AP17 VSS_229 VSS_322 AD5
AA37 VSS_51 VSS_148 AU28 AM17 VSS_230 VSS_323 AY4
Y37 VSS_52 VSS_149 AP28 AK17 VSS_231 VSS_324 AR4
W37 VSS_53 VSS_150 AM28 AV16 VSS_232 VSS_325 AP4
V37 VSS_54 VSS_151 AD28 AN16 VSS_233 VSS_326 AL4
T37 VSS_55 VSS_152 AC28 AL16 VSS_234 VSS_327 AJ4
R37 VSS_56 VSS_153 W28 J16 VSS_235 VSS_328 Y4
P37 VSS_57 VSS_154 J28 F16 VSS_236 VSS_329 U4
N37 VSS_58 VSS_155 E28 C16 VSS_237 VSS_330 R4
M37 VSS_59 VSS_156 AP27 AN15 VSS_238 VSS_331 J4
L37 VSS_60 VSS_157 AM27 AM15 VSS_239 VSS_332 F4
J37 VSS_61 VSS_158 AK27 AK15 VSS_240 VSS_333 C4
H37 VSS_62 VSS_159 J27 N15 VSS_241 VSS_334 AY3
G37 VSS_63 VSS_160 G27 M15 VSS_242 VSS_335 AW3
F37 VSS_64 VSS_161 F27 L15 VSS_243 VSS_336 AV3
D37 VSS_65 VSS_162 C27 B15 VSS_244 VSS_337 AL3
AY36 VSS_66 VSS_163 B27 A15 VSS_245 VSS_338 AH3
AW36 VSS_67 VSS_164 AN26 BA14 VSS_246 VSS_339 AG3
AN36 VSS_68 VSS_165 M26 AT14 VSS_247 VSS_340 AF3
AH36 VSS_69 VSS_166 K26 AK14 VSS_248 VSS_341 AD3
B
AG36 VSS_70 VSS_167 F26 AD14 VSS_249 VSS_342 AC3 B
AF36 VSS_71 VSS_168 D26 AA14 VSS_250 VSS_343 AA3
AE36 VSS_72 VSS_169 AK25 U14 VSS_251 VSS_344 G3
AC36 VSS_73 VSS_170 P25 K14 VSS_252 VSS_345 AT2
C36 VSS_74 VSS_171 K25 H14 VSS_253 VSS_346 AR2
B36 VSS_75 VSS_172 H25 E14 VSS_254 VSS_347 AP2
BA35 VSS_76 VSS_173 E25 AV13 VSS_255 VSS_348 AK2
AV35 VSS_77 VSS_174 D25 AR13 VSS_256 VSS_349 AJ2
AR35 VSS_78 VSS_175 A25 AN13 VSS_257 VSS_350 AD2
AH35 VSS_79 VSS_176 BA24 AM13 VSS_258 VSS_351 AB2
AB35 VSS_80 VSS_177 AU24 AL13 VSS_259 VSS_352 Y2
AA35 VSS_81 VSS_178 AL24 AG13 VSS_260 VSS_353 U2
Y35 VSS_82 VSS_179 AW23 P13 VSS_261 VSS_354 T2
W35 VSS_83 F13 VSS_262 VSS_355 N2
V35 VSS_84 D13 VSS_263 VSS_356 J2
T35 VSS_85 B13 VSS_264 VSS_357 H2
R35 VSS_86 AY12 VSS_265 VSS_358 F2
P35 VSS_87 AC12 VSS_266 VSS_359 C2
N35 VSS_88 K12 VSS_267 VSS_360 AL1
M35 VSS_89 H12 VSS_268
L35 VSS_90 E12 VSS_269
J35 VSS_91 AD11 VSS_270
H35 VSS_92 AA11 VSS_271
G35 VSS_93 Y11 VSS_272
F35 VSS_94
D35 VSS_95 Calistoga
AN34 VSS_96

Calistoga
A A

QUANTA
Title
COMPUTER
Calistoga (VSS,NCTF)

Size Document Number R ev


CustomDM5 1A

Date: 星期二, 十二月 27, 2005 Sheet 10 of 59


5 4 3 2 1
1 2 3 4 5 6 7 8

R110 10M
32.768KHZ 2 1

W1 R439
ICH_RTCX1 1 4 1 2 ICH_RTCX2

0_0402 U9A R361 56


2 3
1

ICH_RTCX1 AB1 AA6 H_FERR# 1 2 +1.05V_VCCP


RTXC1 LAD0 LPC_LAD0 27,28

1
C177 ICH_RTCX2 AB2 AB5
RTCX2 LAD1 LPC_LAD1 27,28
32.768KHZ C178 AC4

LPC
RTC
LPC_LAD2 27,28
2

15P_50V ICH_RTCRST# LAD2 R365 *56_NC


AA3 Y6 LPC_LAD3 27,28

2
15P_50V RTCRST# LAD3 H_DPRSTP# 1 2 +1.05V_VCCP
SM_INTRUDER# Y5 AC3 LPC_LDRQ0#
A INTRUDER# LDRQ0# LPC_LDRQ0# 28 A
SM_INTVRMEN W4 AA5 LPC_LDRQ1#
INTVRMEN LDRQ1#/GPIO23 LPC_LDRQ1# 28
R363 *56_NC
W1 AB3 H_DPSLP# 1 2 +1.05V_VCCP
+RTC_CELL T54 PAD EE_CS LFRAME# LPC_LFRAME# 27,28
T55 PAD Y1 EE_SHCLK
Y2 AE22 SIO_A20GATE
T49 PAD EE_DOUT A20GATE SIO_A20GATE 27
T50 PAD W3 EE_DIN A20M# AH28 H_A20M# 3
R97 *0_NC
1

2
V3 AG27 R_CPUSLP# 1 2
T94 PAD LAN_CLK CPUSLP# H_CPUSLP# 3,5
R417 R364 0
R416 R415 20K U3 AF24 1 2 +3.3V_RUN

LAN
CPU
T96 PAD LAN_RSTSYNC TP1/DPRSTP# H_DPRSTP# 3,45
1M 332K/F AH25 1 2
TP2/DPSLP# H_DPSLP# 3
U5 R99 0
T88 PAD
2

1
ICH_RTCRST# LAN_RXD0
T89 PAD V4 LAN_RXD1 FERR# AG26 H_FERR# 3

2
SM_INTRUDER# T5
T95 PAD LAN_RXD2
SM_INTVRMEN AG24 R372 R369
GPIO49/CPUPWRGD H_PWRGOOD 3 10K
T83 PAD U7 LAN_TXD0 10K
1

T84 PAD V6 LAN_TXD1


1

T85 PAD V7 AG22 H_IGNNE# 3 R99 & R366 can be

1
R403 C532 LAN_TXD2 IGNNE# SIO_A20GATE
AG21
*0_NC 1U_10V ACZ_BIT_CLK U1
INIT3_3V#
AF22 H_INIT# 3
removed on RTS SIO_RCIN#
2

ACZ_S YNC ACZ_BIT_CLK INIT#


Pop R1580 & no pop R1581

AC-97/AZALIA
R6 AF25 H_INTR 3
2

ACZ_SYNC INTR
to disable internal VR. ACZ_RST# R5 ACZ_RST# RCIN# AG23 SIO_RCIN# 27

34 ICH_AZ_CODEC_SDIN0 T2 ACZ_SDIN0 NMI AH24 H_NMI 3


26 ICH_AZ_MDC_SDIN1 T3 ACZ_SDIN1 SMI# AF23 1 2 H_SMI# 3
T52 PAD T1 R366 0
ACZ_SDIN2
STPCLK# AH22 H_STPCLK# 3
ACZ_SDOUT T4 ACZ_SDOUT THERMTRIP#_ICH
B
THERMTRIP# AF26 B
C472 3900P_25V SATA_ACT# AF18
33 SATA_ACT# SATALED# IDE_DD[0..15] +1.05V_VCCP
2 1 SATA_C_TX0-
21 SATA_TX0- IDE_DD[0..15] 21
SATA_RX0- AF3 AB15 IDE_DD0
21 SATA_RX0- SATA0RXN DD0

2
C469 3900P_25V SATA_RX0+ AE3 AE14 IDE_DD1
21 SATA_RX0+ SATA0RXP DD1
2 1 SATA_C_TX0+ SATA_C_TX0- AG2 AG13 IDE_DD2 R96
21 SATA_TX0+ SATA0TXN DD2
SATA_C_TX0+ AH2 AF13 IDE_DD3 56
SATA0TXP DD3 IDE_DD4
DD4 AD14
AF7 AC13 IDE_DD5

1
Distance between the ICH-7 M and cap on the "P" SATA2RXN DD5 IDE_DD6 THERMTRIP#_ICH
AE7 SATA2RXP DD6 AD12
signal should be identical distance between the AG6 AC12 IDE_DD7
ICH-6 M and cap on the "N" signal for same SATA2TXN DD7 IDE_DD8
AH6 SATA2TXP DD8 AE12

2
pair. AF12 IDE_DD9
DD9 IDE_DD10 C167
AF1 AB13

SATA
17 CLK_PCIE_SATA# SATA_CLKN DD10
AE1 AC14 IDE_DD11 *0.1U_10V_NC
17 CLK_PCIE_SATA

1
SATA_CLKP DD11 IDE_DD12
DD12 AF14
R393 24.9/F AH10 AH13 IDE_DD13
Place within 500mils SATARBIASN DD13
2 1 SATABIAS AG10 SATARBIASP DD14 AH14 IDE_DD14
R381 8.2K of ICH6 ball AC15 IDE_DD15
IDE_IRQ DD15
+3.3V_RUN
IDE_DIOR# IDE_DA0
R8 *10K_NC
21 IDE_DIOR#
IDE_DIOW#
AF15
AH15
DIOR# IDE DA0 AH17
AE17 IDE_DA1
IDE_DA0 21
21 IDE_DIOW# DIOW# DA1 IDE_DA1 21
2 1 SATA_ACT# 21 IDE_DDACK#
IDE_DDACK# AF16 DDACK# DA2 AF17 IDE_DA2
IDE_DA2 21
IDE_IRQ AH16
21 IDE_IRQ IDEIRQ
IDE_DIOR DY AG16 AE16 IDE_DCS1#
X1,X2 Docking 21 IDE_DIORDY IORDY DCS1# IDE_DCS1# 21
IDE_DDREQ AE15 AD16 IDE_DCS3#
IAC_SYNC Port X Line 21 IDE_DDREQ DDREQ DCS3# IDE_DCS3# 21
R126
ICH7-M
1 1X2,2X1 STUFF
C
0 4X1 UNSTUFF R8 can be C

removed on RTS

R411 33 R106 33
1 2 ICH_AZ_MDC_SYNC 26 1 2 ICH_AZ_MDC_SDOUT 26
ACZ_S YNC ACZ_SDOUT
R412 33 R111 33
1 2 ICH_AZ_CODEC_SYNC 34 1 2 ICH_AZ_CODEC_SDOUT 34

R108 33 R107 33
1 2 ICH_AZ_MDC_BITCLK 26 1 2 ICH_AZ_MDC_RST# 26
D ACZ_BIT_CLK ACZ_RST# D
R109 33 R112 33
1 2 ICH_AZ_CODEC_BITCLK 34 1 2 ICH_AZ_CODEC_RST# 34
QUANTA
1

C180 C179

*27P_50V_NC *27P_50V_NC
COMPUTER
2

Title
Place All Series Term close to ICH except for the SDIN input lines, which should be close to ICH7-M (CPU,IDE,SATA,LPC,AC97)
the source. All resister value should tuned during EA. Placement of R87,R88,R91,R92 should be
Equal distance to the "T" split trace point as R89,R90,R93,R94. resp. Basically, keep the same Size Document Number R ev
distance from "T" for all seriess termination resistor. DM5 1A

Date: 星期二, 十二月 27, 2005 Sheet 11 of 59


1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

U9D
F26 PERn1 DMI0RXN V26 DMI_MTX_IRX_N0 6
F25 V25 DMI_MTX_IRX_P0 6

Direct Media Interface


PERp1 DMI0RXP
E28 PETn1 DMI0TXN U28 DMI_MRX_ITX_N0 6
E27 PETp1 DMI0TXP U27 DMI_MRX_ITX_P0 6

23 PCIE_RX2- H26 PERn2 DMI1RXN Y26 DMI_MTX_IRX_N1 6


23 PCIE_RX2+ H25 PERp2 DMI1RXP Y25 DMI_MTX_IRX_P1 6
MiniWLAN 1 2 PCIE_TXN2_C G28 W28
23 PCIE_TX2- PETn2 DMI1TXN DMI_MRX_ITX_N1 6
1 2 C168 0.1U_10V PCIE_TXP2_C G27 W27
23 PCIE_TX2+ PETp2 DMI1TXP DMI_MRX_ITX_P1 6
C169 0.1U_10V

PCI-Express
A A
K26 PERn3 DMI2RXN AB26 DMI_MTX_IRX_N2 6
K25 PERp3 DMI2RXP AB25 DMI_MTX_IRX_P2 6
J28 PETn3 DMI2TXN AA28 DMI_MRX_ITX_N2 6
J27 PETp3 DMI2TXP AA27 DMI_MRX_ITX_P2 6
M26 PERn4 DMI3RXN AD25 DMI_MTX_IRX_N3 6
M25 PERp4 DMI3RXP AD24 DMI_MTX_IRX_P3 6
L28 PETn4 DMI3TXN AC28 DMI_MRX_ITX_N3 6
L27 PETp4 DMI3TXP AC27 DMI_MRX_ITX_P3 6
+3.3V_SUS CT_1223: added R470
damping resistor per CDC. P26 PERn5 DMI_CLKN AE28 CLK_PCIE_ICH# 17
P25 PERp5 DMI_CLKP AE27 CLK_PCIE_ICH 17
CT_1226: Change N28 PETn5

1
to Circle pad. N27 C25 R358 24.9/F Place within 500mils of ICH-7
R394 R404 R413 PETp5 DMI_ZCOMP DMI_COMP
DMI_IRCOMP D25 2 1 +1.5V_RUN
T25 PERn6
10K 10K 10K T24 F1 USBP0- 24
PERp6 USBP0N Cardbus
R28 F2 USBP0+ 24

2
PETn6 USBP0P
R27 PETp6 USBP1N G4 USBP1- 28
R414 47 G3 USBP1+ 28 ECE_USB[0]
ICH_EC_SPI_CLK USBP1P
27 ICH_EC_SPI_CLK 1 2 R2 SPI_CLK USBP2N H1 USBP2- 21
SPI_CS# 1 2 P6 H2 USBP2+ 21 FDD
27,30 SPI_CS# SPI_CS# USBP2P
R470 47 P1 J4 USBP3- 33

SPI
47 SPI_ARB USBP3N Ext Side Top
R402 USBP3P J3 USBP3+ 33
ICH_EC_SPI_DO 1 2 P5 K1 USBP4- 33
27 ICH_EC_SPI_DO SPI_MOSI USBP4N Ext Side Bottom
ICH_EC_SPI_DIN P2 K2 USBP4+ 33

USB
27 ICH_EC_SPI_DIN SPI_MISO USBP4P
USBP5N L4 USBP5- 33
OC0# D3 L5 USBP5+ 33 Ext Back Top
OC1# OC0# USBP5P
C4 OC1# USBP6N M1 USBP6- 33
B OC2# D5 M2 USBP6+ 33 Ext Back Bottom B
OC3# OC2# USBP6P
33 USB_OC3_4# D4 OC3# USBP7N N4 USBP7- 39
OC4# E5 N3 USBP7+ 39 For Dock
OC5# OC4# USBP7P PCI Pullups
33 USB_OC5_6# C3 OC5#/GPIO29
OC6# A2 D2 R410 22.6/F +3.3V_RUN
RP20 OC7# OC6#/GPIO30 USBRBIAS# USBRBIAS RP18
B3 OC7#/GPIO31 USBRBIAS D1 2 1
OC2# 6 5 +3.3V_SUS 6 5
7 4 USB_OC5_6# ICH7-M Place within 500mils of ICH-7 PCI_DEVSEL# 7 4 ICH_GPIO2_PIRQE#
OC7# 8 3 USB_OC3_4# PCI_SERR# 8 3 PCI_PERR#
9 2 OC1# PCI_REQ4# 9 2 PCI_REQ5#
10 1 OC0# 10 1 ICH_GPIO4_PIRQG#
+3.3V_SUS +3.3V_RUN
10P8R-10K 10P8R-8.2K
+3.3V_RUN
RP17
PCI_TRDY# 6 5
R331 NP boot from FWH, REQ0 : DOCKING PCI_STOP# 7 4 PCI_PLOCK#
populate boot from REQ1 : Card Bus PCI_FRAME# 8 3 PCI_REQ3#
REQ4 : BroadCOM LAN PCI_REQ1# 9 2 PCI_REQ2#
MiniPCI.
10 1
+3.3V_RUN
GNT5# GNT4# 10P8R-8.2K
U9B +3.3V_RUN
PCI_AD0 E18 D7 PCI_REQ0# LPC 11 No stuff No stuff
PCI_AD1 AD0 REQ0# PCI_GNT0# RP19
PCI_AD2
C18
A16
AD1 PCI GNT0# E7
C16 PCI_REQ1#
PAD T90
PCI 10 No stuff Stuff PCI_PIRQA# 6 5
AD2 REQ1# PCI_REQ1# 24 Cardbus/1394
PCI_AD3 F18 D16 PCI_GNT1# PCI_PIRQB# 7 4 PCI_PIRQC#
AD3 GNT1# PCI_GNT1# 24
PCI_AD4 E16 C17 PCI_REQ2# SPI 01 Stuff No stuff PCI_PIRQD# 8 3 ICH_GPIO3_PIRQF#
PCI_AD5 AD4 REQ2# PCI_GNT2# PCI_IRD Y# ICH_GPIO5_PIRQH#
C
A18 AD5 GNT2# D17 PAD T80 9 2 C
PCI_AD6 E17 E13 PCI_REQ3# 10 1 PCI_REQ0#
AD6 REQ3# PCI_REQ3# 36 LOM(4401)
PCI_AD7 A17 F13 PCI_GNT3# +3.3V_RUN
AD7 GNT3# PCI_GNT3# 36
PCI_AD8 A15 A13 PCI_REQ4#
AD8 REQ4#/GPIO22 10P8R-8.2K
PCI_AD9 C14 A14 PCI_GNT4#
AD9 GNT4#/GPIO48 PCI_GNT4#
PCI_AD10 E14 C8 PCI_REQ5# CLK_PCI_ICH
PCI_AD11 AD10 GPIO1/REQ5# PCI_GNT5# +3.3V_SUS
D14 AD11 GPIO17/GNT5# D8 PCI_GNT5# Add Buffers as needed for
PCI_AD12 B12 C475 Loading and fanout
AD12
2

2
PCI_AD13 C13 B15 1 2
AD13 C/BE0# PCI_C_BE0# 24,36 concerns.
PCI_AD14 G15 C12 R398
AD14 C/BE1# PCI_C_BE1# 24,36
PCI_AD15 G13 D12 R391 R101 0.047U_10V
AD15 C/BE2# PCI_C_BE2# 24,36

5
PCI_AD16 E12 C15 1K *1K_NC *10_NC U26
AD16 C/BE3# PCI_C_BE3# 24,36
PCI_AD17 C11 2
1

1
PCI_AD18 AD17
D11 AD18 IRDY# A7 PCI_IRDY# 24,36 4 PCI_RST# 24,36
PCI_AD19 A11 E10 PCI_RST#_G 1
AD19 PAR PCI_PAR 24,36

2
PCI_AD20 A10 B18 PCI_RST#_G
PCI_AD21 AD20 PCIRST# C515
F11 A12 PCI_DEVSEL# 24,36 7SH32
PCI_AD22 AD21 DEVSEL# *8.2P_16V_NC
F10 C9 PCI_PERR# 24,36

1
PCI_AD23 AD22 PERR#
E9 AD23 PLOCK# E11 PCI_PLOCK#
PCI_AD24 D9 B10 +3.3V_SUS
AD24 SERR# PCI_SERR# 24,36
PCI_AD25 B9 F15 C465
AD25 STOP# PCI_STOP# 24,36
PCI_AD26 A8 F14 Place AC Term near pin U3.A9. 1 2
AD26 TRDY# PCI_TRDY# 24,36
PCI_AD27 A6 F16
AD27 FRAME# PCI_FRAME# 24,36 Final Value needs to be tuned if

5
PCI_AD28 C7 0.047U_10V U24
PCI_AD29 AD28 PCI_PLTRST#
PCI_AD30
B6 AD29 PLTRST# C26
CLK_PCI_ICH
required for EMI 2
E6 AD30 PCICLK A9 CLK_PCI_ICH 17 4 PLTRST# 6,13,18,23,27,28
24,36 PCI_AD[0..31] PCI_AD31 D6 B19 PCI_PLTRST# 1
AD31 PME# ICH_PME# 28

PCI_PIRQA# A3
Interrupt I/F G8 ICH_GPIO2_PIRQE# 7SH32
PCI_PIRQB# PIRQA# GPIO2/PIRQE# ICH_GPIO3_PIRQF#
D
36 PCI_PIRQB# B4 PIRQB# GPIO3/PIRQF# F7 D
PCI_PIRQC# C5 F8 ICH_GPIO4_PIRQG#
PCI_PIRQD# PIRQC# GPIO4/PIRQG# ICH_GPIO5_PIRQH#
24 PCI_PIRQD# B5 PIRQD# GPIO5/PIRQH# G7 DOCK REQ0 GNT0 PIRQA
PCI_PIRQB: for LOM
PCI_PIRQD: for CardBus T91 PAD AE5
MISC AE9
Cardbus or
REQ1 GNT1 PIRQD
QUANTA
RSVD[1] RSVD[6] PAD T86 Cardbus/1394
T92
T48
T47
PAD
PAD
PAD
AD5
AG4
RSVD[2]
RSVD[3]
RSVD[7]
RSVD[8]
AG8
AH8
PAD T46
PIRQC Title
COMPUTER
AH4 RSVD[4] RSVD[9] F21 1394/MediaCard REQ2 GNT2 PIRQD ICH7-M (USB,DMI,PCIE,PCI)
T87 PAD AD9 AH20
RSVD[5] MCH_SYNC# MCH_ICH_SYNC# 6
ICH7-M Size Document Number R ev
LOM(4401) REQ3 GNT3 PIRQB DM5 1A

Date: 星期二, 十二月 27, 2005 Sheet 12 of 59


1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

+3.3V_RUN

R360 10K

2
ICH_SMLINK0 1 2 +3.3V_SUS Place these close to ICH7.
R379
R357 10K
ICH_SMLINK1 8.2K
1 2
U9C

1
17,23 ICH_SMBCLK C22 SMBCLK GPIO21/SATA0GP AF19
+3.3V_RUN B22 AH18 CLK_ICH_48M

SMB
17,23 ICH_SMBDATA LINKALERT# SMBDATA GPIO19/SATA1GP

GPIO
SATA
A26 LINKALERT# GPIO36/SATA2GP AH19

1
ICH_SMLINK0 B25 AE19
ICH_SMLINK1 SMLINK0 GPIO37/SATA3GP R105
A25 SMLINK1
2

AC1 *10_NC
A CLK14 CLK_ICH_14M 17 A
R378 ICH _RI# CLK_ICH_48M

Clocks
A28 RI# CLK48 B2 CLK_ICH_48M 17

1 2
8.2K SUS_CLK
34 SPKR A19 SPKR SUSCLK C20 PAD T44
A27
1

ITP_DBRESET# SUS_STAT# C175


3,27 ITP_DBRESET# A22 SYS_RST# SLP_S3# B24 SIO_SLP_S3# 27
CLKRUN# D23 *4.7P_50V_NC
PAD T76

2
SLP_S4#
6 PM_BMBUSY# AB18 GPIO0/BM_BUSY# SLP_S5# F22 SIO_SLP_S5# 27
1

SMBALERT# B23 AA4 ICH_PW RGD


GPIO11/SMBALERT# PWROK ICH_PW RGD 6,40
R380

Power MGT
*10_NC AC20 AC22 CLK_ICH_14M
17 H_STP_PCI# GPIO18/STPPCI# GPIO16/DPRSLPVR DPRSLPVR 6,45
AF21

GPIO
17 H_STP_CPU#
2

GPIO20/STPCPU#

1
C21 ICH_BATLOW#

SYS
TP0/BATLOW# R371 R418
19 LCD_TST A21 GPIO26
C23 100K *10_NC
PWRBTN# SIO_PWRBTN# 27
Option to " Disable " GL_BL_SUSPEND B21
T43 PAD GPIO27
clkrun. Pulling it down 21 IDE_RST_MOD E23

1 2
GPIO28
LAN_RST# C19 PLTRST# 6,12,18,23,27,28
will keep the clks AG18
running. 24,27,28,36 CLKRUN# GPIO32/CLKRUN# SUSPWROK C543
RSMRST# Y4 SUSPWROK 32,40
AC19 *4.7P_50V_NC
31 BT_RADIO_DIS#

2
GPIO33/AZ_DOCK_EN# SIO_EXT_SCI#
T53 PAD U2 GPIO34/AZ_DOCK_RST# GPIO9 E20 SIO_EXT_SCI# 27
+3.3V_SUS A20
GPIO10 PAD T45
28 ICH_PCIE_WAKE# F20 WAKE# GPIO12 F19 USB_IDE# 21
24,27,28 IRQ_SERIRQ AH21 E19 RSVD_HDD_DET# 21 CT_1212: Removed HDDC_EN# and
SIO_THRM# SERIRQ GPIO13
27 SIO_THRM# AF20 THRM# GPIO14 R4 PAD T102 MODC_EN# from ICH7 GPIO14 & 15.
GPIO15 E22 PAD T103 Removed R463, R464 100Kohm.
2

IMVP_PWRGD AD22 R3 PAD T93


40,45 IMVP_PWRGD VRMPWRGD GPIO24
R374 R452 0 D20 PAD T79
GPIO25
B
680 27 SIO_EXT_WAKE# 1 2 AC21 GPIO6 GPIO35 AD21 SATA_CLKREQ# 17 B
LAMP_STAT# PLTRST_DELAY#
19 LAMP_STAT#
SIO_EXT_SMI#
AC18
E21
GPIO7 GPIO GPIO38 AD20
AE20
PAD T78
27 SIO_EXT_SMI# WWAN_RADIO_DIS#
1

GPIO8 GPIO39
ICH7-M

ICH_PCIE_WAKE#

R95 *10K_NC
1 2 SIO_EXT_WAKE#

R375 *8.2K_NC
1 2 SIO_THRM#
+3.3V_RUN
R373
+3.3V_RUN 2 1 BT_RADIO_DIS# No Stuff since EC is push-pull.

10K R406 10K


1 2 ICH_PW RGD
1 2 SUSPWROK

+3.3V_SUS R405 10K


+3.3V_RUN

R370 8.2K
C C
1 2 ICH_BATLOW#

R352 8.2K R449 *10K_NC


1 2 ICH _RI# RSVD_HDD_DET# 1 2
+3.3V_SUS RP46
RP16 7 8
7 8 SIO_EXT_SMI# LAMP_STAT# 5 6
5 6 SMBALERT# IRQ_SERIRQ 3 4
3 4 LINKALERT# WWAN_RADIO_DIS# 1 2
1 2 SIO_EXT_SCI#
8P4R-10K
8P4R-10K

+3.3V_SUS

R446 2.2K
2 1 ICH_SMBDATA

R447 2.2K
2 1 ICH_SMBCLK

D D

QUANTA
Title
COMPUTER
ICH7-M( PM,GPIO,SMB )

Size Document Number R ev


DM5 1A

Date: 星期二, 十二月 27, 2005 Sheet 13 of 59


1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

U9E
R100 100 U9F A4 P28
VSS[1] VSS[98]
+5V_RUN 1 2 G10 V5REF[1] Vcc1_05[1] L11 +1.05V_VCCP A23 VSS[2] VSS[99] R1
Vcc1_05[2] L12 B1 VSS[3] VSS[100] R11

1
D8 AD17 L14 B8 R12
V5REF[2] Vcc1_05[3] VSS[4] VSS[101]

1
2 1 ICH_V5REF_RUN L16 C494 C488 + C165 B11 R13
+3.3V_RUN Vcc1_05[4] VSS[5] VSS[102]
F6 L17 0.1U_10V 1U_10V 330U_2.5V B14 R14
V5REF_Sus Vcc1_05[5] VSS[6] VSS[103]

2
RB751V L18 B17 R15

2
C503 Vcc1_05[6] VSS[7] VSS[104]
AA22 Vcc1_5_B[1] Vcc1_05[7] M11 B20 VSS[8] VSS[105] R16
0.1U_10V AA23 M18 B26 R17

1
Vcc1_5_B[2] Vcc1_05[8] VSS[9] VSS[106]

CORE
AB22 Vcc1_5_B[3] Vcc1_05[9] P11 B28 VSS[10] VSS[107] R18
R102 10 AB23 P18 C2 T6
A Vcc1_5_B[4] Vcc1_05[10] VSS[11] VSS[108] A
+5V_SUS 1 2 AC23 Vcc1_5_B[5] Vcc1_05[11] T11 C6 VSS[12] VSS[109] T12
AC24 Vcc1_5_B[6] Vcc1_05[12] T18 C27 VSS[13] VSS[110] T13
D9 AC25 U11 D10 T14
ICH_V5REF_SUS Vcc1_5_B[7] Vcc1_05[13] VSS[14] VSS[111]
+3.3V_SUS 2 1 AC26 Vcc1_5_B[8] Vcc1_05[14] U18 D13 VSS[15] VSS[112] T15
AD26 Vcc1_5_B[9] Vcc1_05[15] V11 D18 VSS[16] VSS[113] T16
RB751V 2 AD27 Vcc1_5_B[10] Vcc1_05[16] V12 D21 VSS[17] VSS[114] T17
C518 AD28 V14 D24 U4
Vcc1_5_B[11] Vcc1_05[17] +3.3V_SUS VSS[18] VSS[115]
0.1U_10V D26 V16 E1 U12
1

Vcc1_5_B[12] Vcc1_05[18] VSS[19] VSS[116]

2
D27 Vcc1_5_B[13] Vcc1_05[19] V17 E2 VSS[20] VSS[117] U13
D28 V18 C529 E4 U14
Vcc1_5_B[14] VCC PAUX Vcc1_05[20] 0.1U_10V VSS[21] VSS[118]
E24 E8 U15

1
Vcc1_5_B[15] VSS[22] VSS[119]
E25 Vcc1_5_B[16] VccSus3_3/VccLAN3_3[1] V5 E15 VSS[23] VSS[120] U16
E26 Vcc1_5_B[17] VccSus3_3/VccLAN3_3[2] V1 F3 VSS[24] VSS[121] U17
F23 Vcc1_5_B[18] VccSus3_3/VccLAN3_3[3] W2 +3.3V_RUN F4 VSS[25] VSS[122] U24
F24 Vcc1_5_B[19] VccSus3_3/VccLAN3_3[4] W7 F5 VSS[26] VSS[123] U25

2
G22 Vcc1_5_B[20] F12 VSS[27] VSS[124] U26
G23 U6 C517 F27 V2
Vcc1_5_B[21] Vcc3_3/VccHDA 0.1U_10V VSS[28] VSS[125]
H22 F28 V13

1
Vcc1_5_B[22] VSS[29] VSS[126]
H23 Vcc1_5_B[23] VccSus3_3/VccSusHDA R7 +3.3V_SUS G1 VSS[30] VSS[127] V15
J22 Vcc1_5_B[24] G2 VSS[31] VSS[128] V24
J23 Vcc1_5_B[25] V_CPU_IO[1] AE23 +1.05V_VCCP G5 VSS[32] VSS[129] V27
K22 Vcc1_5_B[26] V_CPU_IO[2] AE26 G6 VSS[33] VSS[130] V28

1
L22 K23 AH26 C467 C470 C463 G9 W6

VCCA3GP
+1.5VRUN_L Vcc1_5_B[27] V_CPU_IO[3] 0.1U_10V 0.1U_10V 4.7U_10V_0805 VSS[34] VSS[131]
+1.5V_RUN 1 2 L22 Vcc1_5_B[28] G14 VSS[35] VSS[132] W24
1

L23 AA7 +3_3V_IDE G18 W25


+3.3V_RUN

2
Vcc1_5_B[29] Vcc3_3[3] VSS[36] VSS[133]
2

BLM21PG600SN1D + M22 AB12 G21 W26


Vcc1_5_B[30] Vcc3_3[4] VSS[37] VSS[134]

2
C164 C170 C163 C166 M23 AB20 G24 Y3
220U_4V 0.1U_10V 0.1U_10V 0.1U_10V Vcc1_5_B[31] Vcc3_3[5] C482 VSS[38] VSS[135]
N22 AC16 G25 Y24
2

Vcc1_5_B[32] Vcc3_3[6] 0.1U_10V VSS[39] VSS[136]


N23 AD13 G26 Y27

1
Vcc1_5_B[33] Vcc3_3[7] VSS[40] VSS[137]

IDE
B P22 Vcc1_5_B[34] Vcc3_3[8] AD18 H3 VSS[41] VSS[138] Y28 B
P23 Vcc1_5_B[35] Vcc3_3[9] AG12 H4 VSS[42] VSS[139] AA1
R22 Vcc1_5_B[36] Vcc3_3[10] AG15 H5 VSS[43] VSS[140] AA24
R23 Vcc1_5_B[37] Vcc3_3[11] AG19 H24 VSS[44] VSS[141] AA25
R24 Vcc1_5_B[38] H27 VSS[45] VSS[142] AA26
R25 A5 +3_3V_PCI H28 AB4
Vcc1_5_B[39] Vcc3_3[12] +3.3V_RUN VSS[46] VSS[143]
R26 Vcc1_5_B[40] Vcc3_3[13] B13 J1 VSS[47] VSS[144] AB6

2
T22 Vcc1_5_B[41] Vcc3_3[14] B16 J2 VSS[48] VSS[145] AB11
T23 B7 C522 C491 C497 J5 AB14
Vcc1_5_B[42] Vcc3_3[15] 0.1U_10V 0.1U_10V 0.1U_10V VSS[49] VSS[146]
T26 C10 J24 AB16

1
Vcc1_5_B[43] Vcc3_3[16] VSS[50] VSS[147]

PCI
T27 Vcc1_5_B[44] Vcc3_3[17] D15 J25 VSS[51] VSS[148] AB19
+3.3V_RUN T28 F9 J26 AB21
Vcc1_5_B[45] Vcc3_3[18] VSS[52] VSS[149]
U22 Vcc1_5_B[46] Vcc3_3[19] G11 K24 VSS[53] VSS[150] AB24
U23 Vcc1_5_B[47] Vcc3_3[20] G12 K27 VSS[54] VSS[151] AB27
V22 Vcc1_5_B[48] Vcc3_3[21] G16 K28 VSS[55] VSS[152] AB28
2

V23 Vcc1_5_B[49] L13 VSS[56] VSS[153] AC2


C462 W22 W5 +RTC_CELL L15 AC5
0.1U_10V Vcc1_5_B[50] VccRTC VSS[57] VSS[154]
W23 L24 AC9
1

Vcc1_5_B[51] VSS[58] VSS[155]

2
Y22 Vcc1_5_B[52] VccSus3_3[1] P7 L25 VSS[59] VSS[156] AC11
Y23 C507 C506 L26 AD1
Vcc1_5_B[53] 0.1U_10V 0.1U_10V VSS[60] VSS[157]
A24 M3 AD3

1
+1.5V_RUN L23 VccSus3_3[2] VSS[61] VSS[158]
B27 Vcc3_3[1] VccSus3_3[3] C24 M4 VSS[62] VSS[159] AD4
R98 BLM11A601S
VccSus3_3[4] D19 M5 VSS[63] VSS[160] AD7
1 2 1 2 +1.5V_DMIPLL AG28 D22 M12 AD8
VccDMIPLL VccSus3_3[5] VSS[64] VSS[161]
VccSus3_3[6] G19 +3.3V_SUS M13 VSS[65] VSS[162] AD11
1

0.5/F +1_5V_SATA_RX AB7 M14 AD15


+1.5V_RUN Vcc1_5_A[1] VSS[66] VSS[163]
2

2
AC6 Vcc1_5_A[2] VccSus3_3[7] K3 M15 VSS[67] VSS[164] AD19
2

R104 C171 C172 AC7 K4 C473 C485 M16 AD23


0.01U_25V 10U_6.3V C512 Vcc1_5_A[3] VccSus3_3[8] 0.1U_10V 0.1U_10V VSS[68] VSS[165]
AD6 K5 M17 AE2
1

1
Vcc1_5_A[4] VccSus3_3[9] VSS[69] VSS[166]
ARX

0.5/F 0.1U_10V AE6 K6 M24 AE4


12

C Vcc1_5_A[5] VccSus3_3[10] VSS[70] VSS[167] C


AF5 Vcc1_5_A[6] VccSus3_3[11] L1 M27 VSS[71] VSS[168] AE8
L24 AF6 L2 M28 AE11
Vcc1_5_A[7] VccSus3_3[12] VSS[72] VSS[169]
USB

10uH_100MA AG5 L3 +3.3V_SUS N1 AE13


Vcc1_5_A[8] VccSus3_3[13] VSS[73] VSS[170]
AH5 Vcc1_5_A[9] VccSus3_3[14] L6 N2 VSS[74] VSS[171] AE18
2

2
VccSus3_3[15] L7 N5 VSS[75] VSS[172] AE21
VCCSATPLL AD2 M6 C528 C511 N6 AE24
2

VccSATAPLL VccSus3_3[16] 0.1U_10V 0.1U_10V VSS[76] VSS[173]


M7 N11 AE25
1

1
VccSus3_3[17] VSS[77] VSS[174]
1

+3.3V_RUN AH11 Vcc3_3[2] VccSus3_3[18] N7 N12 VSS[78] VSS[175] AF2


C176 C530 N13 AF4
VSS[79] VSS[176]
2

10U_6.3V 0.1U_10V +1_5V_SATA_TX AB10 AB17 N14 AF8


+1.5V_RUN +1.5V_RUN
2

C498 Vcc1_5_A[10] Vcc1_5_A[19] VSS[80] VSS[177]


AB9 Vcc1_5_A[11] Vcc1_5_A[20] AC17 N15 VSS[81] VSS[178] AF11
1

0.1U_10V AC10 N16 AF27


1

C513 Vcc1_5_A[12] VSS[82] VSS[179]


AD10 Vcc1_5_A[13] Vcc1_5_A[21] T7 +1.5V_RUN N17 VSS[83] VSS[180] AF28
1U_10V AE10 F17 N18 AG1
+1.5V_RUN
2

Vcc1_5_A[14] Vcc1_5_A[22] VSS[84] VSS[181]


ATX

AF10 Vcc1_5_A[15] Vcc1_5_A[23] G17 N24 VSS[85] VSS[182] AG3


AF9 Vcc1_5_A[16] N25 VSS[86] VSS[183] AG7
AG9 Vcc1_5_A[17] Vcc1_5_A[24] AB8 +1.5V_RUN N26 VSS[87] VSS[184] AG11
+3.3V_SUS AH9 AC8 P3 AG14
Vcc1_5_A[18] Vcc1_5_A[25] VSS[88] VSS[185]
2

P4 VSS[89] VSS[186] AG17


E3 K7 TP_ICHVCCSUS1 C499 P12 AG20
VccSus3_3[19] VccSus1_05[1] PAD T82 0.1U_10V VSS[90] VSS[187]
P13 AG25
1

VSS[91] VSS[188]
2

C1 C28 TP_ICHVCCSUS2 P14 AH1


+1.5V_RUN VccUSBPLL VccSus1_05[2] PAD T42 VSS[92] VSS[189]
C508 G20 TP_ICHVCCSUS3 P15 AH3
VccSus1_05[3] PAD T77 VSS[93] VSS[190]
2

0.1U_10V TP_VCCSUSLAN1 AA2 P16 AH7


1

C542 T51 PAD TP_VCCSUSLAN2 VccSus1_05/VccLAN1_05[1] VSS[94] VSS[191]


T81 PAD Y7 VccSus1_05/VccLAN1_05[2]
Vcc1_5_A[26] A1 +1.5V_RUN P17 VSS[95] VSS[192] AH12
0.1U_10V H6 P24 AH23
1

Vcc1_5_A[27] VSS[96] VSS[193]


2

2
USB CORE

Vcc1_5_A[28] H7 P27 VSS[97] VSS[194] AH27


J6 C514 C538
Vcc1_5_A[29] 0.1U_10V *0.1U_10V_NC ICH7-M
J7
1

Vcc1_5_A[30]
D D
ICH7-M

QUANTA
Title
COMPUTER
ICH7-M (POWER&GND)

Size Document Number R ev


DM5 1A

Date: 星期二, 十二月 27, 2005 Sheet 14 of 59


1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

+1.8V_SUS
CT_1227: Change
JDIM2 part number +1.8V_SUS
DDR_A_DM[0..7] 7
DDR_A_D[0..63] 7
+1.8V_SUS RVS(TOP) +1.8V_SUS
DDR_B_DM[0..7] 7
+1.8V_SUS

DDR_A_DQS[0..7] 7 DDR_B_D[0..63] 7 Place these Caps near So-Dimm1.


STD(BOT) V_DDR_MCH_REF
DDR_A_DQS#[0..7] 7
DDR_A_MA[0..13] 7,16
V_DDR_MCH_REF
DDR_B_DQS[0..7] 7
DDR_B_DQS#[0..7] 7

1
C447 C424 C427 C448 C423
DDR_B_MA[0..13] 7,16
JDIM2 JDIM1 2.2U_6.3V 2.2U_6.3V 2.2U_6.3V 2.2U_6.3V 2.2U_6.3V

2
1 VREF VSS46 2 1 VREF VSS46 2
3 4 DDR_A_D4 3 4 DDR_B_D4
DDR_A_D0 VSS47 DQ4 DDR_A_D5 DDR_B_D0 VSS47 DQ4 DDR_B_D5
5 DQ0 DQ5 6 5 DQ0 DQ5 6
DDR_A_D1 7 8 DDR_B_D1 7 8 +1.8V_SUS
DQ1 VSS15 DDR_A_DM0 DQ1 VSS15 DDR_B_DM0
A
9 VSS37 DM0 10 9 VSS37 DM0 10 Place these Caps near So-Dimm1. A
DDR_A_DQS#0 11 12 DDR_B_DQS#0 11 12
DDR_A_DQS0 DQS#0 VSS5 DDR_A_D6 DDR_B_DQS0 DQS#0 VSS5 DDR_B_D6
13 DQS0 DQ6 14 13 DQS0 DQ6 14
15 16 DDR_A_D7 15 16 DDR_B_D7
VSS48 DQ7 VSS48 DQ7

1
DDR_A_D2 17 18 DDR_B_D2 17 18 C443 C425 C446 C445
DDR_A_D3 DQ2 VSS16 DDR_A_D12 DDR_B_D3 DQ2 VSS16 DDR_B_D12
19 DQ3 DQ12 20 19 DQ3 DQ12 20
21 22 DDR_A_D13 21 22 DDR_B_D13 .1U_10V .1U_10V .1U_10V .1U_10V

2
DDR_A_D8 VSS38 DQ13 DDR_B_D8 VSS38 DQ13
23 DQ8 VSS17 24 23 DQ8 VSS17 24
DDR_A_D9 25 26 DDR_A_DM1 DDR_B_D9 25 26 DDR_B_DM1
DQ9 DM1 DQ9 DM1
27 VSS49 VSS53 28 27 VSS49 VSS53 28
DDR_A_DQS#1 29 30 DDR_B_DQS#1 29 30
DQS#1 CK0 M_CLK_DDR0 6 DQS#1 CK0 M_CLK_DDR3 6 +3.3V_RUN
DDR_A_DQS1 31 32 DDR_B_DQS1 31 32 V_DDR_MCH_REF
DQS1 CK0# M_CLK_DDR#0 6 DQS1 CK0# M_CLK_DDR#3 6
33 VSS39 VSS41 34 33 VSS39 VSS41 34
DDR_A_D10 35 36 DDR_A_D14 DDR_B_D10 35 36 DDR_B_D14
DDR_A_D11 DQ10 DQ14 DDR_A_D15 DDR_B_D11 DQ10 DQ14 DDR_B_D15
37 DQ11 DQ15 38 37 DQ11 DQ15 38

1
39 40 39 40 C451 C450 C449 C444
VSS50 VSS54 VSS50 VSS54
41 42 41 42 .1U_10V 2.2U_6.3V 2.2U_6.3V .1U_10V

2
DDR_A_D16 VSS18 VSS20 DDR_A_D20 DDR_B_D16 VSS18 VSS20 DDR_B_D20
43 DQ16 DQ20 44 43 DQ16 DQ20 44
DDR_A_D17 45 46 DDR_A_D21 DDR_B_D17 45 46 DDR_B_D21
DQ17 DQ21 DQ17 DQ21
47 VSS1 VSS6 48 47 VSS1 VSS6 48
DDR_A_DQS#2 49 50 PM_EXTTS#0_R1 2 DDR_B_DQS#2 49 50 PM_EXTTS#0_R
PC4800 DDR2 SDRAM

PC4800 DDR2 SDRAM


DQS#2 NC3 PM_EXTTS#0 6 DQS#2 NC3
DDR_A_DQS2 51 52 DDR_A_DM2 R304 DDR_B_DQS2 51 52 DDR_B_DM2 Place these Caps near So-Dimm1.
DQS2 DM2 0 DQS2 DM2
53 VSS19 VSS21 54 53 VSS19 VSS21 54
DDR_A_D18 55 56 DDR_A_D22 DDR_B_D18 55 56 DDR_B_D22 No Vias Between the Trace of
DDR_A_D19 DQ18 DQ22 DDR_A_D23 DDR_B_D19 DQ18 DQ22 DDR_B_D23
57 58 57 58
59
DQ19 DQ23
60 59
DQ19 DQ23
60
PIN to CAP.
SO-DIMM (200P)

SO-DIMM (200P)
DDR_A_D24 VSS22 VSS24 DDR_A_D28 DDR_B_D24 VSS22 VSS24 DDR_B_D28
61 DQ24 DQ28 62 61 DQ24 DQ28 62
DDR_A_D25 63 64 DDR_A_D29 DDR_B_D25 63 64 DDR_B_D29
DQ25 DQ29 DQ25 DQ29
65 VSS23 VSS25 66 65 VSS23 VSS25 66
B DDR_A_DM3 67 68 DDR_A_DQS#3 DDR_B_DM3 67 68 DDR_B_DQS#3 B
DM3 DQS#3 DDR_A_DQS3 DM3 DQS#3 DDR_B_DQS3
69 NC4 DQS3 70 69 NC4 DQS3 70
71 VSS9 VSS10 72 71 VSS9 VSS10 72
DDR_A_D26 73 74 DDR_A_D30 DDR_B_D26 73 74 DDR_B_D30
DDR_A_D27 DQ26 DQ30 DDR_A_D31 DDR_B_D27 DQ26 DQ30 DDR_B_D31
75 DQ27 DQ31 76 75 DQ27 DQ31 76
77 VSS4 VSS8 78 77 VSS4 VSS8 78
6,16 DDR_CKE0_DIMMA 79 CKE0 CKE1 80 DDR_CKE1_DIMMA 6,16 6,16 DDR_CKE2_DIMMB 79 CKE0 CKE1 80 DDR_CKE3_DIMMB 6,16
81 VDD7 VDD8 82 81 VDD7 VDD8 82
83 NC1 A15 84 83 NC1 A15 84
DDR_A_BS2 85 86 DDR_B_BS2 85 86
7,16 DDR_A_BS2 A16_BA2 A14 7,16 DDR_B_BS2 A16_BA2 A14
87 VDD9 VDD11 88 87 VDD9 VDD11 88
DDR_A_MA12 89 90 DDR_A_MA11 DDR_B_MA12 89 90 DDR_B_MA11
DDR_A_MA9 A12 A11 DDR_A_MA7 DDR_B_MA9 A12 A11 DDR_B_MA7
91 A9 A7 92 91 A9 A7 92
DDR_A_MA8 93 94 DDR_A_MA6 DDR_B_MA8 93 94 DDR_B_MA6
A8 A6 A8 A6
95 VDD5 VDD4 96 95 VDD5 VDD4 96
DDR_A_MA5 97 98 DDR_A_MA4 DDR_B_MA5 97 98 DDR_B_MA4
DDR_A_MA3 A5 A4 DDR_A_MA2 DDR_B_MA3 A5 A4 DDR_B_MA2
99 A3 A2 100 99 A3 A2 100
DDR_A_MA1 101 102 DDR_A_MA0 DDR_B_MA1 101 102 DDR_B_MA0 +1.8V_SUS
A1 A0 A1 A0
103 VDD10 VDD12 104 103 VDD10 VDD12 104
DDR_A_MA10 105 106 DDR_A_BS1 DDR_B_MA10 105 106 DDR_B_BS1 Place these Caps near So-Dimm2.
A10/AP BA1 DDR_A_BS1 7,16 A10/AP BA1 DDR_B_BS1 7,16
DDR_A_BS0 107 108 DDR_A_RAS# DDR_B_BS0 107 108 DDR_B_RAS#
7,16 DDR_A_BS0 BA0 RAS# DDR_A_RAS# 7,16 7,16 DDR_B_BS0 BA0 RAS# DDR_B_RAS# 7,16
DDR_A_WE# 109 110 DDR_B_WE# 109 110
7,16 DDR_A_WE# WE# S0# DDR_CS0_DIMMA# 6,16 7,16 DDR_B_WE# WE# S0# DDR_CS2_DIMMB# 6,16

1
111 112 111 112 C141 C139 C140 C130 C131
DDR_A_CAS# VDD2 VDD1 M_ODT0 DDR_B_CAS# VDD2 VDD1 M_ODT2
7,16 DDR_A_CAS# 113 CAS# ODT0 114 M_ODT0 6,16 7,16 DDR_B_CAS# 113 CAS# ODT0 114 M_ODT2 6,16
115 116 DDR_A_MA13 115 116 DDR_B_MA13 2.2U_6.3V 2.2U_6.3V 2.2U_6.3V 2.2U_6.3V 2.2U_6.3V
6,16 DDR_CS1_DIMMA# 6,16 DDR_CS3_DIMMB#

2
S1# A13 S1# A13
117 VDD3 VDD6 118 117 VDD3 VDD6 118
M_ODT1 119 120 M_ODT3 119 120
6,16 M_ODT1 ODT1 NC2 6,16 M_ODT3 ODT1 NC2
121 VSS11 VSS12 122 121 VSS11 VSS12 122
DDR_A_D32 123 124 DDR_A_D36 DDR_B_D32 123 124 DDR_B_D36
DDR_A_D33 DQ32 DQ36 DDR_A_D37 DDR_B_D33 DQ32 DQ36 DDR_B_D37 +1.8V_SUS
C
125 DQ33 DQ37 126 125 DQ33 DQ37 126 C
127 VSS26 VSS28 128 127 VSS26 VSS28 128 Place these Caps near So-Dimm2.
DDR_A_DQS#4 129 130 DDR_A_DM4 DDR_B_DQS#4 129 130 DDR_B_DM4
DDR_A_DQS4 DQS#4 DM4 DDR_B_DQS4 DQS#4 DM4
131 DQS4 VSS42 132 131 DQS4 VSS42 132
133 134 DDR_A_D38 133 134 DDR_B_D38
VSS2 DQ38 VSS2 DQ38

1
DDR_A_D34 135 136 DDR_A_D39 DDR_B_D34 135 136 DDR_B_D39 C142 C138 C134 C133
DDR_A_D35 DQ34 DQ39 DDR_B_D35 DQ34 DQ39
137 DQ35 VSS55 138 137 DQ35 VSS55 138
139 140 DDR_A_D44 139 140 DDR_B_D44 .1U_10V .1U_10V .1U_10V .1U_10V

2
DDR_A_D40 VSS27 DQ44 DDR_A_D45 DDR_B_D40 VSS27 DQ44 DDR_B_D45
141 DQ40 DQ45 142 141 DQ40 DQ45 142
DDR_A_D41 143 144 DDR_B_D41 143 144
DQ41 VSS43 DDR_A_DQS#5 DQ41 VSS43 DDR_B_DQS#5
145 VSS29 DQS#5 146 145 VSS29 DQS#5 146
DDR_A_DM5 147 148 DDR_A_DQS5 DDR_B_DM5 147 148 DDR_B_DQS5
DM5 DQS5 DM5 DQS5 V_DDR_MCH_REF +3.3V_RUN
149 VSS51 VSS56 150 149 VSS51 VSS56 150
DDR_A_D42 151 152 DDR_A_D46 DDR_B_D42 151 152 DDR_B_D46
DDR_A_D43 DQ42 DQ46 DDR_A_D47 DDR_B_D43 DQ42 DQ46 DDR_B_D47
153 DQ43 DQ47 154 153 DQ43 DQ47 154
155 VSS40 VSS44 156 155 VSS40 VSS44 156

1
DDR_A_D48 157 158 DDR_A_D52 DDR_B_D48 157 158 DDR_B_D52 C126 C124 C123 C125
DDR_A_D49 DQ48 DQ52 DDR_A_D53 DDR_B_D49 DQ48 DQ52 DDR_B_D53
159 DQ49 DQ53 160 159 DQ49 DQ53 160
161 162 161 162 .1U_10V 2.2U_6.3V 2.2U_6.3V .1U_10V

2
VSS52 VSS57 VSS52 VSS57
163 NCTEST CK1 164 M_CLK_DDR1 6 163 NCTEST CK1 164 M_CLK_DDR2 6
165 VSS30 CK1# 166 M_CLK_DDR#1 6 165 VSS30 CK1# 166 M_CLK_DDR#2 6
DDR_A_DQS#6 167 168 DDR_B_DQS#6 167 168
DDR_A_DQS6 DQS#6 VSS45 DDR_A_DM6 DDR_B_DQS6 DQS#6 VSS45 DDR_B_DM6
169 DQS6 DM6 170 169 DQS6 DM6 170
171 VSS31 VSS32 172 171 VSS31 VSS32 172 Place these Caps near So-Dimm2.
DDR_A_D50 173 174 DDR_A_D54 DDR_B_D50 173 174 DDR_B_D54
DDR_A_D51 DQ50 DQ54 DDR_A_D55 DDR_B_D51 DQ50 DQ54 DDR_B_D55
175 DQ51 DQ55 176 175 DQ51 DQ55 176 No Vias Between the Trace of
177 178 177 178
DDR_A_D56 179
VSS33 VSS35
180 DDR_A_D60 DDR_B_D56 179
VSS33 VSS35
180 DDR_B_D60 PIN to CAP.
DDR_A_D57 DQ56 DQ60 DDR_A_D61 DDR_B_D57 DQ56 DQ60 DDR_B_D61
181 DQ57 DQ61 182 181 DQ57 DQ61 182
183 VSS3 VSS7 184 183 VSS3 VSS7 184
D DDR_A_DM7 185 186 DDR_A_DQS#7 DDR_B_DM7 185 186 DDR_B_DQS#7 D
DM7 DQS#7 DDR_A_DQS7 DM7 DQS#7 DDR_B_DQS7
187 VSS34 DQS7 188 187 VSS34 DQS7 188
DDR_A_D58 189 190 DDR_B_D58 189 190
DDR_A_D59 DQ58 VSS36 DDR_A_D62 DDR_B_D59 DQ58 VSS36 DDR_B_D62

CLK_SDATA
191
193
195
DQ59
VSS14
DQ62
DQ63
192
194
196
DDR_A_D63
CLK_SDATA
191
193
195
DQ59
VSS14
DQ62
DQ63
192
194
196
DDR_B_D63 QUANTA
SDA VSS13 17 CLK_SDATA SDA VSS13

+3.3V_RUN
CLK_SCLK 197
199
SCL
VDD(SPD)
SA0
SA1
198
200
17 CLK_SCLK
+3.3V_RUN
CLK_SCLK 197
199
SCL
VDD(SPD)
SA0
SA1
198
200 COMPUTER
2

Title
FOX_AS0A426-M2SN-7F R302 R303 TYC_1775804-2 R343 R344 System DRAM Expansion (200P-DDR_SODIMM X 2)
10K 10K
SMbus address A4 10K 10K
SMbus address A0 Size Document Number R ev
CLOCK 0,1 CLOCK 2,3 DM5 3A
1

CKE 0,1 CKE 2,3 +3.3V_RUN Date: 星期二, 十二月 27, 2005 Sheet 15 of 59
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

DDRII DUAL CHANNEL A,B.


A
DDRII A CHANNEL DDRII B CHANNEL A

DDR_A_MA[0..13] 7,15 DDR_B_MA[0..13] 7,15

+0.9V_DDR_VTT +0.9V_DDR_VTT
No Vias Between the Trace of PIN to CAP. No Vias Between the Trace of PIN to CAP.
1

1
C410 C408 C409 C405 C404 C155 C143 C154 C151 C150 C452 C406 C407 C111 C112 C113 C114 C115 C453 C144 C117 C153 C152 C149 C148 C116

.1U_10V .1U_10V .1U_10V .1U_10V .1U_10V .1U_10V .1U_10V .1U_10V .1U_10V .1U_10V .1U_10V .1U_10V .1U_10V .1U_10V .1U_10V .1U_10V .1U_10V .1U_10V .1U_10V .1U_10V .1U_10V .1U_10V .1U_10V .1U_10V .1U_10V .1U_10V
2

2
Layout note: Place 1 cap close to every 1 R-pack terminated to +0.9V_DDR_VTT. Layout note: Place 1 cap close to every 1 R-pack terminated to +0.9V_DDR_VTT

DDR_A_MA7 2 1 7,15 DDR_B_RAS# DDR_B_RAS# 2 1


DDR_A_MA11 RP28 4 3 4P2R-S-56 DDR_B_BS1 RP12 4 3 4P2R-S-56
7,15 DDR_B_BS1
DDR_A_MA4 2 1 DDR_B_MA12 2 1
DDR_A_MA6 RP25 4 3 4P2R-S-56 DDR_B_MA9 RP8 4 3 4P2R-S-56
7,15 DDR_A_RAS# DDR_A_RAS# 2 1 DDR_B_MA8 2 1
DDR_A_BS1 RP27 4 3 4P2R-S-56 +0.9V_DDR_VTT DDR_B_MA5 RP7 4 3 4P2R-S-56 +0.9V_DDR_VTT
7,15 DDR_A_BS1
B B

DDR_A_MA13 2 1 DDR_B_MA3 2 1
M_ODT0 RP26 4 3 4P2R-S-56 DDR_B_MA1 RP6 4 3 4P2R-S-56
6,15 M_ODT0
DDR_A_BS2 2 1 DDR_B_MA10 2 1
7,15 DDR_A_BS2
DDR_A_MA12 RP44 4 3 4P2R-S-56 DDR_B_BS0 RP5 4 3 4P2R-S-56
7,15 DDR_B_BS0
DDR_A_MA9 2 1 DDR_B_WE# 2 1
7,15 DDR_B_WE#
DDR_A_MA8 RP43 4 3 4P2R-S-56 DDR_B_CAS# RP4 4 3 4P2R-S-56
7,15 DDR_B_CAS#
DDR_A_MA5 2 1 DDR_B_MA7 2 1
DDR_A_MA3 RP42 4 3 4P2R-S-56 +0.9V_DDR_VTT DDR_B_MA11 RP14 4 3 4P2R-S-56 +0.9V_DDR_VTT

DDR_A_MA10 2 1 DDR_B_MA4 2 1
DDR_A_BS0 RP41 4 3 4P2R-S-56 DDR_B_MA6 RP10 4 3 4P2R-S-56
7,15 DDR_A_BS0
DDR_A_WE# 2 1 DDR_B_MA0 2 1
7,15 DDR_A_WE#
DDR_A_CAS# RP40 4 3 4P2R-S-56 DDR_B_MA2 RP13 4 3 4P2R-S-56
7,15 DDR_A_CAS#
DDR_A_MA0 2 1 DDR_B_MA13 2 1
DDR_A_MA2 RP24 4 3 4P2R-S-56 +0.9V_DDR_VTT M_ODT2 RP11 4 3 4P2R-S-56 +0.9V_DDR_VTT
6,15 M_ODT2

R347 56 R77 56
DDR_A_MA1 1 2 +0.9V_DDR_VTT DDR_B_BS2 1 2 +0.9V_DDR_VTT
7,15 DDR_B_BS2

R345 56 R75 56
C C
M_ODT1 1 2 +0.9V_DDR_VTT M_ODT3 1 2 +0.9V_DDR_VTT
6,15 M_ODT1 6,15 M_ODT3

R346 56 R78 56
DDR_CKE0_DIMMA 1 2 DDR_CKE2_DIMMB 1 2
6,15 DDR_CKE0_DIMMA 6,15 DDR_CKE2_DIMMB
R299 56 R88 56
DDR_CKE1_DIMMA 1 2 DDR_CKE3_DIMMB 1 2 +0.9V_DDR_VTT
6,15 DDR_CKE1_DIMMA 6,15 DDR_CKE3_DIMMB
+0.9V_DDR_VTT

R89 56
R298 56 DDR_CS2_DIMMB# 1 2
6,15 DDR_CS2_DIMMB#
DDR_CS0_DIMMA# 1 2
6,15 DDR_CS0_DIMMA#
R76 56
R348 56 DDR_CS3_DIMMB# 1 2 +0.9V_DDR_VTT
6,15 DDR_CS3_DIMMB#
DDR_CS1_DIMMA# 1 2
6,15 DDR_CS1_DIMMA#
+0.9V_DDR_VTT

D D

QUANTA
Title
COMPUTER
DDR RES.ARRAY

Size Document Number R ev


DM5 1A

Date: 星期二, 十二月 27, 2005 Sheet 16 of 59


1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

FSC FSB FSA CPU SRC PCI Place these termination


1 0 1 100 100 33
CK_VDD_48
to close CK410M.
0 0 1 133 100 33 533MHZ
0 1 1 166 100 33 667MHZ CK_VDD_MAIN2
Close to Clock GEN. CK_VDD_REF +CK_VDD_MAIN
0 1 0 200 100 33 R321 1 2 49.9/F
0 0 0 266 100 33 CK_VDD_A R325 1 2 49.9/F

1 0 0 333 100 33 C415 27P_50V R312 1 2 49.9/F


A A
2 1 CLK_XTAL_IN R315 1 2 49.9/F
1 1 0 400 100 33 R286 18

1
R332 1 2 49.9/F 1 2 CLK_SIO_14M 28
Y3 R333 1 2 49.9/F

18

30
36

40
49

54
65

12
1 1 1 RSVD 100 33

1
14.318MHZ U22 R285 18
20 22 CLKREF 1 2

VDDA

VDDREF

VDDPCI
VDDPCI

VDDSRC_SS

VDDSRC
VDDSRC
VDDSRC
VDDCPU
VDD48
CLK_ICH_14M 13

2
C414 27P_50V R289 0 X1 REF1

1
2 1 CLK_XTAL_OUT 19 14 MCH_BCLK 4 3 RP30
X2 CPUCLK0 CLK_MCH_BCLK 5
13 MCH_BCLK# 2 1 C402 C401
CPUCLK0# CLK_MCH_BCLK# 5
4P2R-S-33 *10P_NC *10P_NC

2
+3.3V_RUN 39 11 CPU_BCLK 4 3 RP33
45 CLK_ENABLE# VTT_PWRGD# / PD CPUCLK1 CLK_CPU_BCLK 3
25 10 CPU_BCLK# 2 1
13 H_STP_PCI# PCI_SRC_STOP# CPUCLK1# CLK_CPU_BCLK# 3
24 4P2R-S-33
13 H_STP_CPU# CPU_STOP#
6 CPU_ITP 4 3 RP35
SRC10 / CPU_ITP CLK_CPU_ITP 3
2

SMbus address D2 5 CPU_ITP# 2 1


SRC10# / CPU_ITP# CLK_CPU_ITP# 3
R310 4P2R-S-33
10K CLK_SCLK 16 50
CLK_SDATA SMBCLK SRC1
17 SMBDAT SRC1# 51
R314 33 46
13 CLK_ICH_48M
1

FSA OE1#
ICS954305
SRC2 52
2

R311 8.2K FSA 41 53


3,6 CPU_MCH_BSEL0 USB_48MHZ / FS_A SRC2#
R313 FSB 45 26 +3.3V_RUN
3,6 CPU_MCH_BSEL1 FS_B / TEST_MODE OE2#
*10K_NC R287 8.2K FSC 23
3,6 CPU_MCH_BSEL2 REF0/FS_C / TEST_SEL
55 PCIE_MINI1 2 1 RP39
SRC3 CLK_PCIE_MINI1 23
56 PCIE_MINI1# 4 3 R334 10K
CLK_PCIE_MINI1# 23
1

SRC3# 4P2R-S-33 CLK_3GPLLREQ#


OE3# 28 MINI1CLK_REQ# 23
Iref=5mA, 58 PCIE_ICH 2 1 RP38
Ioh=4*Iref SRC4 CLK_PCIE_ICH 12
B R327 475/F 59 PCIE_ICH# 4 3 R280 10K B
SRC4# CLK_PCIE_ICH# 12
1 2 CLKIREF 9 IREF OE4# 57 4P2R-S-33 SATA_CLKREQ#
RP31
4 3 DOT96 43 60 PCIE_SATA 2 1 RP37
6 MCH_DREFCLK DOT_96M/27M_NSS SRC5 CLK_PCIE_SATA 11
2 1 DOT96# 44 61 PCIE_SATA# 4 3 R279 10K
6 MCH_DREFCLK# DOT_96M#/27M_SS SRC5# CLK_PCIE_SATA# 11
29 4P2R-S-33 MINI1CLK_REQ#
OE5# SATA_CLKREQ# 13
4P2R-S-33 RP34 4 3 DOT96_SSC 47
6 DREF_SSCLK LCD100_96M SS/SRC0
2 1 DOT96_SSC# 48 63
6 DREF_SSCLK# LCD100_96M# SS/SRC0# SRC6
4P2R-S-33 64
SRC6#
OE6# 62
R278 15
1 2 R300 2 1 10K 66
27 CLK_PCI_SIO_1 +3.3V_RUN SRC7
R295 33 PCI_ICH 37 67
12 CLK_PCI_ICH PCICLK_F0 / ITP_EN SRC7#
PCI_SIO 27 38
R277 15 R288 33 PCI_PCCARD PCICLK1 OE7#
24 CLK_PCI_PCCARD 32 PCICLK2
1 2 R281 33 PCI_DOCK 33 70 MCH_3GPLL 4 3 RP36
28 CLK_PCI_SIO_2 39 CLK_PCI_DOCK PCICLK3 SRC8 CLK_MCH_3GPLL 6
R284 33 PCI_LOM 34 69 MCH_3GPLL# 2 1
36 CLK_PCI_LOM PCICLK4/FCTSEL1 SRC8# CLK_MCH_3GPLL# 6
71 4P2R-S-33
OE8# CLK_3GPLLREQ# 6

THEM PAD
3

GNDCPU
GNDSRC
GNDSRC

GNDREF
SRC9

GNDPCI
GNDPCI
1 2 0 o h m s @ 100Mhz 2

GND48
SRC9#

GNDA
L50 72
+CK_VDD_MAIN OE9#
+3.3V_RUN 1 2
BLM21PG600SN1D
15
68
4

42

35
31

21
8

73
1

C430 C435 C439 C442 C558 C440 ICS954305B


C441 0.1U_10V 0.1U_10V 0.1U_10V 0.1U_10V 0.1U_10V 10U_10V_0805 250mA ( MAX. )
0.1U_10V
2

CLK_MCH_3GPLL R341 1 2 49.9/F


CLK_MCH_3GPLL# R342 1 2 49.9/F
C C
+3.3V_RUN
CLK_PCIE_SATA R336 1 2 49.9/F
R86 2.2 CLK_PCIE_SATA# R335 1 2 49.9/F
1 2 CK_VDD_A +3.3V_RUN

2
4
CLK_PCIE_ICH R338 1 2 49.9/F
1

CLK_PCIE_ICH# R337 1 2 49.9/F


C436 C136 RP29
0.047U_10V 4.7U_6.3V 4P2R-2.2K
2

2
1 2 0 o h m s @ 100Mhz R283 Q11

1
3
*10K_NC CLK_PCIE_MINI1 R340 1 2 49.9/F
L49 3 1 CLK_SDATA CLK_PCIE_MINI1# R339 1 2 49.9/F
13,23 ICH_SMBDATA CLK_SDATA 15
2 1 CK_VDD_MAIN2 PCI_LOM
+3.3V_RUN
BLM21PG600SN1D
2N7002W-7-F
1

C413
C411 C412 C416 10U_10V_0805 R282 +3.3V_RUN
0.1U_10V 0.1U_10V 0.1U_10V 10K
2

2
Q12 MCH_DREFCLK R316 1 2 49.9/F
MCH_DREFCLK# R319 1 2 49.9/F
3 1 CLK_SCLK
13,23 ICH_SMBCLK CLK_SCLK 15
R301 2.2 DREF_SSCLK R323 1 2 49.9/F
1 2 CK_VDD_48 PCI_LOM = FCTSEL1 DREF_SSCLK# R326 1 2 49.9/F
2N7002W-7-F
1

C428 C422 FCTSEL1 PIN43 PIN44 PIN47 PIN48 These are for backdrive issue Place these termination
0.047U_10V 4.7U_6.3V (PIN34)
2

D
to close CK410M. D
0=UMA DOT96T DOT96C 96/ 96/
100M_T 100M_C
R297 1R
1 2 CK_VDD_REF 1 = Disc.
GRFX down 27Mout 27MSSout SRCT0 SRCC0
QUANTA
1

C418
0.047U_10V
Title
COMPUTER
2

CLOCK GENERATOR

Size Document Number R ev


DM5 1A

Date: 星期二, 十二月 27, 2005 Sheet 17 of 59


1 2 3 4 5 6 7 8
5 4 3 2 1

Placed this Bypass


capacitor close to
OVCC. +3.3V_RUN

1
C216 C220 C214 .1U_10V
.1U_10V 10U_10V_0805 INT- 1 2 SDVOB_INT- 6

2
R145 4.7K
1 2 SDVO_CTRLCLK
D +2.5V_RUN D
C211 .1U_10V
R144 4.7K INT+ 1 2
6 SDVOB_RED+ SDVOB_INT+ 6
+2.5V_RUN 1 2 SDVO_CTRLDATA
6 SDVOB_RED-
R137 2.2K
6 SDVOB_GREEN+
+5V_RUN 2 1 DVI_SDAT
6 SDVOB_GREEN-
R136 2.2K
6 SDVOB_BLUE+
+5V_RUN 2 1 DVI_SCLK
6 SDVOB_BLUE-

6 SDVOB_CLK+
6 SDVOB_CLK-

L14
+3.3V_RUN 1 2 DVI_SPVCC

1
BLM18PG181SN1 C50
C48 10U_10V_0805 A1 LOW: Address = 0x70
.1U_10V

2
HIGH: Address = 0x72

48
47
46
45
44
43
42
41
40
39
38
37
U4

SPVCC
SDVOB_CLK-

SDVOB_B-
SDVOB_CLK+
SGND2

SDVOB_B+

SDVOB_G-

SDVOB_R-
SVCC2

SDVOB_G+
SGND1

SDVOB_R+
R135 R134
*1K_NC 1K
+3.3V_RUN 1 2 1 2
L35
L13 +3.3V_RUN BLM18PG181SN1
+3.3V_RUN 1 2 DVI_PVCC1 1 36 DVI_SVCC 1 2 +1.8V_RUN
OVCC SVCC1 EXT_RES
C
6,12,13,23,27,28 PLTRST# 2 RESET# EXT_RES 35 C
1

1
BLM18PG181SN1 3 34 C230
C210 C47 SPGND VCC3 INT- C43 C227 10U_10V_0805
6 SDVO_CTRLDATA 4 SDSDA SDVOB_INT- 33
.1U_10V 10U_10V_0805 5 32 INT+ .1U_10V .1U_10V
6 SDVO_CTRLCLK
2

2
SDSCL SDVOB_INT+
6 A1 GND2 31
7 GND1 TEST 30
39 DVI_SCLK 8 SCLDDC HTPLG 29 2 1 DVI_DETECT 39
39 DVI_SDAT 9 SDADCC VCC2 28
10 27 R128 10K
L34 VCC1 PGND2
11 PVCC1 PVCC2 26
+1.8V_RUN 1 2 DVI_VCC 12 25 R16 1K
AGND EXT_SWING EXT_RES 2

AGND1

AGND2
1

AVCC1

AVCC2
1

2
TXC+
BLM18PG181SN1 C217

TX0+

TX1+

TX2+
TXC-

300_0402
TX0-

TX1-

TX2-
C209 C208 C213 R9
.1U_10V .1U_10V 10U_10V_0805 .1U_10V
2

SI1362A

13
14
15
16
17
18
19
20
21
22
23
24

1
L30
DVI_AVCC 1 2 +3.3V_RUN

1
L12 C222 BLM18PG181SN1
+3.3V_RUN 1 2 DVI_PVCC2 C26 C203 10U_10V_0805
.1U_10V .1U_10V

2
1

BLM18PG181SN1 C198
39 DVI_CLK-
C33 10U_10V_0805
39 DVI_CLK+
.1U_10V
2

39 DVI_TX0-
39 DVI_TX0+

B 39 DVI_TX1- B
39 DVI_TX1+

39 DVI_TX2-
39 DVI_TX2+

CT_1227: Change U4 from 1362 to 1362A. Change


R124~R127 from 110/F to 220/F ohm.

DVI_TX0+ R126 1 2 220/F C201 1 2 .1U_10V DVI_TX0-


DVI_TX1+ R125 1 2 220/F C200 1 2 .1U_10V DVI_TX1-
DVI_TX2+ R124 1 2 220/F C199 1 2 .1U_10V DVI_TX2-
DVI_CLK+ R127 1 2 220/F C202 1 2 .1U_10V DVI_CLK-

Put these 4 Resistors and 4


Capacitors close to the TX pin of
SDVO device

A A

QUANTA
Title
COMPUTER
SIL 1362 DVI

Size Document Number R ev


CustomDM5 3A

Date: 星期二, 十二月 27, 2005 Sheet 18 of 59


5 4 3 2 1
5 4 3 2 1

J2
Need to apply P/N for new J2 CONN. 44
43
44
43
LCD_BCLK-
LCD_BCLK+
LCD_BCLK- 6
LCD_BCLK+ 6
LCDVCC

42 +3.3V_RUN +5V_ALW
42 LCD_B2-
41 41 LCD_B2- 6
40 LCD_B2+
40 LCD_B2+ 6

1
39 C55 C56 C233 C236
39 LCD_B1-
38 38 LCD_B1- 6
37 LCD_B1+ .1U_10V .047U .1U_10V .1U_50V
LCD_B1+ 6

2
37
36 36
35 LCD_B0-
35 LCD_B0- 6
+15V_SUS +3.3V_RUN LCDVCC 34 LCD_B0+
D 34 LCD_B0+ 6 D
Q17 33
FDC653N_NL 33 LCD_ACLK-
CT_1214: Changed R132 from 32 LCD_ACLK- 6
32 LCD_ACLK+
330K to 100K. Added R468 100K. 6 31 31 LCD_ACLK+ 6

2
5 4 30 +3.3V_RUN
30 LCD_A2-
2 29 29 LCD_A2- 6
R132 1 28 LCD_A2+
28 LCD_A2+ 6
I2C Bus

2
+3.3V_RUN +3.3V_ALW 100K C239 C235 27
R21 27 LCD_A1-
26 LCD_A1- 6

3
47_0805 22U .01U 26 LCD_A1+
25 LCD_A1+ 6

1
25
1

2
LCDVCC_ON 24
24

2
R25 R26 23 LCD_A0- R131
LCD_A0- 6

1
23

2
*47K_NC 47K 22 LCD_A0+ 2.2K R129
22 LCD_A0+ 6

2
C221 21 2.2K
21
3
R468 20 LCD_DDCCLK
LCD_DDCCLK 6
2

1
.01U 100K 20 LCD_DDCDAT
2 19 LCD_DDCDAT 6

1
19 LCD_DDCCLK
18

1
18

3
17 +3.3V_RUN
1

17
3

Q18 2 Q8 16 LCD_DDCDAT
2N7002W-7-F 2N7002W-7-F 16
15 15 LCDVCC
6 ENVDD 2 14

1
14
13 13 LCD_TST 13
Q9 12
12 INV_PWR_SRC
11
1

DTC124EUA 11
10 10
9
Panel Core Power 9
8
7
8
7
BACKLITEON

6 6 SBAT_SMBCLK 27,48
5 5 SBAT_SMBDAT 27,48
C
4 4 C
+3.3V_RUN 3 +5V_ALW
3

1
2 C237
2 C232
1 1

2
JAE_FI-TD44SB-E-R750 47P_50V 47P_50V
Back Light Enable +3.3V_RUN R450
controller 10K RB751V D14
C257
LCD CONN LAMP_D_STAT# 1 2 LAMP_STAT# 13
2

1 2
R451 MO7 inverter: Depop D14
.047U 1 2 BIA_PWM 6,27
5

U14 DO5 inverter: Pop D14


2 *0_NC
28 FPBACK_EN
4 BACKLITEON
1

1
R22 +5V_ALW
*0_NC 7SH08
1

D16
R24 1 +PWR_SRC
2

100K MO7 inverter: Pop R23,R22. Depop U14. 40mil


6 PANEL_BKEN
3 SBAT_SMBCLK 40mil 6
DO5 inverter: Pop U14, Depop R22,U32 4 5
2

2 2
1

2
DA204U C253

1
.1U_50V Q19 C223 C224

3
R152

1
+5V_ALW 100K FDC658P_NL .1U_50V .1U_50V

2
B B
D15

2
1 INV_PWR_SRC_ON

1
3 SBAT_SMBDAT
R151
2 47K

DA204U

2
Diode Terminator/ ESD Protector INV_PWR_SRC_ON_R

3
Adress : A9H --Contrast
2
AAH --Backlight RUN_ON 27,29,40,43,44,46,47
Q20

1
2N7002W-7-F

A A

QUANTA
Title
COMPUTER
LCD CONN&CK-SSCD

Size Document Number R ev


DM5 1A

Date: 星期二, 十二月 27, 2005 Sheet 19 of 59


5 4 3 2 1
A B C D E

+3.3V_SUS +5V_RUN

2
+3.3V_RUN
R443 D1
Place PI filter of RGB near JVGA connetor < 200mils 10K CH501H
1

1
L26

1
1 2 JVGA_R 2 1 C194 3 JVGA_R
4 6,39 VGA_RED D10 4
BLM18BB470SN1D C15 .01U

2
M_SEN# *.1U_NC
2
L27
JVGA_G CRT_VCC
6,39 VGA_GRN 1 2 DA204U
BLM18BB470SN1D
6
L29
11
1 2 JVGA_B 1
6,39 VGA_BLU
BLM18BB470SN1D 7 +3.3V_RUN

1
T56 PAD 12

1
R116 R2 R115 C186 C193 C192 C1 C2 C187 2
75/F 75/F 75/F 8 1

1
4.7P 4.7P 4.7P *4.7P_NC*4.7P_NC*4.7P_NC 13

2
CRT_VCC 3 C188 3 JVGA_G

2
D13
9

2
*.1U_NC
14 2
CRT_VCC +3.3V_RUN JVGA_NC 4
10 DA204U

3
1
15
C5 74AHCT1G125GW +3.3V_RUN +3.3V_RUN RP1 5

1
3
2 1
4P2R-S-2.2K
JVGA1
5

.1U_10V RP2
U2 4P2R-S-2.2K DS01A91-WL36

4
2
2
Q2 2N7002W-7-F <VENDOR> +3.3V_RUN
6 VGA_HSYNC 2 4 1 2

2
4
R4 39 1 3
6 DAT_DDC2 DOCK_DAT_DDC2 39
1

1
Q1
3

3 2N7002W-7-F C191 3 JVGA_B 3


R3 D12
6 CLK_DDC2 1 3 DOCK_CLK_DDC2 39

2
1K L28 *.1U_NC
2
1 2 JVGA_HS
5

BLM11A121S
DA204U
1

U1
HSYNC 39
L25
2 4 1 2 1 2 JVGA_VS
6 VGA_VSYNC
R114 39 BLM11A121S

1
C16 C4
VSYNC 39
3

74AHCT1G125GW C184 C185 C3 C189


10P 10P *10P_NC *10P_NC 10P 10P

2
Place R4,R114 near
Level Shift U1,U2 < 200mils Place L25,L28,C3, C189
near JVGA1 connetor < 200mils.
CRT ESD Protector
In addition to these 150 ohm terminations at the C564 *22pF_NC
connector, 150 ohm terminations are also Place PI filter of TV near JTV1 connetor < 200mils
1 2 Place ESD diodes near JVGA connetor < 200mils
required at the Source. Route from source (GPU) +3.3V_RUN
at 50 ohm terget impedance.
L9 Place ESD diode near JTV1 connector < 200mils
TV_C 1 2 1
6,39 TV_C
BLM18BD151SN1
1

2 2
3
1

R5 C21 C17
150/F 2
47P_50V 47P_50V
2

D4
2

*DA204U_NC

C565 *22pF_NC
1 2
JTV1
L10
6,39 TV_Y TV_Y 1 2 TV_Y/G_L 4
BLM18BD151SN1 1
1

5
1

R6 C22 C18 2
150/F TV_COMP_L 7
47P_50V 47P_50V 3
2

TV_C/R_L 6
2

SUYIN_35134A-06T1

C566 *22pF_NC
1 2 +3.3V_RUN +3.3V_RUN

L11
TV_CVBS 1 2 1 1
6,39 TV_CVBS
1 BLM18BD151SN1 1
1

3 3
1

R7 C23 C19
150/F
47P_50V 47P_50V
2 2
QUANTA
2

D2 D3
TV-OUT
2

CLOSE TO JTV1 *DA204U_NC *DA204U_NC

Title
COMPUTER
CRT&TV CONN

Size Document Number R ev


DM5 1A

Date: 星期二, 十二月 27, 2005 Sheet 20 of 59


A B C D E
1 2 3 4 5 6 7 8

JMOD1
1 2 INT_MOD_IN1# +5V_MOD
+5V_MOD 1 2
3 3 4 4

2
5 6
Check SATA Footprint 7
5
7
6
8 8

1
R159 9 10
100K R27 *0_NC 9 10 C258 C259 C260
11 11 12 12
1 2 13 14 4.7U_10V_0805 0.1U_10V 0.1U_10V
13 RSVD_HDD_DET#

2
13 14
15 15 16 16
17 17 18 18
12 USBP2+ 19 19 20 20
12 USBP2- 21 21 22 22
CON2 23 24
DASP# 23 24 IDE_DCS3#
A
25 25 26 26 A
IDE_DCS1# 27 28 IDE_DA2
27 28 IDE_DA0
GND1 1 29 29 30 30
2 SATA_TX0+ 11 PDIAG# 31 32 IDE_DA1
RXP IDE_IRQ 31 32
RXN 3 SATA_TX0- 11 33 33 34 34
4 C477 R167 4.7K IDE_DDACK# 35 36 CSEL2
GND2 SATA_C_RX0- 35 36
TXN 5 2 1 3900P_25V SATA_RX0- 11 2 1 IDE_DIOR DY 37 37 38 38 IDE_DIOR#
6 +3.3V_RUN 39 40 IDE_DIOW#
TXP SATA_C_RX0+ 39 40
GND3 7 2 1 3900P_25V SATA_RX0+ 11
IDE_DDREQ 41 41 42 42 IDE_DD15
IDE_DD0 43 44
C480 IDE_DD14 43 44 IDE_DD1
45 45 46 46
8 +3.3V_RUN IDE_DD13 47 48 IDE_DD2
3.3V 47 48 IDE_DD12
3.3V 9 49 49 50 50
10 IDE_DD3 51 52 IDE_DD11
3.3V IDE_DD4 51 52
GND 11 53 53 54 54
12 IDE_DD10 55 56 IDE_DD5
GND IDE_DD9 55 56 IDE_DD6
GND 13 57 57 58 58
14 +5V_HDD 59 60 IDE_DD8 R189 56
5V IDE_DD7 59 60
5V 15 61 61 62 62 1 2 IDE_RST_MOD 13
5V 16 63 63 64 64 USB_IDE# 13
GND 17 65 65 66 66
18 67 68 INT_MOD_IN2#
RSVD 67 68 MODPRES# 28
GND 19
20 R166 470
12V IDE_DDREQ CSEL2 JAE-WM1F068N1F-68P-RDV R197 10K
12V 21 11 IDE_DDREQ 2 1
22 IDE_DIOW# 1 2
12V 11 IDE_DIOW# +3.3V_RUN
IDE_DIOR#
11 IDE_DIOR#
IDE_DIOR DY
11 IDE_DIORDY
IDE_DDACK#
11 IDE_DDACK#
Serial ATA IDE_IRQ R191 100K
11 IDE_IRQ
B IDE_DA1 USB_IDE# 1 2 B
11 IDE_DA1 +3.3V_RUN
IDE_DA0
11 IDE_DA0
IDE_DCS1#
11 IDE_DCS1#
IDE_DA2
11 IDE_DA2
+5V_HDD +3.3V_RUN IDE_DCS3#
11 IDE_DCS3#

IDE_DD[0..15]
11 IDE_DD[0..15]
1

C560 C561 C562 C563


1000P_50V 0.1U_10V 0.1U_10V 1000P_50V
2

SATA HDD CONN Near CON2 Near CON2


MEDIA BAY

+5V_RUN +5V_HDD
R424 +5V_SUS +5V_MOD
1 2 R161
C
1 2 C
0_0805
*0_0805_NC

+5V_SUS +5V_HDD

Q42
*SI3456DV_NC +5V_SUS +5V_MOD
6
5 4 Q21
2 SI4420DY
1

+3.3V_ALW 1 8 3
1

R423 7 2
C550 +3.3V_ALW 6 1
3

1
+15V_SUS *4.7U_10V_0805_NC *100K_NC 5
2
1

1
C276 R157 C274
2

R466 R407 *100K_NC 1U_16V C265 0.01U_25V


2

2
1

2 1 4.7U_10V_0805 100K

2
100K R467

2
3

R160 100K
2

Q41 100K 2 1
1

28 HDDC_EN# 2
2

*DTC144EUA_NC C531 +15V_SUS 1


*0.01U_25V_NC Q22
2

2 C275
28 MODC_EN#
1

DTC144EUA 0.01U_25V
2
1

D CT_1212: Added pull up R466 & R467 100K to D


HDDC_EN# & MODC_EN# per MO7 schematics.

QUANTA
COMPUTER
POWER SWITCH Title
IDE (HDD&CD_ROM

Size Document Number R ev


DM5 1A

Date: 星期二, 十二月 27, 2005 Sheet 21 of 59


1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

PV16 PV8 PV11 PV14 H1 H21 H20

2
PAD197X98 PAD197X98 PAD197X98 PAD197X98 1 h-c315d126p2-4 1 h-c315d126p2-4 1 h-c315d126p2-2

5 3 5 3 3
GND

GND

GND

GND
1

4
A CT_1226: Depop PV10 per CT_1215: Change H17 A
mechancial request/EMI confirmed
from 3.2mm to 2.8mm.
H16 H17

2
+3.3V_SUS +3.3V_SUS 1 h-c315d126p2-4 1 H-C315D110P2-4

PV17 PV18 PV7 PV10 5 3 5 3

PAD197X98 PAD197X98 PAD197X98 *PAD197X98_NC C338 C394 C356 C421

1
2200P 2200P 2200P 2200P

2
GND

GND

GND

GND

4
1

H22 H15
+3.3V_RUN +3.3V_RUN H18 H13

2
1 h-c315d126p2-4 1 h-c315d126p2-2

2
Stitching caps 1 h-c315d126p2-4 1 H-C315I166D126P2

5 3 3
5 3

PV15 PV12 PV1

B PAD197X98 PAD197X98 PAD197X98 B

4
GND

GND

GND
1

H8

2
1 h-c236d126p2-4
+3.3V_RUN +3.3V_RUN
+5V_SUS +SBATT +3.3V_RUN +3.3V_RUN +1.8V_SUS +1.8V_SUS +1.5V_RUN
5 3
C83 C147 C174 C454 C156 C42 C40 C372 C277
1

1
PV5 PV6 PV9 PV2 PV3
2200P 2200P 2200P 2200P 2200P 2200P 2200P 2200P 2200P
PAD138X98 PAD138X98 PAD138X98 PAD138X98 *PAD138X98_NC
2

4
+PWR_SRC +PWR_SRC +PWR_SRC +1.8V_SUS +PWR_SRC +PWR_SRC +5V_SUS +1.5V_RUN +PWR_SRC
GND

GND

GND

GND

GND

Stitching caps for IDE Stitching caps for PCI


1

traces referencing to SVCC traces referencing to SVCC


C C
CT_1215: Change CPU screw holes
(H6,H7,H9,H10) from 2.6mm to 2.5mm.

H12 H11 H19 H14

CPU SCREW HOLES


2

2
1 h-c236d110p2-4 1 h-TC276BC236D110P2-4
1 h-c315d118p2-4 1 h-c354d126p2

H6 H9 H7 H10 5 3 5 3 5 3 5 3
H-C236D98I142BC276P2 H-C236D98I142BC276P2 H-C236D98I142BC276P2 H-C236D98I142BC276P2

CT_1215: Change H4 hole diameter


from 3.9mm to 4.3 per ME.
1

4
CT_1215: Change H23 from H-OB189X31D189X31N to H5
H-OB189X28D189X28N. Change H24 to a irregular shape H4 H3
hole per ME request. 1 H-TC276BC236D126P2
D 1 H-C276D169P2 1 H-TC256BC236D126P2 D

H23 H24
QUANTA
COMPUTER
1

H-OB189X28D189X28N Title
SCREW PAD

Size Document Number Rev


DM5 3A

Date: 星期二, 十二月 27, 2005 Sheet 22 of 59


1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

J8
+3.3V_RUN J7 +3.3V_RUN

28 PCIE_WAKE#
R91 0
1 WAKE# 3.3V_1 2 CT_1207: Added a note
31 COEX2_WLAN_ACTIVE 3 RESERVED_1 GND0 4
R90 0 5 6 +1.5V_RUN MiniCard_Nut
31 COEX1_BT_ACTIVE RESERVED_2 1.5V_1
17 MINI1CLK_REQ# 7 CLKREQ# UIM_PWR 8
9 GND1 UIM_DATA 10
17 CLK_PCIE_MINI1# 11 REFCLK- UIM_CLK 12 Suport for WoW
17 CLK_PCIE_MINI1 13 REFCLK+ UIM_RESET 14
15 GND2 UIM_VPP 16 HOST_DEBUG_TX 27 prevents backdrive when WoW is enabled
A A

D20
27 HOST_DEBUG_RX 17 UIM_C8 GND3 18
27 8051TX 19 UIM_C4 W_DISABLE# 20 2 1 WLAN_RADIO_DIS# 28
21 GND4 PERST# 22 PLTRST# 6,12,13,18,27,28
12 PCIE_RX2- 23 PERn0 3.3VAUX1 24 +3.3V_LAN RB751V
12 PCIE_RX2+ 25 PERp0 GND5 26
27 GND6 1.5V_2 28
29 30 R459
GND7 SMB_CLK ICH_SMBCLK 13,17
12 PCIE_TX2- 31 PETn0 SMB_DATA 32 ICH_SMBDATA 13,17
12 PCIE_TX2+ 33 PETp0 GND8 34
35 36 ECE_USBP1- ECE_USBP1- 28 *0_NC
GND9 USB_D- ECE_USBP1+
37 RESERVED_3 USB_D+ 38 ECE_USBP1+ 28
PCI-Express TX and RX direct to connector 39 RESERVED_4 GND10 40
41 RESERVED_5 LED_WWAN# 42 8051RX 27
43 44 LED_WLAN_OUT
RESERVED_6 LED_WLAN# LED_WLAN_OUT 33
45 RESERVED_7 LED_WPAN# 46 BT_ACTIVE 31,33
47 48 R93 *0_NC
RESERVED_8 1.5V_3
49 RESERVED_9 GND11 50
51 RESERVED_10 3.3V_2 52

TYC_1775838-1 +3.3V_RUN

1
C160 C161 C146 C145 C459

B 0.1U_10V 0.047U_10V 0.1U_10V 0.047U_10V 4.7U_10V_0805 B

2
+1.5V_RUN +3.3V_LAN

C159

1
C162 C157

0.047U_10V 0.047U_10V 0.1U_10V

2
C C

D D

QUANTA
Title
COMPUTER
MINI-PCI

Size Document Number R ev


DM5 1A

Date: 星期二, 十二月 27, 2005 Sheet 23 of 59


1 2 3 4 5 6 7 8
5 4 3 2 1

these 1394 signals are high +CBS_VCC


speed differential pairs and CON1
Please these parts must be kept equal length
nearOZ711EZ1. PCI-1CA41501-T1-TH
U17 with a differential impedance
(Zo) of 110 ohms. 1 GND GND 69
CBS_CAD0 2 70
12,36 PCI_AD[0..31]
OZ711EZ1 R244 5.9K/F CBS_CAD1
CBS_CAD3
3
D3-CAD0
D4-CAD1
GND
GND 71
1 2 4 D5-CAD3 GND 72
PCI_AD31
PCI_AD30
19
20
AD31 128 PIN LQFP R1 72
70 IEEE1394 OZTPA+
CBS_CAD5
CBS_CAD7
5
6
D6-CAD5
AD30 TPAP IEEE1394 OZTPA+ 25 D7-CAD7
PCI_AD29 21 69 IEEE1394 OZTPA- CBS_CC/BE0# 7
AD29 TPAN IEEE1394 OZTPA- 25 CE1#-CC/BE0#
PCI_AD28 22 IEEE 1394 67 IEEE1394 OZTPB+ CBS_CAD9 8
AD28 TPBP IEEE1394 OZTPB+ 25 A10-CAD9
D PCI_AD27 23 66 IEEE1394 OZTPB- CBS_CAD11 9 D
AD27 TPBN IEEE1394 OZTPB- 25 OE#-CAD11
PCI_AD26 24 AD26
(8) TPBIAS 71 TPBIAS
TPBIAS
CBS_CAD12 10 A11-CAD12
PCI_AD25 25 74 PCCARD_XI CBS_CAD14 11
AD25 XI PCCARD_XI A9-CAD14
PCI_AD24 27 75 PCCARD_XO CBS_CC/BE1# 12
AD24 XO PCCARD_XO A8-CC/BE1#
PCI_AD23 29 CBS_CPAR 13
PCI_AD22 AD23 CBS_CPERR# A13-CPAR
30 AD22 14 A14-CPERR#
PCI_AD21 31 3 CBS_CAD31 IEEE1394 OZTPA+ IEEE1394 OZTPB+ CBS_CGNT# 15
PCI_AD20 AD21 CAD31 CBS_CAD30 IEEE1394 OZTPA- IEEE1394 OZTPB- CBS_CINT# WE/PGM-CGNT#
32 AD20 CAD30 1 16 RDY/BSY-IRQ/CIN
PCI_AD19 34 128 CBS_CAD29 17
AD19 CAD29 VCC

2
R233 100 PCI_AD18 35 127 CBS_CAD28
IDSEL 1 PCI_AD17 PCI_AD17 AD18 CAD28 CBS_CAD27
2 36 AD17 CAD27 126 18 VPP1
PCI_AD16 37 125 CBS_CAD26 R243 R245 R239 R240 CBS_CCLK 19
PCI_AD15 AD16 CAD26 CBS_CAD25 56.2 56.2 56.2 56.2 CBS_CIRDY# A16-CCLK
47 AD15 CAD25 124 20 A15-CIRDY#
PCI_AD14 48 122 CBS_CAD24 CBS_CC/BE2# 21

1
PCI_AD13 AD14 CAD24 CBS_CAD23 TPBIAS CBS_CAD18 A12-CC/BE2#
49 AD13 CAD23 120 TPBIAS 22 A7-CAD18
PCI_AD12 50 PC CARD 118 CBS_CAD22 CBS_CAD20 23
AD12 CAD22 A6-CAD20

1
PCI_AD11 51 116 CBS_CAD21 CBS_CAD21 24
PCI_AD10 AD11 SOCKET CAD21 CBS_CAD20 C361 C357 CBS_CAD22 A5-CAD21
52 AD10 CAD20 115 25 A4-CAD22
PCI_AD9 53 PCI HOST BUS 114 CBS_CAD19 1U_10V R238 820P_50V CBS_CAD23 26
(32)

2
PCI_AD8 AD9 CAD19 CBS_CAD18 5.1K CBS_CAD24 A3-CAD23
54 AD8 CAD18 113 27 A2-CAD24
PCI_AD7 57 (46) 112 CBS_CAD17 CBS_CAD25 28

1
PCI_AD6 AD7 CAD17 CBS_CAD16 CBS_CAD26 A1-CAD25
58 AD6 CAD16 96 29 A0-CAD26
PCI_AD5 59 94 CBS_CAD15 CBS_CAD27 30
PCI_AD4 AD5 CAD15 CBS_CAD14 CBS_CAD29 D0-CAD27
60 AD4 CAD14 93 Y2 31 D1-CAD29
PCI_AD3 61 92 CBS_CAD13 R254 0 CBS_R2_D2 32
PCI_AD2 AD3 CAD13 CBS_CAD12 PCCARD_XI 2 PCCARD_XO CBS_CCLKRUN# D2-RFU
62 AD2 CAD12 91 PCCARD_XI 1 1 2 PCCARD_XO 33 WP/IOIS16-CCLKR
PCI_AD1 63 90 CBS_CAD11 34
AD1 CAD11 GND

1
PCI_AD0 64 89 CBS_CAD10 24.576MHZ
AD0 CAD10 CBS_CAD9 C368 C382
CAD9 88 35 GND
C 28 87 CBS_CAD8 10P_50V 10P_50V CBS_CCD1# 36 C
12,36 PCI_C_BE3#

2
C/BE3# CAD8 CBS_CAD7 CBS_CAD2 CD1#-CCD1#
12,36 PCI_C_BE2# 38 C/BE2# CAD7 84 Please these parts 37 D11-CAD2
46 83 CBS_CAD6 near OZ711EZ1. CBS_CAD4 38
12,36 PCI_C_BE1# C/BE1# CAD6 D12-CAD4
55 81 CBS_CAD5 CBS_CAD6 39
12,36 PCI_C_BE0# C/BE0# CAD5 D13-CAD6
80 CBS_CAD4 CBS_R2_D14 40
CAD4 CBS_CAD3 CBS_CAD8 D14-RFU
12,36 PCI_DEVSEL# 42 DEVSEL# CAD3 79 41 D15-CAD8
39 78 CBS_CAD2 CBS_CAD10 42
12,36 PCI_FRAME# FRAME# CAD2 CE2#-CAD10
IDSEL 9 77 CBS_CAD1 CBS_CVS1# 43
IDSEL CAD1 CBS_CAD0 CBS_CAD13 VS1#/RFSH-CVS1
12,36 PCI_IRDY# 40 IRDY# CAD0 76 44 RSVD-CAD13
44 CBS_CAD15 45
12,36 PCI_PAR PAR RSVD-CAD15
CLK_PCI_PCCARD 45 101 CBS_CBLOCK# CBS_CAD16 46
PCI_CLK CBLOCK# CBS_CC/BE0# CBS_R2_A18 A17-CAD16
12 PCI_GNT1# 18 PCI_GNT# CC/BE0# 86 47 A18-RFU
17 95 CBS_CC/BE1# CBS_CBLOCK# 48
12 PCI_REQ1# PCI_REQ# CC/BE1# A19-CBLOCK#
43 111 CBS_CC/BE2# CBS_CSTOP# 49
12,36 PCI_STOP# STOP# CC/BE2# A20-CSTOP#
41 123 CBS_CC/BE3# CBS_CDEVSEL# 50
12,36 PCI_TRDY# TRDY# CC/BE3# A21-CDEVSEL#
R264 10 51 VCC
12,36 PCI_RST# 5 PCI_RST# CCLK 106 1 2 CBS_CCLK
EPSI 8 4 CBS_CCLKRUN# 52
EPSI CCLKRUN# CBS_CDEVSEL# CBS_CTRDY# VPP2/VPP2
MISCELLANEOUS CDEVSEL# 105
CBS_CFRAME# CBS_CFRAME#
53 A22-CTRDY#
13,27,28 IRQ_SERIRQ 6 IRQSER CFRAME# 110 54 A23-CFRAME#
28,36 SYS_PME# 7 PME#
(4) CGNT# 102 CBS_CGNT# CBS_CAD17 55 A24-CAD17
104 CBS_CINT# CBS_CAD19 56
CINT# CBS_CIRDY# CBS_CVS2# A25-CAD19
+3.3V_RUN
PC CARD CIRDY# 109
CBS_CPAR CBS_CRST#
57 VS2#/RSVD-CVS2
11 3.3VCC_0 CPAR 98 58 RESET-CRST
97 3.3VCC_1
INTERFACE CPERR# 100 CBS_CPERR# CBS_CSERR# 59 WAIT#-CSERR#
121 CBS_CREQ# CBS_CREQ# 60
CB_3.3VCCA 65
(27) CREQ#
117 CBS_CRST# CBS_CC/BE3# 61
RSVD-CREQ#
3.3VCCA_0 CRST# CBS_CSERR# REG#-CC/BE3#
68 3.3VCCA_1 CSERR# 119 62 BVD2/SP-CAUDIO#
73 103 CBS_CSTOP# CBS_CSTSCHG 63
3.3VCCA_2 CSTOP# CBS_CTRDY# CBS_CAD28 BVD1-STSCHG
B CTRDY# 107 64 D8-CAD28 B
CBS_R2_A18 CBS_CAD30
+OZ1.8V 16 1.8VCC_0 POWER PLANE RFU_A18 99
CBS_R2_D2 CBS_CAD31
65 D9-CAD30
82 1.8VCC_1 RFU_D2 2 66 D10-CAD31
(11) RFU_D14 85 CBS_R2_D14 CBS_CCD2# 67 CD2#-CCD2#
26 13 CBS_CSTSCHG 68
+3.3V_RUN PCI_VCC_0 CSTSCHG +CBS_VCC GND
56 PCI_VCC_1
10 CBS_CCD1# +5V_RUN +3.3V_RUN
CD1# CBS_CCD2#
33 GND_0 CD2# 14
108 12 CBS_CVS1#
GND_1 VS1
CardBus Slot

1
15 CBS_CVS2#
VS2
1

2
C384 C383
C399 C400 C398 C397 0.1U_10V 0.1U_10V

2
OZ711EZ1TN 0.1U_10V 4.7U_10V 0.1U_10V 4.7U_10V
2

1
CLK_PCI_PCCARD Place these caps Place these caps
17 CLK_PCI_PCCARD
near OZ2532. near connector.
1

Reserved for EMI R234 U18 R262 33


*10_NC 20 PIN SSOP 2 1EPSI
+5V_RUN 15 1
1 2

5V_0 EPSI CLK_PCI_PCCARD


16 5V_1 PCI_CLK 2
INTA# 3 PCI_PIRQD# 12
C348 +3.3V_RUN 17 6
3.3V_0 CLKRUN# CLKRUN# 13,27,28,36
*4.7P_50V_NC 18 7 PCI_PERR# 12,36
2

3.3V_1 PERR#
SERR# 8 PCI_SERR# 12,36
+OZ1.8V 19 9
1.8VOUT SKT_LED
RESET# 10 PCI_RST# 12,36
A +CBS_VCC 4 VCC/VPP_0 A
5 VCC/VPP_1 USB_A0 14 USBP0- 12
+3.3V_RUN +OZ1.8V 13 CBS_CAD15
L43 USB_B0

BLM11A05S
CB_3.3VCCA 20 GND
USB_A1
USB_B1
12
11 CBS_CAD13
USBP0+ 12
QUANTA
2

C347
4.7U_10V
C366
0.1U_10V
C379
0.1U_10V
C385
0.1U_10V
C349
0.1U_10V
C351
4.7U_10V
C370
0.1U_10V
C359
0.1U_10V
C371
4.7U_10V
C380
0.1U_10V
OZ2532L
Title
COMPUTER
1

PCCARD

Place these caps near OZ711EZ1.


Power Switch (PCMCIA) Size Document Number
DM5
Rev
1A

Date: 星期二, 十二月 27, 2005 Sheet 24 of 59


5 4 3 2 1
1 2 3 4 5 6 7 8

A A

IEEE1394 OZTPA+ R44 1 2 0 OLTPA+


IEEE1394 OZTPA- R42 1 2 0 OLTPA-
IEEE1394 OZTPB+ R40 1 2 0 OLTPB+
IEEE1394 OZTPB- R37 1 2 0 OLTPB-

EB2
*PLW3216S900SQ2T1_NC J3

3 3 4 4
B B
IEEE1394 OZTPA+ 2 2 1 1 OLTPA+ 4
24 IEEE1394 OZTPA+ A1+
IEEE1394 OZTPA- OLTPA- 3
24 IEEE1394 OZTPA- A1-
IEEE1394 OZTPB+ 3 3 4 4 OLTPB+ 2
24 IEEE1394 OZTPB+ B1+
IEEE1394 OZTPB- OLTPB- 1
24 IEEE1394 OZTPB- B1-
2 2 1 1

EB1
*PLW3216S900SQ2T1_NC
TYCO_IEEE1394
these 1394 signals are high 1394A PORT
speed differential pairs and
must be kept equal length
with a differential impedance
(Zo) of 110 ohms.

C C

D D

QUANTA
Title
COMPUTER
ExpressCard/SmartCard

Size Document Number R ev


JM6 1A

Date: 星期二, 十二月 27, 2005 Sheet 25 of 59


1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

A A

J10 Note: FDV301N Vgs(th) =1.5V(Max)


1 GND1 Reserved1 2
11 ICH_AZ_MDC_SDOUT ICH_AZ_MDC_SDOUT 3 4
IAC_SDATO Reserved2 R399
5 6
11 ICH_AZ_MDC_SYNC
ICH_AZ_MDC_SYNC
1 2 MDC_SDIN
7
9
GND2
IAC_SYNC
MDC 3.3V
GND3 8
10
+3.3V_SUS
2 1
11 ICH_AZ_MDC_SDIN1 IAC_SDATAIN GND4
ICH_AZ_MDC_RST1# R397 33 11 12 ICH_AZ_MDC_BITCLK *0_NC
IAC_RESET# IAC_BITCLK ICH_AZ_MDC_BITCLK 11

1
Q13
New MDC R392 ICH_AZ_MDC_RST1# 1 3 ICH_AZ_MDC_RST# ICH_AZ_MDC_RST# 11
*33_NC

1 2
FDV301N +5V_SUS

2
2
C504
*10P_NC R396

2
JS2

2
100K R103

1
B 10K B
MDC_NUT

1
MDC_RST_DIS# MDC_RST_DIS# 28
ICH_AZ_MDC_SDOUT

1
+3.3V_SUS
Note: MDC DISABLE
R401
*33_NC If paltform requries MDC disable, populate this cirucit.
1

If MDC disable isn't required, connect ICH_AZ_RST# directly to JMD connecotr.

2
C495 C173
0.1U_10V 4.7U_10V
2

C521
*10P_NC

MDC CONN.

C C

Keep the space 40mil between Tip/Ring. JMODEM1


DOCK_TIP 1
39 DOCK_TIP 1
DOCK_RING 2
39 DOCK_RING 2
3 3
4 4
5 5
C207 C206
53398-0590
*300P_1808_3KV_NC *300P_1808_3KV_NC

CC1808 CC1808

TIP & RING To Docking and MDC CONN.

D D

QUANTA
Title
COMPUTER
MDC CONN.

Size Document Number R ev


DM5 1A

Date: 星期二, 十二月 27, 2005 Sheet 26 of 59


1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

+5V_ALW TVS1 TVS2


+3.3V_ALW R56 C85 KSO2 KSO0 KSI1 KSI3
1 1 6 6 1 1 6 6
R63 8.2K CLK_PCI_SIO_1 1 2 1 2 2 5 KSO12 2 5 KSI0
DOCK_SMB_DAT KSO15 GND 5 KSO16 KSO4 GND 5 KSO5
1 2 3 3 4 4 3 3 4 4
R259 8.2K *10_NC *22P_50V_NC
2 PBAT_SMBDAT R64 8.2K PACDN045YB6R PACDN045YB6R
1
1 2 DOCK_SMB_CLK Place close to pin 58.
R260 8.2K USIO1 TVS3 TVS4
1 2 PBAT_SMBCLK R256 10K KSO7 1 1 6 6 KSO6 KSI7 1 1 6 6 KSI6
2 1 DOCK_SMB_INT# 2 5 KSO8 2 5 KSI4
R246 2.2K MEC5004 EC-07 KSO1 3
GND
3
5
4 4 KSO3 KSI5 3
GND
3
5
4 4 KSI2
1 2 SBAT_SMBDAT

R248 2.2K 33 BREATH_LED FAN1_PWM


45 OUT10/PWM0 128 PIN VTQFP CLKRUN# 64
CLK_PCI_SIO_1
CLKRUN# 13,24,28,36
PACDN045YB6R PACDN045YB6R
A
1 2 SBAT_SMBCLK
T66 PAD
FAN2_PWM
46
47
OUT11/PWM1 PCI POWER PCI_CLK 58
56
CLK_PCI_SIO_1 17
TVS5 A
T17 PAD OUT9/PWM2 SER_IRQ IRQ_SERIRQ 13,24,28
T67 PAD FAN3_PWM 48 OUT2/PWM3 SIRQ nEC_SCI/SPDIN2 66 SIO_EXT_SCI# 13
KSO13 1 1 6 6 KSO14
R445 100K 11 2 5 KSO9
BAT_SEL# 13 SIO_EXT_SMI# OUT7/nSMI KSO10 GND 5 KSO11
1 2 13 SIO_THRM# 50 OUT5/KBRST LAD0 60 LPC_LAD0 11,28 3 3 4 4
LAD1 61 LPC_LAD1 11,28 JKB1 PACDN045YB6R
DEBUG_ENABLE# 67
LPC BUS LAD2 62
63
LPC_LAD2 11,28
KSO10

GND1
SGPIO31/TIN1/SPCLK1 LAD3 LPC_LAD3 11,28 1
VGA_IDENTIFY
11 SIO_A20GATE 92 SGPIO34/A20M (6) LFRAME# 59 LPC_LFRAME# 11,28
KSO11
2
DOCK_SMB_INT# 1 57 KSO9
39 DOCK_SMB_INT# SGPIO35 LRESET# PLTRST# 6,12,13,18,23,28 3
1

CT_1223: added SFPI_EN KSO14


R51 1 = Discrete. R471 0 ohm on
2
3
SGPIO36 SFR 102 KSO13 4
SPI_CS# (SGPIO43) 48 PS_ID_DISABLE# SGPIO37 HSTCLK ICH_EC_SPI_CLK 12 5
100K
0 = UMA. of 5004. 33 CAP_LED# 91 SGPIO40 GPIO HSTDATAIN 105 ICH_EC_SPI_DIN 12
KSO15
6
90 107 KSO16
33 SCRL_LED# SGPIO41 (13) HSTDATAOUT ICH_EC_SPI_DO 12 7
KSO12
33 NUM_LED# 89 HOST
2

SGPIO42 8
12,30 SPI_CS# 1 R471 0 2 4 SGPIO43 FLCLK 103 EC_FLASH_SPI_CLK 30
KSO0
9
48 PS_ID 54 SGPIO44/MSCLK/SPCLK2 /8051 SPI FLDATAIN 106 EC_FLASH_SPI_DIN 30
KSO2
10
PAD RUN_ON_D 55 108 KSO1
T14 SGPIO45/MSDATA/SPDOUT2 (8) FLDATAOUT EC_FLASH_SPI_DO 30 11
T13 PAD VGA_IDENTIFY 69 KSO3
SGPIO46/SPDIN1 KSO8 12
33 LID_CL_SIO# 68 SGPIO47/SPDOUT1 FLCS0/OUT1 109 SIO_PWRBTN# 13 13
+3.3V_SUS 110 BAT_SEL# PAD T101 KSO6
DOCK_SMB_DAT FLCS1/OUT3 KSO7 14
39 DOCK_SMB_DAT 5 AB1A_DATA 15
R209 DOCK_SMB_CLK KSO0 +3.3V_ALW KSO4
2 1 ATF_INT#
39 DOCK_SMB_CLK
PBAT_SMBDAT
6
7
AB1A_CLK ACCESS KSO0/GPIOC0 32
31 KSO1 KSO5 16
42,48 PBAT_SMBDAT AB1B_DATA KSO1/GPIOC1 17

R453 *100K_NC
BUS(4)

*10K_NC
PBAT_SMBCLK 8 30 KSO2 KSI0
42,48 PBAT_SMBCLK AB1B_CLK KSO2/GPIOC2 18

2
10K 29 KSO3 ALWON KSI3
KSO3/GPIOC3 KSI1 19
+3.3V_ALW RP3 KSO4 KSI5 20
KSO4/GPIO0 28 21

1
3 4 CLK_SMB 93 27 KSO5 KSI2
37,46 AUX_EN GPIO11/AB2A_DATA KSO5/GPIO1 22

R454
1 2 DAT_SMB 94 25 KSO6 D19 *4.7U_6.3V_NC KSI4
40,46,47 SUS_ON

1
GPIO12/AB2A_CLK KSO6/GPIO2 23

GND2
B 95 24 KSO7 *RB751V_NC 1 2 KSI6 B
4P2R-S-10K 19,29,40,43,44,46,47 RUN_ON ITP_DBRESET# GPIO13/AB2B_DATA KSO7/GPIO3 KSI7 24
3,13 ITP_DBRESET# 96 GPIO14/AB2B_CLK 25

1
+RTC_CELL SBAT_SMBDAT 111 23 KSO8 C567

2
C376 *1U/10V/0603_NC 19,48 SBAT_SMBDAT SBAT_SMBCLK GPIO87/AB1C_DATA KSO8/GPIOC4 KSO9 HRS FH28D-50(25)SB-1SH(86)
1 R252 2 1 2
19,48 SBAT_SMBCLK 112
9
GPIO86/AB1C_CLK KSO9/GPIOC5 20
19 KSO10
2 1 2
Q52
Keyboard
32 DAT_SMB GPIO85/AB1D_DATA KSO10/GPIOC6
32 CLK_SMB 10 18 KSO11 R455 *10K_NC *3906_NC CONN

3
100K_0402 GPIO84/AB1D_CLK KSO11/GPIOC7
INSTANT_ON_SW#
11 SIO_RCIN# 99
100
GPIO91/AB1E_DATA KEYBOARD 17 KSO12 VR_CAP 1 2
13 SIO_EXT_WAKE# GPIO90/AB1E_CLK KSO12/OUT8
13 SIO_SLP_S5# 97 GPIO93/AB1F_DATA /MOUSE KSO13/GPIO18 16 KSO13
R456 *0_NC
Q53

3
98 15 KSO14
R250 13 SIO_SLP_S3# GPIO92/AB1F_CLK (30) KSO14/GPIO4
1 2 SNIFFER_PWR_SW# 14 KSO15 2 +PWR_SRC
KSO15/GPIO5
100K 32 FAN1_TACH 41 GPIO15/FAN_TACH1

R457 *100K_NC
1
*2N7002W-7-F_NC
FAN2_TACH KSO16 +3.3V_RTC_LDO R72 *10K_NC
T20 PAD 42 GPIO 13

1
CT_1207: Change netname SNIFFER_LED_OFF# 43 GPIO16/FAN_TACH2 KSO16/GPIOA0 KSO17 T21
T19 PAD GPIO82/FAN_TACH3 KSO17/GPIOA1 12 2 1
to SNIFFER_LED_OFF#
per MO7_A06
(22) +5V_RUN *MAX1615_NC U8
T15 PAD FREE_GPIO83 117 40 KSI0 3 OUT 1
+3.3V_ALW GPIO83/32KHZ_OUT KSI0/SGPIO30 PAD IN
4 5/3#

2
1 = Enabled. 8051RX 81 39 KSI1
23 8051RX GPIO20/PS2CLK/8051RX KSI1/GPIO6
1

1
8051TX 82 38 KSI2 2 5 C102
0 = Disabled 23 8051TX GPIO21/PS2DAT/8051TX KSI2/GPIO7 GND SHDN

8
6
4
2
R257 37 KSI3 C98
*1K_NC KSI3/GPIO8 KSI4 RP21 *2.2U/6.3V/0603_NC *1U_25V_NC
31 CLK_TP_SIO 75 36

2
GPIO94/IMCLK KSI4/GPIO9 KSI5
31 DAT_TP_SIO 76 35 EC5004 Rev C Pop.
GPIO95/IMDAT KSI5/GPIO10 KSI6 8P4R-4.7K
34 EC5 004 Rev D De-Pop
2

SFPI_EN ATF_INT# KSI6/GPIO17 KSI7


32 ATF_INT# 52 33

7
5
3
1
R235 *0_NC GPIO96/TOUT1 KSI7/GPIO19
73 GPIOA3/WINDMON
1

6,19 BIA_PWM 1 2 EMCLK 79 CLK_DOCK 39


R258 80
EMDAT DAT_DOCK 39
1K D6
HOST_DEBUG_TX 70
MISCELLANEOUS KCLK 77
78
CLK_KBD 39
1 2
23 HOST_DEBUG_TX SYSOPT0/SGPIO32/LPC_TX KDAT DAT_KBD 39
HOST_DEBUG_RX +RTC_CELL
23 HOST_DEBUG_RX 71 SYSOPT1/SGPIO33/LPC_RX (9)
2

C C
Flash Recovery. 53 87 RB751V
40 RESET_OUT# nRESET_OUT/OUT6 BC_CLK BC_CLK 28
33 BAT1_LED# 114
115
nBAT_LED BC BC_DAT 86
85
BC_DAT 28
0 R69 D7 R70 1K
33 BAT2_LED# nPWR_LED BC_INT BC_INT# 28
49 MEC5004_VCC0 2 1 1 2VCCRTC_D
1 2
28,40,45 RUNPWROK PWRGD
R458 FWP# 84 121 MEC5004_VCC0
0 nFWP VCC0

2
C101 RTC-BATTERY RB751V BT1
1 2 72 TEST_PIN(NC)
+3.3V_ALW Low = C95 4.7U_6.3V 22 21 1
EC5004 RevC C95=22u VR_CAP VCC1_0
2 1 VR_CAP 44 "Share 10uF Nearby" 0.1U_10V 2
Write

1
VCC1_1
1

1
EC5004 RevD C95=4.7u 65
R237 Protected. VCC1_2 060016MA002G200NL C99
32,41,42 ACAV_IN 128 ACAV_IN VCC1_3 83
100K MAIN_PWR_SW# 127 *0.1U_50V_NC
POWER POWER 116

2
INSTANT_ON_SW# 126 POWER_SW_IN0# VCC1_4 +3.3V_ALW
POWER_SW_IN1#
FWP# T18 PAD SNIFFER_PWR_SW# 119 SWITCH PLANES 26
2

POWER_SW_IN2# VSS_0
46 ALWON 120 51
PAD SNIFFER_RTC_GPO118 ALWAYS_ON#
BGPO0
(6) (14) VSS_1
VSS_2 74 +3.3V_ALW
1

T16
VSS_3 88

1
R236 Flash Write 113 L48 BLM11A121S
*100K_NC MEC5004_XTAL1 VSS_4 RAGND1 C363 C89 C96 C81 C80
122 2
Protect bottom R251 MEC5004_XTAL2 XTAL1 10U_6.3V 0.1U_10V 0.1U_10V 0.1U_10V 0.1U_10V
124 CLOCK 125

2
4K of internal MEC5004_XOSEL XTAL2 AGND VCC_SIO_PLL
1 2 123 104 2 1
2

XOSEL(GND) VCC_PLL L44 BLM11A121S +3.3V_ALW


bootblock VSS_PLL 101
1

10K
flash. C353
0.1U_10V
2

MEC5004

+RTC_CELL +3.3V_RTC_LDO Make accessible without remoing board from chassis.


32,33 POWER_SW# Cory_0824:Changed C96 and C80 from 0.047u to 0.1u
W2 +3.3V_ALW
D R253 0 JDEBUG2 follow M07 A04. D
1

MEC5004_XTAL2
1 2 1 4 MEC5004_XTAL1
R65 R67 R66 3 HOST_DEBUG_TX
100K *100K_NC R61 R60 2 HOST_DEBUG_RX
10K
2 3
JDEBUG1 10K 10K 1
QUANTA
1

C381 *JDEBUG1_NC 2
2

5
1

MAIN_PWR_SW# C377
15P_50V
32.768KHZ
15P_50V 4
8051RX
8051TX R68 R71 COMPUTER
2

3
1

C100 Not Stuff 0 ohm *10K_NC *10K_NC Title


32 kHz Clock.
2

1U_10V 2 R59 0 Ultra I/O Controller MEC5004


when doing
1

1 DEBUG_ENABLE#
Power Switch 1 2
2

*53780_NC Flash recovery Size Document Number R ev


Debug Serial Port Flash Recovery Port. DM5 1A

Date: 星期二, 十二月 27, 2005 Sheet 27 of 59


1 2 3 4 5 6 7 8
5 4 3 2 1

Place closely pin USIO2.


RP32
+3.3V_ALW 2 1 PCIE_WAKE#
4 3 SYS_PME# CLK_PCI_SIO_2
6 5 DOCK_SIO_ALERT#

1
8 7 SBAT_ALARM#
CT_1207: Pop R293 and Depop R309
for board ID change(X02) 8P4R-10K R272
*10_NC
R271 10K

2
2 1 PBAT_ALARM#
Board ID Straps +3.3V_ALW
USIO2

1
D R322 *10K_NC D
2 1DBAY_MODPRES# C391
*4.7P_50V_NC
ECE5018 Midway

2
R274 *10K_NC
2 1 SC_DET#
2

2
PCIE_WAKE#
128 PIN VTQFP
R290 R291 R292 R293
23 PCIE_WAKE#
SYS_PME#
97
98
GPIOA[0] PCI POWER CLKRUN# 37
56
CLKRUN# 13,24,27,36
24,36 SYS_PME# GPIOA[1] PCI_CLK CLK_PCI_SIO_2 17
*10K_NC *10K_NC 10K 10K 39 DOCK_SIO_ALERT# DOCK_SIO_ALERT# 99 GPIOA[2] SIRQ (3) SER_IRQ 39 IRQ_SERIRQ 13,24,27
48 PBAT_PRES# 100 DOCKING
1

1
GPIOA[3]
41,48 SBAT_PRES# 101 GPIOA[4] LAD0 54 LPC_LAD0 11,27 PULLED UP
BID0 102 52
41 CHG_PBATT GPIOA[5] LAD1 LPC_LAD1 11,27
BID1 103 49 +3.3V_RUN
41 CHG_SBATT GPIOA[6] LAD2 LPC_LAD2 11,27
BID2
BID3
41 SBAT_LOW 104 GPIOA[7] LPC BUS LAD3 47
42
LPC_LAD3 11,27
LFRAME# LPC_LFRAME# 11,27
BID0 112 GPIOF[4] (8) LRESET# 41 PLTRST# 6,12,13,18,23,27
2

1
3
BID1 111 46
GPIOF[5] LDRQ0# LPC_LDRQ0# 11
BID2 110 44 RP23
GPIOF[6] LDRQ1# LPC_LDRQ1# 11
R306 R307 R308 R309 BID3 109 4P2R-S-100K
10K 10K *10K_NC *10K_NC GPIOF[7]
DLAD0 55 D_LAD0 39
13 ICH_PCIE_WAKE# 88 53 D_LAD1 39
1

GPIOG[0] DLAD1
12 ICH_PME# 89 DOCKING LPC 50 D_LAD2 39

2
4
GPIOG[1] DLAD2 D_CLKRUN#
32 THERMTRIP_SIO 90
91
GPIOG[2] GPIO (8) DLAD3 48
43
D_LAD3 39
D_SERIRQ
PAD T40 GPIOG[3] DLFRAME# D_LFRAME# 39
PAD T39 92 GPIOG[4] (25) DCLK_RUN# 38 D_CLKRUN# 39
19 FPBACK_EN 93 GPIOG[5] DLDRQ1# 45 D_DLDRQ1# 39
CB_HWSPND# 94 40 +3.3V_RUN
PAD T41 GPIOG[6] DSER_IRQ D_SERIRQ 39
BID3 BID2 BID1 BID0 Board Revision CPU_PROCHOT# 95
3 CPU_PROCHOT# GPIOG[7]
0 0 0 0 ENG1(M00) 60 BC_CLK
BC_CLK BC_CLK 27
0 0 0 1 ENG2(X00) BC_DAT
C 39 DOCK_PWR_EN 26 GPIOH[4] BC BC_DAT 59 BC_DAT 27 C

2
0 0 1 0 ENG3 (X01) SNIFFER_WIRELESS_ON/OFF#
27 58 BC_INT#
GPIOH[5] BC_INT# BC_INT# 27
0 0 1 1 ENG4 (X02) 32
21 MODPRES# GPIOH[6]
0 1 0 0 RAMP SC_DET# 33 65 R273
GPIOH[7] GPIOB[0]/INIT# 100K
23 WLAN_RADIO_DIS# GPIOB[1]/SLCTIN# 66
105 82 HP_NB_SENSE 34,35

1
R84 12K/F OUT65 GPIOB[2]/PD0
GPIOB[3]/PD1 81 DOCK_HP_MUTE# 34
2 1 127 80 5V_CAL_SIO2# D_DLDRQ1#
RBIAS GPIOB[4]/PD2 T98 PAD
+3.3V_RUN 126 79
+3.3V_ALW ATEST GPIOB[5]/PD3 5V_CAL_SIO#
2 1 GPIOB[6]/PD4 78 T99 PAD
1

ECE5018 XTAL2 IMVP6_PROCHOT#


R73
R82 10K ECE5018 XTAL1
122
123
XTAL2 PARALLEL GPIOB[7]/PD5 77 IMVP6_PROCHOT# 45
XTAL1/CLKIN
*100K_NC PORT (17) GPIOC[0]/PD6 76 SPDIF_SHDN 34
ICH(P5) 12 USBP1+ 9 USBDP0 GPIOC[1]/PD7 75
12 USBP1- 10 67 MDC_RST_DIS# 26
2

SNIFFER_WIRELESS_ON/OFF# USBDN0 GPIOC[2]/SLCT


WLAN 23 ECE_USBP1+ 13 USBDP1 GPIOC[3]/PE 68 ADAPT_OC 42
23 ECE_USBP1- 12 USBDN1 USB GPIOC[4]/BUSY 69 Cory_0819:Moved Nets name
1

Bluetooth 31 ECE_USBP2+ 15 USBDP2 GPIOC[5]/ACK# 70


C109 31 ECE_USBP2- 16 USBDN2 (19) GPIOC[6]/ERROR# 71 NB_Mute to Pin73. +3.3V_SUS
*1U_10V_NC ECE_USBP3+ 19 73 NB_MUTE
PAD T72 NB_MUTE 34,35
2

NO Use USBDP3 GPIOC[7]/ALF#


ECE_USBP3-
Cory_0824:Let R73 and C109 PAD T73 18 USBDN3

2
ECE_USBP4+ 21 74
PAD T38 USBDP4 GPIOD[0]/STROBE# AC_OFF 42,48
NC, not used Sniffer. NO Use
PAD T37
ECE_USBP4- 22 USBDN4
1 RXD0 R74
GPIOE[0]/RxD RXD0 29
R329 1M 63 2 TXD0 10K
PAD T30 GPIOD[3]/VBUS_DET GPIOE[1]/TxD TXD0 29
RTS0#
1 2 36 LOM_LOW_PWR# 28 UART 3 RTS0# 29

1
GPIOD[4]/OCS1_N GPIOE[2]/RTS# DSR0#
34 AUDIO_AVDD_ON 29 GPIOD[5]/OCS2_N GPIOE[3]/DSR# 4 DSR0# 29
34 BEEP 30 GPIOD[6]/OCS3_N (8) GPIOE[4]/CTS# 5 CTS0#
CTS0# 29
RI0#
W3 R328 31 84 DTR0#
42 ADAPT_TRIP_SEL GPIOD[7]/OCS4_N GPIOE[5]/DTR# DTR0# 29
B ECE5018 XTAL1 1 2 1 2 ECE5018 XTAL2 83 RI0# B
GPIOE[6]/RI# RI0# 29
0 VDDA 125 6 DCD0#
VDDA33PLL GPIOE[7]/DCD# DCD0# 29
24MHz 8 VDDA33_0
1

14 VDDA33_1 IRTX 113 IRTX 38


C437 C438
33P_50V 33P_50V
20
11
VDDA33_2 IRCC IRRX 114
61 SBAT_ALARM#
IRRX 38
SBAT_ALARM# 48
2

VSS_0 GPIOD[1]/CIRTX
17 VSS_1 (8) GPIOD[2]/CIRRX 62 PBAT_ALARM#
PBAT_ALARM# 48
CLK_SIO_14M
DBAY_MODPRES#
23 VSS_2 POWER PLANES GPIOF[0]/IRMODE/IRRX3A 118 T74 PAD

1
36 VSS_3 GPIOF[1]/IRRX2 117 USB_BACK_EN# 33
51 VSS_4 (21) GPIOF[2]/IRTX2 116 USB_SIDE_EN# 33
72 115 R270
+3.3V_ALW VSS_5 GPIOF[3]/IRMODE/IRRX3B IRMODE 38
87 *10_NC
L19 BLM18PG181SN1 VSS_6 CT_1212: Added HDDC_EN#
96 SIO 24 DOCKED 37,39

2
VDDA VSS_7 GPIOH[0] and MODC_EN# to ECE5018
1 2 121 VSS_8 GPIOH[1] 25 T36 PAD GPIOH2 & 3.
128 VSS_9 RESET SYSOPT1/GPIOH[2] 106 HDDC_EN#
HDDC_EN# 21

1
+3.3V_ALW 34 107 MODC_EN#
VCC1_0 (4) SYSOPT0/GPIOH[3] MODC_EN# 21
2

57 C389
C120 C110 C122 C118 C431 VCC1_1 CLK_SIO_14M *4.7P_50V_NC
85 64 CLK_SIO_14M 17

2
4.7U_10V_0805 4.7U_10V_0805 0.1U_10V 0.1U_10V 0.1U_10V VCC1_2 14 MHz_IN
108
1

VCC1_3
119 VCC1_4
120
MISCELLANEOUS
VDD18
86 CAP_LDO (4) TEST_PIN 35 T29 PAD
124 VDDA18PLL PWRGD 7
RUNPWROK 27,40,45
2

C419 C434 C128 C420 ECE5018


4.7U_6.3V 0.1U_10V 4.7U_6.3V 4.7U_6.3V
1

1
1

A A
C119 C392 C390 C432 C433
0.1U_10V 0.1U_10V 0.1U_10V 0.1U_10V 0.1U_10V
2

QUANTA
Place these caps near ECE5018.
Title
COMPUTER
Ultra I/O Controller EEC5018

Size Document Number Rev


DM5 1A

Date: 星期二, 十二月 27, 2005 Sheet 28 of 59


5 4 3 2 1
1 2 3 4 5 6 7 8

+3.3V_SUS
JCOM1
SERIAL PORT
5
RI0 L1 1 2 BLM11A121S 9

1
C181 DTR0 L2 1 2 BLM11A121S 4
A A
.1U_10V CTS0 L3 1 2 BLM11A121S 8
TXD0# L4 1 2 BLM11A121S 3

2
RTS0 L5 1 2 BLM11A121S 7
RXD0# L6 1 2 BLM11A121S 2
C182 .1U_50V U10 DSR0 L7 1 2 BLM11A121S 6
1 2 28 26 DCD0 L8 1 2 BLM11A121S 1
C1+ VCC DS0019-D2
24 C183 .47U_0805 <VENDOR>
C195 .47U_0805 C1-
V+ 27 1 2

1
1 2 1 C13 C12 C11 C10 C9 C8 C7 C6
C2+ C190 .47U_0805
2 3 1 2 270P 270P 270P 270P 270P 270P 270P 270P

2
C2- V-
14 9 TXD0#
28 TXD0 T1IN T1OUT
13 10 RTS0
28 RTS0# T2IN T2OUT
12 11 DTR0
28 DTR0# T3IN T3OUT

DCD0 R2OUTB 20 Place them close to serial port


4 R1IN R1OUT 19 DCD0# 28
RI0 5 18
R2IN R2OUT RI0# 28
RXD0# 6 17
R3IN R3OUT RXD0 28
CTS0 7 16
R4IN R4OUT CTS0# 28
DSR0 8 15
R5IN R5OUT DSR0# 28

40,43,44,46,47 RUN_ON 22 FORCEOFF INVILID 21 PAD


+3.3V_SUS T1
23 FORCEON GND 25

MAX3243CPWR

B B

If MAX3243 pin 22 tied to RUN_ON,then it can not support Ring Out

C C

D D

QUANTA
Title
COMPUTER
SERIAL PORT & USB

Size Document Number R ev


DM5 1A

Date: 星期二, 十二月 27, 2005 Sheet 29 of 59


1 2 3 4 5 6 7 8
A B C D E

4 8Mbit (1M Byte), SPI 4

+3.3V_SUS

1
R199 R53
10K 10K

2
U16
SPI_CS# 1 8
12,27 SPI_CS# CE# VDD
27 EC_FLASH_SPI_CLK 6 SCK

1
5 C352
27 EC_FLASH_SPI_DO SI
1 2 2 7 0.1U_10V
27 EC_FLASH_SPI_DIN SO HOLD#
R198 47

2
3 WP# VSS 4

SST25LF080A

3 3

2 2

1 1

QUANTA
Title
COMPUTER
FLASH

Size Document Number R ev


DM5 1A

Date: 星期二, 十二月 27, 2005 Sheet 30 of 59


A B C D E
1 2 3 4 5 6 7 8

A Touch Pad +5V_RUN A

1
3
RP9

4P2R-S-4.7K

2
4
JP1
L18 BLM11A601S 1
TP_CLK 1
27 CLK_TP_SIO 1 2 2 2
1 2 TP_DATA 3
27 DAT_TP_SIO 3
L20 BLM11A601S 4 4
5 5
+5V_RUN TPVCC 6 6
1

C569 C570 R81


10P 10P 1 2 TPVCC

1
2

C571 C572 0_0805 Molex-52808-0629-6P


10P 10P

1
C132 C127
.047U
.1U_10V

2
B B

+3.3V_RUN

Bluetooth
1

R400
0_0805
2

J11
1 GND Activity LED 2 BT_ACTIVE 23,33
3 3.3V(Logic) COEX2 4 COEX2_WLAN_ACTIVE 23
13 BT_RADIO_DIS# 5 Radio Enable/Disable# COEX1 6 COEX1_BT_ACTIVE 23
PAD T97 7 RSVD USB- 8 ECE_USBP2- 28
28 ECE_USBP2+ 9 USB+ GND 10
C C
1

1
C526 C545 BM10B-SRSS-10P-R
R408 C539
.1U_10V *100P_50V_NC 10K 33P_50V
2

2
1

BT Module Pinout
GND GND
1 1
USBP+ 1 USBP+
2 2
USBP- 2 USBP-
3
3 R SVD 3 RSVD
4 GND
4 COEX1_BT_ACTIVE 4 COEX1_BT_ACTIVE 11
5 GND
5 5 BT_RADIO_DIS# 12
BT_RADIO_DIS# 6
6 6 COEX2_WLAN_ACTIVE
COEX2_WLAN_ACTIVE 7
7 7 +3.3V
8
+3.3V 8
8 BT_ACTIVE
9
BT_ACTIVE 9
9 GND
10
GND 10
10

D D

QUANTA
Title
COMPUTER
TOUCH PAD & BULE TOOTH

Size Document Number R ev


DM5 3A

Date: 星期二, 十二月 27, 2005 Sheet 31 of 59


1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

+3.3V_RUN

2
R43
10K

1
FAN1_TACH 27

2
A A

R45
0

1
J4
FAN1_VOUT
FAN1_VOUT_FB 1
2 FAN1

3
3

1
C77
22U MOLEX-53398-0390
D5

2
*CHN202UPT_NC

2
H_THERMDA & H_THERMDC routing
ATF_INT# 27
together. Trace width/Spacing = 10/10 mil

Put 2200P close to Guardian. U15


3 H_THERMDA
1

C300 27 DAT_SMB DAT_SMB 7


2200P CLK_SMB SMDATA
27 CLK_SMB 8 SMBCLK ATF_INT# 17
B B
2

3 H_THERMDC +3.3V_SUS 1 2 LDO_SHDN# 23


R38 7.5K/F LDO_SHDN#_ADDR
THERMDA 35
THERMDC DP2 VCP1
34 DN2 VCP1 3 PAD T58
R231 49.9/F 40 VCP2 PAD T2
+3VSUS_THRM VCP2
+3.3V_SUS 1 2 12 +3VSUS
13,40 SUSPWROK 1 2 21 VSUS_PWRGD
1

C333 +RTC_CELL R41 1K


.1U_10V 18
R211 1K +RTC_PWR3V
31 2.5V_RUN_PWRGD 40
2

ICH_PWRGD# 1 LDO_POK
40 ICH_PWRGD# 2 13 +3V_PWROK#
1

+3.3V_SUS C331 REM_DIO DE1_N & _P routing together.


.1U_10V 38 Trace width/Spacing = 10/10 mil
27,33 POWER_SW# POWER_SW#
Put 2200P close to Guardian. Place under CPU
2

THERMTRIP1# 14 36 REM_DIODE1_N
THERMTRIP1# DN1 REM_DIODE1_P
DP1 37
1

1
THERMTRIP2# 15 THERMTRIP2#
1

1
R169 R210 8.2K C291 C290 2 Q10
C288 147K/F 1 2 THERM_VGA# 16 2200P *2200P_NC MMST3904-7-F
.1U_10V THERMTRIP3# +3.3V_ALW +RTC_CELL
2

3
30
2

THERMTRIP_SIO
39 VSET ACAV_CLR 4 ACAV_IN 27,41,42

2
R176 1K Put 2200P close to Diode
1

1 2 29 R175 R39
R173 HW_LOCK# *10K_NC
9 VSS
1

41.2K/F C292 22 10K


2200P SYS_SHDN#

1
1
2

DP3 LDO_SET THERMTRIP_SIO 28


C
2 DN3 LDO_SET 24 C

THERM_STP# 46
6 FAN_OUT LDO_OUT 25
Put 2200P close to Guardian. 27 +2.5V_RUN
LDO_OUT
33 FAN_DAC
REM_DIODE3_N
T57 PAD 20mils R179 0_0805
1

C393 C309 26 LDO_IN_EMC4000 1 2 +3.3V_RUN


Q31 *2200P_NC 2200P LDO_IN
2 10 GPIO1 LDO_IN 28

1
MMST3904-7-F 11 C299 C302 R182 0_0805
2

GPIO2

1
19 *.1U_10V_NC 1U_10V C287 1 2
3

Place near the bottom SODIMM REM_DIODE3_P GPIO3 C315 +2.5V_RUN


20

2
GPIO4 *.1U_10V_NC 10U_10V_0805
Notes: 32 5

2
GPIO5 VDD_5V
Put 2200P close to Diode

2
Vset=(Tp-75)/21 REM_DIODE3_N & _P routing together. FAN1_VOUT 41 THERMAL PAD R442
Where Tp=75 to Trace width/Spacing = 10/10 mil 40mils
40mils +5V_RUN *31.5K_NC
106 degree C
1

1
+3.3V_SUS EMC4000_QFN40~D C317 C318

1
Set trip point=85 degree c .1U_10V
10U_10V_0805 LDO_SET
2

2
Vset = (85-75)/16= 0.625 V
1

Guardian temp-tolerance= +/-3 degree C R229 +3.3V_SUS

2
8.2K
R34
1
2

THERMTRIP1# R228 1K
+1.05V_VCCP 8.2K

1
Q26
3

D R242 2.2K D
2
1

1 2 2 C332 THERMTRIP2#
.1U_10V +1.05V_VCCP
MMST3904-7-F Q25
QUANTA
1

R241 2.2K
1

1 2 2 C341
3 H_THERMTRIP#
.1u Cap needs to be placed MMST3904-7-F
.1U_10V
COMPUTER
1

near Guardian IC. Title


FAN & THERMAL
6 THERMTRIP_MCH#
Size Document Number R ev
DM5 1A

Date: 星期二, 十二月 27, 2005 Sheet 32 of 59


1 2 3 4 5 6 7 8
A B C D E

LID SWITCH +3.3V_ALW BATTERY 1,2 LED


+3.3V_ALW +3.3V_ALW

1
R305

1
100K
Q4 Q5
R444 10 SW1 DTA114YUA DTA114YUA

2
47K 47K
4 27 LID_CL_SIO# 1 2 1 4
2 27 BAT1_LED# 2 27 BAT2_LED# 2

1
C417 10K 10K
.047U 3
4

3
SPPB53V
BAT1_LED BAT2_LED

+3.3V_RUN
HDD LED
1

Q3

47K
2
11 SATA_ACT#
10K MB TO I/O-BOARD CONN
DTA114YUA
3

HDD_LED J5
HDD_LED 39
50 50 49 49 +5V_SUS
48 48 47 47
46 45 C14
46 45
44 44 43 43 .1U
WPAN_RADIO_ON_T +3.3V_LAN
3
WIRELESS/BLUETOOTH LED 42
40
42 41 41
39 3
40 39
38 38 37 37
3

BREATH_PWRLED 34 33 HDD_LED
Q15 34 33 BAT1_LED
28 USB_SIDE_EN# 32 32 31 31
BT_ACTIVE 2 30 29 BAT2_LED
23,31 BT_ACTIVE 28 USB_BACK_EN# 30 29
DTC144EUA 28 27
36,39 DOCK_LOM_ACTLED_YEL# 28 27
36,39 DOCK_LOM_SPD100LED_ORG# 26 26 25 25 USBP4- 12
36,39 DOCK_LOM_SPD10LED_GRN# 24 23
1

24 23 USBP4+ 12
12 USB_OC3_4# 22 22 21 21
20 20 19 19 USBP3+ 12
12 USB_OC5_6# 18 18 17 17 USBP3- 12
14 14 13 13
12 12 11 11
+3.3V_SUS TXOP_A
BREATH LED 37 TXOP_A
TXON_A
10
8
10 9 9
7
USBP5+ 12
37 TXON_A 8 7 USBP5- 12
6 6 5 5
RXIP_A 4 3
37 RXIP_A 4 3 USBP6+ 12
RXIN_A 2 1
37 RXIN_A 2 1 USBP6- 12
5

U3

2 4 BREATH_PWRLED Foxconn-QT8B0501-1111
27 BREATH_LED

7SH04
3

2 CAP, SCRL, NUM LEDS 2

+3.3V_RUN
WIRELESS LED
1

+3.3V_RUN +3.3V_RUN +3.3V_RUN

47K
1

1
Q16 Q45 Q46 Q47
2 DDTA114YUA-7-F
23 LED_WLAN_OUT
10K 47K 47K 47K

27 CAP_LED# 2 27 SCRL_LED# 2 27 NUM_LED# 2


10K 10K 10K
3

LED_WLAN_OUT#_R
DDTA114YUA-7-F DDTA114YUA-7-F DDTA114YUA-7-F
3

3
DASH BOARD CONN J1
+3.3V_RUN 1 DASH_CAP_LED DASH_SCRL_LED
DASH_CAP_LED 2 DASH_NUM_LED
POWER_SW# 3
27,32 POWER_SW# 4
DASH_NUM_LED
5
DASH_SCRL_LED 6
7
WPAN_RADIO_ON_T 8
9
LED_WLAN_OUT#_R 10
11
1 +5V_RUN 1
12
13
14
15
16
QUANTA
17
35
35
INT_MIC+
INT_MIC-
18
19 Title
COMPUTER
20 SWITCH & LED
2-1612037-0-20P-AMP
Size Document Number R ev
DM5 1A

Date: 星期二, 十二月 27, 2005 Sheet 33 of 59


A B C D E
1 2 3 4 5 6 7 8

+5V_SUS L56 +5V_RUN


+3.3V_RUN +VDDA
+VDDA U29 +VDDA=4.75V *BLM11A601S_NC
W=30 mil W=20 mil 1 Vin Vout 5 1 2

1
2 GND
C534 C527 C544 C519 C516 C524

1
C554 C553 C552 C546 C547 0.1U_16V 0.047U_25V 1U_10V 3 4 TPS793475_BYPASS 0.1U_16V 2.2U_10V 0.047U_25V

2
10U_10V_0805 0.1U_10V 0.1U_10V EN BYP
1U_10V 10U_10V_0805 TPS793475

1
C523
28 AUDIO_AVDD_ON
From EC 0.1U_16V

2
A A

26
6
U30 +3.3V_RUN

DVDD

AVDD2
+VDDA
R425
1 9 SENSE_A 1 2
NC1 SENSE_A

2
GPIO0 21 R409 1 2 *0_NC HP_NB_SENSE HP_NB_SENSE 28,35
ICH_AZ_CODEC_SDOUT 2 22 SPDIF_SHDN 5.1K/F R440
11 ICH_AZ_CODEC_SDOUT SDATA_OUT GPIO1 SPDIF_SHDN 28

1
30 DOCK_HP_MUTE#
GPIO2 DOCK_HP_MUTE# 28
ICH_AZ_CODEC_BITCLK 3 31 EAPD R433 R434 Close to Pin9 100K
11 ICH_AZ_CODEC_BITCLK BIT_CLK SPDIF_IN
32 SPDIF 39.2K/F 20K/F
SPDIF 39

1
S DIN SPDIF_OUT
11 ICH_AZ_CODEC_SDIN0 2 1 5 SDATA_IN
R430 33 To SPDIF circuit & DOCK DOCK_HP_MUTE#

3 2

3 2
ICH_AZ_CODEC_SYNC 7
11 ICH_AZ_CODEC_SYNC SYNC
ICH_AZ_CODEC_RST# 8 19 VREFOUT 2 2
11 ICH_AZ_CODEC_RST# RESET# VREFOUT VREFOUT 35 28,35 HP_NB_SENSE MIC_SWITCH 35
Q43 2N7002W-7-F

1
2N7002W-7-F Q44 +VDDA
13 NB_MICIN_L C466
MIC_L NB_MICIN_L 35
Close to Pin18 0.1U_16V
C540 14 NB_MICIN_R 1 2
MIC_R NB_MICIN_R 35
1U_10V 2 1 AC97VREFI 18 VREFIN INT_MIC_IN
LINE_IN_L 15 INT_MIC_IN 35
2 1 C541 CAP2 20
CAP2

5
0.1U_10V 16 TIE INT_MIC_IN_L & R
LINE_IN_R R368 C476
1
2 1 C533 23 AUD_LINE_OUT_L TOGETHER for internal MIC 28 BEEP
4 BEEP1 2 1 1 2 PC_BEEP
1U_10V LINE_OUT_L
B
13 SPKR 2 B

2
Close to Pin20 10 24 AUD_LINE_OUT_R 10K .1U_10V
CD_L LINE_OUT_R R367

3
12 27 HP_OUT_L U25
CD_R HP_OUT_L HP_OUT_L 35 2.2K
74LVC1G86GW
25 28 HP_OUT_R (Would be changed to another component ,
HP_OUT_R 35

1
MONO_OUT HP_OUT_R SN74AHCT1G86DCKR is end of life )
11 NC2
PC_BEEP ANALOG CIRCUIT
To be used only ifdigital PCB BEEP is unavailable
DVSS2

AVSS1
AVSS2

ICH_AZ_CODEC_BITCLK
Speaker Trace Width
2

+5V_AMP_VCC
4

17
29

2
R431 STAC9200N
*47_NC C493 C489 U27 Should be Min. 20Mils JSPK1
47P_50V 47P_50V 6 18 INT_SPK_R1 1

1
PVDD1 ROUT+ INT_SPK_R2 1
15 14 2
2 1

C492 0.015U_16V PVDD2 ROUT- 2


16 VDD 3 3
AUD_LINE_OUT_L 1 2 4 INT_SPK_L1 4
C555 C490 0.015U_16V LIN- LOUT+ INT_SPK_L2 4
5 LIN- LOUT- 8
*22P_50V_NC AUD_LINE_OUT_R 1 2 R IN- 17
1

C479 0.015U_16V RIN- 53398-0490


SHUTDOWN 19
1 2 PC_BEEP 9 LIN+

C455

C456

C457

C458
C478 0.015U_16V 7 12
RIN+ NC
1 2

2
C471 0.47U_10V 10 1
ICH_AZ_CODEC_SDOUT PC_BEEP BYPASS BYPASS GND1
C
2 1 GND2 11 C

*100P_NC

*100P_NC

*100P_NC

*100P_NC
AUD_GAIN0 2 13

1
GAIN0 GND3
2

AUD_GAIN1 3 20
R432 GAIN1 GND4
*47_NC TPA6017A2/FAN7031/LM4874
2

C481 C483 +3.3V_RUN +3.3V_SUS


2 1

*47P_50V_NC *47P_50V_NC
1

+5V_AMP_VCC
2

C556 W=40 mil


*22P_50V_NC R382 R386 L53
1

+5V_AMP_VCC 1 2 +5V_SUS
100K *100K_NC
BLM21PG600SN1D W=40 mil
1

SPK_SHUTDOWN#

1
C474 C487 C484
3

3
10U_10V_0805 0.1U_10V 0.1U_10V C486
2 2 EAPD 1U_10V
28,35 NB_MUTE

2
1

1
Q38 Q48
1

R390 2N7002W-7-F *2N7002W-7-F_NC R441

*10K_NC *10K_NC
2

2
AUD_GAIN0 AUD_GAIN1 AV Rin
0 0 6dB 90K
D 0 1 10dB 70K R3851K R384 *1K_NC
D

1 0 15.6dB 45K 1 2 AUD_GAIN0 2 1


+5V_AMP_VCC AUD_GAIN1
1

R387 *1K_NC
2 2
R383 1K
1
QUANTA
1 1 21.6dB 25K
Title
COMPUTER
Azelia CODEC

Size Document Number R ev


DM5 1A

Date: 星期二, 十二月 27, 2005 Sheet 34 of 59


1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

CT_1226: Change C535 from


0402 to 0603. +3.3V_RUN

1
R362
A A
C535
100K
34 VREFOUT 1 2

2
1000P_NPO_0603

1
MIC_SWITCH 34
R349 R353
4.7K 4.7K
L51 CON3

2
R351 4.99/F C461 2.2U_10V BLM11A121S 1
1 2 1 2 1 2 MIC_IN_L1 2
34 NB_MICIN_L
1 2 1 2 1 2 MIC_IN_R1
6
3
STEREO MIC
34 NB_MICIN_R
L52
R359 4.99/F C468 2.2U_10V BLM11A121S
4
5
LINE IN

1
7
R350 R356 C460 C464 8
20K 20K 12
HEADPHONE
100P_50V 100P_50V 9
10
LINE OUT

2
11

SUYIN-RC142A-12G2

HP_NB_SENSE
HP_NB_SENSE 28,34
B B

R395
C501 1U_10V 1 2 +3.3V_RUN
1 2 U28 L54 BLM11A121S
34 HP_OUT_L
HP_SPK_L1 13 9 HP_SPK_L2 1 2 HP_SPK_L3 100K
INL OUTL

3
1 2 HP_SPK_R1 15 11 HP_SPK_R2
34 HP_OUT_R INR OUTR
4 1 2 HP_SPK_R3 2
NC1 NB_MUTE 28,34
C505 1U_10V 6 L55 BLM11A121S
HP_NB_SENSE NC2
14 8

1
SHDNR NC3 C502 C496 Q57
18 SHDNL NC4 12
1

C509 C500 C525 1U_10V 16 L57 100P_50V 2N7002W-7-F


NC5 BLM11A601S 100P_50V
1 2 1 C1P NC6 20
47P_50V 47P_50V 3 10 1 2 +3.3V_RUN
2

C1N SVDD
PVDD 19

1
5 PVSS PGND 2
7 17 C510
SVSS SGND
CT_1212: Added Q57 on NB_MUTE net to fix power-off AUDIO

2
MAX4411 1U_10V POP noise issue (Follow Brewster & Keylargo)
1

C520
2

1U_10V
Headphone Audio Amp.
+VDDA
C C

Note: Mic trcace


1

should be routed R419


1K
differentially.
R426
2

100K +VDDA +VDDA


C536 1 2 MIC_BIAS
1

2.2U_10V
1

2
2

R377 R420 +VDDA R436


33 INT_MIC+ 1 2 1K 100K
0

8
J9 C548 Only Single INT MIC
2

1
8

0.1U_10V R427 10K 3 MIC_LM+


2 INT_R_MIC+ 2 1 INT_MIC_C+ 1 2 INT_MIC_OP+ 5 MIC_BIAS 1

2
R428 10K 7 INT_MIC_IN_OP 2 1 2
INT_MIC_IN 34

1
1 INT_R_MIC- 2 1 INT_MIC_C- 1 2 INT_MIC_OP- 6 U31A R435 C557
U31B C551 BA10358F E2 100K

4
*MLX_53398-0271_NC C549 BA10358F E2 0.1U_10V 2.2U_10V
4

2
0.1U_10V

1
R376
1

33 INT_MIC- 1 2
0 R421
1K
1 2
Only Single INT. MIC
R429
100K
2

D D

Place close U43 related


1

C537
QUANTA
1

circuitry close to codec.


2.2U_10V R422
2

1K
Title
COMPUTER
2

AUDIO HEADPHONE CONN

Size Document Number R ev


DM5 1A

Date: 星期二, 十二月 27, 2005 Sheet 35 of 59


1 2 3 4 5 6 7 8
5 4 3 2 1

LAN-BCM4401KFB(10/100M) BCM4401--10/100

+3.3V_LAN
0.1U*12 pcs +1.8V_LAN +3.3V_LAN
Close to power pins CT_1207: Using R465 0 ohm to instead L39
+3.3V_LAN +1.8V_LAN
ferrite bead per ADC Comm team.
1

1
C53 C231 C225 C52 C28 C37 C36 C46 C204 C44 C35 C38 C54 C212 C27 C49
C34 C39
1

C568 .1U_10V .1U_10V .1U_10V .1U_10V .1U_10V .1U_10V .1U_10V .1U_10V .1U_10V .1U_10V .1U_10V .1U_10V .1U_10V .1U_10V .1U_10V .1U_10V 4.7U_10V_0805 R465 0_0603
2

2
D 1 2 D
4.7U_10V_0805
2

1
4.7U_10V_0805 C242 C244

114

115
125

106

112
.1U_10V .1U_10V

25
56

19
30
40
52

79
94

65

96
97

91
92

17
44

2
U13

7
VESD
VESD
VESD

VDDIO
VDDIO
VDDIO
VDDIO_PCI
VDDIO_PCI
VDDIO_PCI
VDDIO_PCI
VDDIO_PCI
VDDIO_PCI
VDDIO_PCI

XTAL_AVDD

REGULATOR_AVDD
REGULATOR_AVDD

REGULATOR_VOUT1
REGULATOR_VOUT2

VDDCORE
VDDCORE
VDDCORE
12,24 PCI_AD[0..31]
PCI_AD31 122 75 DOCK_LOM_SPD10LED_GRN#
PCI_AD31 LINK_LED10# DOCK_LOM_SPD10LED_GRN# 33,39
PCI_AD30 123 76 DOCK_LOM_SPD100LED_ORG#
PCI_AD30 LINK_LED100# DOCK_LOM_SPD100LED_ORG# 33,39
PCI_AD29 124 77 DOCK_LOM_ACTLED_YEL#
PCI_AD29 ACT_LED# DOCK_LOM_ACTLED_YEL# 33,39
PCI_AD28 126 78 CT_1207: Removed L31
PCI_AD27 PCI_AD28 COL_LED#
127 CT_1207: Change R149 from 1.15K to per ADC Comm team.
PCI_AD26 PCI_AD27
128 PCI_AD26 1.21K per ADC Comm team
PCI_AD25 1 +1.8V_LAN
+3.3V_LAN PCI_AD24 PCI_AD25
3 PCI_AD24 EPHY_BIAS_AVDD 69
PCI_AD23 6
PCI_AD22 PCI_AD23
8 PCI_AD22 EPHY_AVDD 57
PCI_AD21 9 L38
C243 PCI_AD20 PCI_AD21
10 PCI_AD20 EPHY_PLLVDD 64 1 2 +1.8V_LAN

1
1000P_50V PCI_AD19 11 BLM11A601S C219
PCI_AD18 PCI_AD19
14 PCI_AD18

1
PCI_AD17 15 C241 C240 .1U_10V

2
PCI_AD16 PCI_AD17
16 PCI_AD16 EPHY_VREF 71
PCI_AD15 33 72 R149 1.21K/F 1000P_NPO 2.2U_6.3V

2
PCI_AD14 PCI_AD15 EPHY_VDAC
34 PCI_AD14 EPHY_TESTMODE 88
PCI_AD13
C Place it close to pin65 PCI_AD12
36
37
PCI_AD13
62 C
PCI_AD12 EPHY_TDP TXOP 37
of the LOM controller PCI_AD11
PCI_AD10
38 PCI_AD11 EPHY_TDN 61 TXON 37
39 PCI_AD10 EPHY_RDP 59 RXIP 37
PCI_AD9 41 60
PCI_AD9 EPHY_RDN RXIN 37
ID Select : AD16 PCI_AD8 42 PCI_AD8

1
PCI_AD7 45 104
Interrupt Pin : PIRQB# PCI_AD6
PCI_AD5
48
49
PCI_AD7
PCI_AD6
PCI_AD5
BCM4401KQL NC
NC
NC
105
103
R143 R140 R147 R148

Request indicate : REQ3# PCI_AD4 50 108 49.9/F 49.9/F 49.9/F 49.9/F


PCI_AD3 PCI_AD4 NC
51 102
128P QFP

2
PCI_AD2 PCI_AD3 NC
Grant indicate : GNT3# 53 PCI_AD2 NC 109
+3.3V_LAN
PCI_AD1 54 110
PCI_AD1 NC

1
PCI_AD0 55 107 C234 C238
PCI_AD0 NC R19
PCI_C_BE3# 4 87 2 1 .1U_10V .1U_10V
12,24 PCI_C_BE3#

2
PCI_C_BE2# PCI_CBE_L3 GPIO2/VAUXAVAIL 1K
12,24 PCI_C_BE2# 18 PCI_CBE_L2 GPIO1 86
PCI_C_BE1# 32 85
12,24 PCI_C_BE1# PCI_CBE_L1 GPIO0
PCI_C_BE0# 43
12,24 PCI_C_BE0# PCI_CBE_L0 +3.3V_LAN
FRAME# 20 90
12,24 PCI_FRAME# PCI_FRAME_L BOOTROM_SCL
IR DY#
12,24 PCI_IRDY#
TRD Y#
21
23
PCI_IRDY_L BOOTROM_SDA 93
U5
12,24 PCI_TRDY# PCI_TRDY_L
DEVSEL# 26 98 SPROM_CS 1 8
12,24 PCI_DEVSEL# PCI_DEVSEL_L SPROM_CS CS VCC

1
STOP# 27 95 SPROM_CLK 2 7 C51
12,24 PCI_STOP# PCI_STOP_L SPROM_CLK SK NC
PERR# 28 101 SPROM_DOUT 3 6
12,24 PCI_PERR# PCI_PERR_L SPROM_DOUT DI ORG .1U_10V
SERR# 29 99 SPROM_DIN 4 5 Note: BCM4401 requires
12,24 PCI_SERR#

2
PAR PCI_SERR_L SPROM_DIN DO GND
12,24 PCI_PAR 31 PCI_PAR
12 PCI_PIRQB#
PIRQB# 116 R20 0 4*AT93C46 16-bit R/W data width
PCI_INT_L
EXT_POR_L 89 1 2 LOM_LOW_PWR# 28
PCIRST# 117
12,24 PCI_RST# PCI_RST_L
PCLK_LAN 118 83 Note: The BCM4401 has weak internal pulldown resistors on
B 17 CLK_PCI_LOM PCI_CLK JTAG_TDP B
PCI_GNT3# 119 80
12 PCI_GNT3# PCI_GNT_L JTAG_TCK the following signals:
PCI_REQ3# 121 82
12 PCI_REQ3# PCI_REQ_L JTAG_TDI
R130 PCI_PME# 113 73 SPROM_CS, SPROM_CLK, SPROM_DOUT, SPROM_DIN.
24,28 SYS_PME# PCI_PME_L JTAG_TRST_L
*33_NC PCI_AD16 R14
1 100 2 PIDSEL 5 81
PCI_IDSEL JTAG_TMS
13,24,27,28 CLKRUN# 1 2 22 PCI_CLKRUN_L

EPHY_BIAS_AVSS
1

R10 0 67 XTAL_IN

EPHY_PLLGND
C226

EPHY_AGND
*22P_NC Note: EXT_POR_L has a internl pull up.
XTAL_AVSS
66
2

XTAL_OUT
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
1

R18 BCM4401
12
46
111
100
84
2
24
74
13
47
120
35

68
70
58
63

800_0402
2

Y1
2 1
1

BCM4401 B0 has an errata on CLKRUN. BIOS needs to C45


C41
disable CLKRUN as this feature is not supported on the 27P 27P
2

4401-B0. 25MHz_FSX
+/-30PPM

A A

QUANTA
Title
COMPUTER
BCM4401 100/10 LAN

Size Document Number R ev


DM5 1A

Date: 星期二, Q二月 27, 2005 Sheet 36 of 59


5 4 3 2 1
A B C D E

+3.3V_LAN

C228 .1U

16
4 4
1 L33 2 TXOP_L 4 2 TXOP_A

VCC
36 TXOP 1Y 1A TXOP_A 33
3 DOCK_LOM_TRD0+
1B DOCK_LOM_TRD0+ 39
1 L32 2 TXON_L 7 5 TXON_A
36 TXON 2Y 2A TXON_A 33
6 DOCK_LOM_TRD0-
2B DOCK_LOM_TRD0- 39
1 L36 2 RXIP_L 9 11 RXIP_A
36 RXIP 3Y 3A RXIP_A 33
10 DOCK_LOM_TRD1+
3B DOCK_LOM_TRD1+ 39
1 12nH
L37 5%
2 RXIN_L 12 14 RXIN_A
36 RXIN 4Y 4A RXIN_A 33
13 DOCK_LOM_TRD1- CT_1207: Removed ESD1 & ESD2 & C573, C574 per ADC Comm team B. Boes.
4B DOCK_LOM_TRD1- 39
12nH 5%
8 GND A/B 1 DOCKED 28,39
5.6nH 5% 15
G
5.6nH 5% U12 R141 10K

PI3L110Q

3 3

10/100LAN_E-SWITCH

+3.3V_SRC
PQ6 +3.3V_LAN
FDC653N_NL
+3.3V_SRC 6 R17
5 4 1 2
+PWR_SRC 2
2 2
1 0_0603

1
PC15 PC16
4.7U .1U_10V
3
1

2
PR134 PR15
100K 100K
2

2
3

2
PR135
PQ8 470K
1
3

2N7002W-7-F
2 PR14
27,46 AUX_EN
2

PQ7 200K
2N7002W-7-F
1

1 1

LAN POWER QUANTA


Title
COMPUTER
LAN SWITCH/LAN POWER

Size Document Number R ev


CustomDM5 1A

Date: 星期二, 十二月 27, 2005 Sheet 37 of 59


A B C D E
1 2 3 4 5 6 7 8

A A

+3.3V_RUN

Note : Total require 1/4W, ~3.6 ohm

1
B C135 C137 B
*.1U_10V_NC

1
4.7U_10V_0805

2
R83
47_0805

Total require 1/8W U23 TFDU6102F

2
1 IREDA
2 IREDC
IRTX 3
28 IRTX TXD
IRRX 4
28 IRRX RXD
IRMODE 5
28 IRMODE SD/MODE
FIR _VCC 6 VCC
7 MODE

1
8 GND

1
R80 C121 C129 R79 NC
10K 10K
4.7U_10V_0805 .1U_10V 9

2
2

2
IR Detector

C C

D D

QUANTA
Title
COMPUTER
FIR

Size Document Number R ev


DM5 1A

Date: 星期二, 十二月 27, 2005 Sheet 38 of 59


1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

J6B
DOCK_PWR_SRC +DC_IN

J6A
VGA DOCK_DET# S137 S137 S205 S205 DOCK_DET#
6,20 VGA_GRN S138 S138 S206 S206 DOCK_DAT_DDC2 20
P1 V1+ V5+ P5 S139 S139 S207 S207 DOCK_CLK_DDC2 20
P2 V2+ V6+ P6 6,20 VGA_BLU S140 S140 S208 S208
P3 V3+ V7+ P7 S141 S141 S209 S209 HSYNC 20
P4 V4+ V8+ P8 28 D_LAD1 S142
S143
S142 S210 S210
S211
VSYNC 20 VGA
S1 S1 S69 S69 VGA LPC 28
28
D_LAD2
D_LAD3 S144
S143
S144
S211
S212 S212 D_CLKRUN# 28
S2 S2 S70 S70 VGA_RED 6,20 S145 S145 S213 S213 D_LAD0 28
S3 S71 S146 S214
A
DVI 18
18
DVI_CLK-
DVI_CLK+ S4
S3
S4
S71
S72 S72 S147
S146
S147
S214
S215 S215
DOCK_SIO_ALERT# 28
LPC A
S5 S5 S73 S73 D_SERIRQ 28 S148 S148 S216 S216
S6 S6 S74 S74 S149 S149 S217 S217
+3.3V_RUN +3.3V_RUN DVI_T- S7 S75 S150 S218
DVI_T+ S8
S7
S8
S75
S76 S76 LPC +DC_IN
S151
S150
S151
S218
S9 S9 S77 S77 D_DLDRQ1# 28 S152 S152 S220 S220
1

S10 S10 S78 S78 D_LFRAME# 28 S153 S153


R118 R120 DVI_T+ S11 S79 S154 S222
10K 22K DVI_T- S11 S79 S154 S222
S12 S12 S80 S80 S155 S155 S223 S223
S13 S13 S81 S81 DVI_SCLK 18 S156 S156 S224 S224
S82 DVI_SDAT 18 S157 S225
2

S82 S157 S225

2
S15 S83 C196 C20 S158 S226
48 DOCK_PSID S15 S83 DVI_DETECT 18 S158 S226
DVI_T+ DVI_T- S84 .1U_50V 1nF S159 S227
S84 S159 S227
S17 S85 S160 S228

1
S17 S85 S160 S228
1

DVI_T+ S18 S86 S161 S229


R119
22K
R121
10K
DVI_T- S19
S18
S19
S86
S87 S87 DVI S162
S161
S162
S229
S230 S230
S20 S20 S88 S88 S163 S163 S231 S231
S21 S21 S89 S89 S164 S164 S232 S232
S22 S90 S165 S233
2

18 DVI_TX2+ S22 S90 S165 S233


18 DVI_TX2- S23 S23 S91 S91 S166 S166 S234 S234
S24 S24 S92 S92 S167 S167 S235 S235
S25 S25 S93 S93 S168 S168 S236 S236
18 DVI_TX1+ S26 S26 S94 S94 S169 S169 S237 S237
S27 S95 S170 S238
18 DVI_TX1-
S28
S27 S95
S96 S-VIDEO S171
S170 S238
S239
S29
S28
S29
S96
S97 S97 6,20 TV_C S172
S171
S172
S239
S240 S240 S-VIDEO
18 DVI_TX0+ S30 S30 S98 S98 S173 S173 S241 S241 TV_CVBS 6,20
18 DVI_TX0- S31 S31 S99 S99 S174 S174 S242 S242
S32 S100 S175 S243
S33
S32
S33
S100
S101 S101 SPDIF 34 SPDIF
S176
S175
S176
S243
S244 S244
TV_Y 6,20
B S34 S34 S102 S102 33,36 DOCK_LOM_SPD10LED_GRN# S177 S177 S245 S245 B
CLK_PCI_DOCK S35 S103 S178 S246
17 CLK_PCI_DOCK
S36
S35
S36
S103
S104 S104 USB 33,36 DOCK_LOM_SPD100LED_ORG#
DOCK_OWNS_PCI
S179
S178
S179
S246
S247 S247
DOCK_LOM_ACTLED_YEL# 33,36
S37 S37 S105 S105 USBP7- 12 S180 S180 S248 S248 HDD_LED 33
S38 S38 S106 S106 USBP7+ 12 S181 S181
S39 S107 S182 S250
SMBUS 27 DOCK_SMB_CLK
27 DOCK_SMB_DAT S40
S39
S40
S107
S108 S108 DOCK_SMB_INT# 27 S183
S182
S183
S250

27 CLK_DOCK S41 S41 S109 S109 CLK_KBD 27 S184 S184 S252 S252
27 DAT_DOCK S42 S42 S110 S110 DAT_KBD 27 S185 S185 S253 S253
S43 S43 S111 S111 S186 S186 S254 S254
S112 C29 .01U S187 S255
S45 S45
S112
S113 S113 SMBUS C30
1 2
.01U
S188
S187
S188
S255
S256 S256
S114 S114 S189 S189 S257 S257
CLK_PCI_DOCK S47 S115 1 2 S190 S258
S47 S115 S190 S258
S48 S48 S116 S116 S259 S259
S49 S117 +3.3V_LAN
S49 S117
1

S50 S118 +3.3V_LAN S193


R117 S50 S118 C31 .1U_50V 37 DOCK_LOM_TRD1- S193
S51 S51 S119 S119 37 DOCK_LOM_TRD1+ S194 S194
*22_NC S52 S120 2 1 S195
S52 S120 37 DOCK_LOM_TRD0- S195
S53 S53 S121 S121 37 DOCK_LOM_TRD0+ S196 S196
S54 S122 2 1
1 2

S54 S122
S55
C197
*18P_NC
S55 C32 .1U_50V LAN
S125 S125
S126
2

S126 R11
S127 S127 Refer to LAYOUT NOTE1.
AC-Terminator S128 S128
R12
1 2
M204
26 DOCK_TIP M204
1 2 100/F
C C
100/F AMP-1473681-280P
SMBUS ADDRESS : Refer to LAYOUT NOTE1. MODEM
LAYOUT NOTES1:
M136 +3.3V_ALW
DOCK/APR Microprocessor -- 74H M136 DOCK_RING 26 Terminators should be as close as +5V_ALW
DOCK USB/IDE Interface(FX2) -- 72H possible to dock connector pins.
AMP-1473681-280P
MODEM

1
Keep traces as short as possible. R113
DOCK SMbus Battery 16h Charger 12h IDE I/F 70h D-BAY

1
72h SIO 48h R1 100K

3 2
Q7 100K
DOCKED 28,37
FDS6679 DOCK_PWR_SRC

2
8 DOCK_PWR_SRC C24 C25 DOCK_DET# 2 Q14
1 7 1 2 1 2 DTC144EUA
+PWR_SRC
2 6
3 5 .1U_50V 1nF

1
1
1

C218 R133
.47U_0805 100K
4
2

C205 +3.3V_SUS R13 100K


2

1 2 Docking Detect Circuit


1 2
Place it close
0.1U_10V
to Docking CONN
5

U11
3

D DOCKED 2 D
4 2
28 DOCK_PWR_EN 1
2

Q6
QUANTA
1

7SH08 R123 2N7002W-7-F


100K
R122
1
*0_NC
2 COMPUTER
1

Title
Docking Station Conn.
DOCKING POWER SWITCH
Size Document Number R ev
DM5 1A

Date: 星期二, 十二月 27, 2005 Sheet 39 of 59


1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

+3.3V_RUN +3.3V_SUS +3.3V_SUS


UMA Power Up Block Diagram
1 5V_3V_1.8V_RUN_PWRGD
RUN POWER OPTIONS:

1
1
R269 Q54 R267 R269, R275, R276 = 10K ohm
10K 2 *3906_NC 100K
OPTION 1 Population: C387, C395, C396, Q29, Q32, Q33, R267, R296, R294.
2

2
Depopulation: Q54, Q55, Q56, R460, R461, R462.
3

3
R460 Q30
2 1 2 MMST3904
*4.7K_NC

3
Q29 R269, R275 = 200K ohm, R276 = 100K ohm.

1
A A
2 MMST3904
Population: Q54, Q55, Q56, R460, R461, R462.
OPTION 2
1

Depopulation: C387, C395, C396, Q29, Q32, Q33, R267, R296, R294.
1

C387
0.1U_10V
2

U20D
13,45 IMVP_PWRGD 12
11 ICH_PW RGD
ICH_PWRGD 6,13
+5V_RUN +5V_SUS +5V_SUS 5V_3V_1.8V_RUN_PWRGD 13
27 RESET_OUT#
74AHC08 +3.3V_SUS
1

R275
1

1
Q55 R296
10K 2 *3906_NC 100K R230
100K
2

2
3

R461 Q35

2
2 1 2 MMST3904 ICH_PWRGD#
ICH_PWRGD# 32
*4.7K_NC
3

Q33
1

3
2 MMST3904
ICH_PW RGD 2 Q24
1

2N7002W-7-F
1

C395

1
B 0.1U_10V B
2

+1.8V_RUN +1.8V_SUS +1.8V_SUS


5V_3V_1.8V_RUN_PWRGD
1

R276
1

Q56 R294
10K 2 *3906_NC 100K +3.3V_RUN +3.3V_SUS
2

C426 0.1U_10V +3.3V_SUS


3

R462 Q34 1 1 2
2 1 2 MMST3904 Keep Away from high
*4.7K_NC R320
speed buses
3

Q32 20K +3.3V_SUS


1

5
2 MMST3904 U21A U21B
C403 0.1U_10V
2
1

5V_3V_1.8V_RUN_PWRGD 1 6 3 4 1 2
1

C396
0.1U_10V
2

14
1

7WZ14 7WZ14 U20A


C429 1
3
2

.01U 2
19,27,29,43,44,46,47 RUN_ON
74AHC08
C C
U20B
4
6 RUNPWROK 27,28,45
5

74AHC08
+3.3V_SUS

C388 +3.3V_SUS
1 2

0.1U_10V
U20C
5

R331 U19A U19B 9


27,46,47 SUS_ON
32 2.5V_RUN_PWRGD 1 2 8 SUSPWROK 13,32
43 SUSPWROK_1P8V 1 6 3 4 10
0
R324 74AHC08
44 1.5V_RUN_PWRGD 1 2
1

C386 7WZ14 7WZ14


0
R330 0.1U_10V
2

44,45 1.05V_RUN_PWRGD 1 2
R268
0 1 2

*0_NC

D D

QUANTA
Title
COMPUTER
SYSTEM RESET/POWER GOOD

Size Document Number R ev


DM5 1A

Date: 星期二, 十二月 27, 2005 Sheet 40 of 59


1 2 3 4 5 6 7 8
1 2 3 4 5

Id=13A, Rdson=9mOhm@Vgs=10V

+SDC_IN 8
7 1
6 2 +PWR_SRC
5 3
PR76
A A
10K_0402 PQ20
FDS6679

4
PC59
.1U_50V_0603

2
PR73
10K_0402 PC61

3
2200P_50V_0402

1
3
PQ28
PQ26 2N7002W-7-F PR70
2N7002W-7-F 2 100K_0402
27,32,42 ACAV_IN 2
Id=7A, Rdson=23mOhm@Vgs=10V
PD4
PQ17A PQ17B UBM32PT

1
FDS4935 FDS4935 2 1

1
7 1 CHG_SBAT 3 5
+VCHGR
8 6
FDS4935
PQ18A

4
22,48 +SBATT 7 1 +PWR_SRC
PR61 8
CHG_SBAT_N Id=7A, Rdson=23mOhm@Vgs=10V
PR62 100K_0402

2
3

10K_0402 2
PQ21 2 1
B 2N7002W-7-F .1U_50V_0603 3 SBAT_G B
2 PC49
28 CHG_SBATT
1
CHG_SBATT_N
PR64
PD16 470K_0402
1

PR67 CH715FPT
*100K_0402_NC
1

CHG_PBATT_N

28 CHG_PBATT 2
2N7002W-7-F 2 1PC65
.1U_50V_0603
PQ27
48 +PBATT
3

PR79 CHG_PBAT_N PR77 PQ23 SI9435BDY


*100K_0402_NC PR78 100K_0402
4

4
10K_0402 8
1 7 PD5
5 3 3 5 2 6 UBM32PT
+VCHGR CHG_PBAT PBATT_1
6 2 2 6 3 5 2 1
7 1 1 7
8 8

4
5 3
PQ24 PQ25 6
SI4835BDY SI4835BDY PR81 PQ18B
PR87 PR82 47K_0402 FDS4935

4
C C
470K_0402 470K_0402 PR80 2
10K_0402
+PBATT 3 PBAT_G

3
PR85 47K_0402 8
3 PU3A PD15 PR65
+ CH715FPT 470K_0402
1 2
2
+SBATT - LM393
PR88 PQ29
4

147K/F_0402 2N7002W-7-F

1
PR83
+PBATT 470K_0402
2

PR84 100K_0402
2

PC157 PR176
+3.3V_ALW
*.1U_50V_0603_NC 41.2K/F_0402 PC67
1

.1U_50V_0603
1

PR89
8

10K/F_0402 2
5 PU3B
+3.3V_ALW +
7 3
6
- LM393 1
3

D PR86 100K_0402 D
4
5

PU12 PR178 PD7


2 33K/F_0402 CH715FPT
28 SBAT_LOW

28,48 SBAT_PRES# 1
4 2
+3.3V_ALW QUANTA
7SH32
PQ46 COMPUTER
1

2N7002W-7-F Title
BATTERY SELECTOR

Size Document Number R ev


DM5 1A

Date: 星期二, 十二月 27, 2005 Sheet 41 of 59


1 2 3 4 5
1 2 3 4 5

+SDC_IN
PR56 0.01_3720
A A
+DC_IN_SS 1 2

1P

2P
1
PC39
10U_25V_1206

2
+DC_IN
PR55
0_0402
2

1
PR54

8731_CSSN
8731_CSSP
*0_0402_NC
8731_LDO
1

2
PJP9 +SDC_IN
PD6 POWER_JP
1 CH501H 8731_VIN 1 2 +5V_ALW

1
PC62

1
PR60 PR68 2.2_0603

28

27
1
8731_LDO 365K/F_0402 1U_25V_0805 1 2 8731_A04

2
PC51 PC53 PC47 PC46

GND

CSSP

CSSN

8731_BST
2

PR58 49.9KF_0402 22 PD24


DCIN

2200P_50V_0402

.1U_50V_0603

10U_25V_1206

10U_25V_1206
2 1

2
1

5
6
7
8

5
6
7
8
PC63 1U_10V_0603 1SS355
B 2 1 8731_ACIN 2 25 2 1 PQ16 B

1
ACIN BST

1
PR71 PC60 4 SI4800BDY 4

1
10K/F_0402 PC41 .01U_25V_0402 PR66 .1U_50V_0603 PQ19

1
3.3nF_50V_0402
21 8731_LDO 33/F_0603
2

LDO

2
13 PC54 *SI4800BDY_NC PR221
27,32,41 ACAV_IN

1
2
3

1
2
3
ACOK +VCHGR

PC184
26 8731_VCC 1 2 1K_0603

2
VCC
1

+5V_ALW 11

1
VDD 8731_DHI 1U_10V_0603
24

2
PR69 DHI PL6 PR57 0.01_3720
2 1
16.2K/F_0402 .1U_50V_0603 23 8731_LX2 2 PR72 1 8731_LX 2 1CHG_CS1 2
LX

1
PC55 MAX8731 1_0603 8.2uH_SIQ1250-8R2PF_5.5A/27mohm
2

5
6
7
8
27,48 PBAT_SMBCLK 2 PR163 1 8731_SCL 10 20 8731_DLO 12.2*12.2*5

1P

2P
0_04022 PR167 18731_SDA 9 SCL DLO PR74
27,48 PBAT_SMBDAT 0_0402 SDA *2.7_1210_NC
DC-8255M012 Jason_1205:Add PD24
14 BATSEL PGND 19 4

1
PC66 PC52 PC57 and PR221 follow M07

2
8731_IINP 8 18 PQ22 10U_25V_1206
IINP CSIP A10
12H
Adress :

.1U_50V_0603

10U_25V_1206
SI4810BDY PC64

1
2
3

2
17 *0.01U_0805_NC
CSIN
3

8731_CCV 6 15
PQ45 CCV FBSA
28,48 AC_OFF 2
*2N7002W-7-F_NC 16
FBSB
2

8731_CCI 5 8731_CSIP
1

PR59 CCI
PAD 33
PC181

4.7K_0402 32 8731_CSIN
PAD
1

8731_CCS 4 31
CCS PAD
30
GND
DAC
1

8731_REF PAD
3 29
2

REF PAD
1

*.01U_50V_0603_NC

Jason_1205:Add PC184
1

PR63 PC50 PC42 PC43 PC44 1 2 +VCHGR


1 7

12

C
10K_0402 PU2 PR217 100_0402 follow M07 A10 C
1
.1U_10V_0402

.01U_25V_0402

.01U_25V_0402

.01U_25V_0402

PC58
2

PC40 PC45 220P_50V_0402


2

1U_10V_0603 .1U_10V_0402
2

Jason_1216: Change Jason_1205:Depop PC181


PR170 from 4.7M to 4.32M. 2 PR75 1 "SI4800BDY"---Id=6.5A,Rdson=23mOhm@Vgs=4.5V
PR170 follow M07 A10 0_0603 (P/N:BAM48000040) / (TTRANS MOS SI4800BDY-T1-E3(30V7A,SOIC)L-F);
28 ADAPT_TRIP_SEL
2 1
Jason_1216: Depop +3.3V_ALW
PR218 per M07 A10 4.32M/F_0402
8731AGND "SI4810BDY"---Id=7.5A,Rdson=16mOhm(25 ℃ ) ; Rdson=22mOhm(100 ℃ )
@Vgs=4.5V
8731_REF +5V_ALW Jason_1216: Reserve (P/N:BAM48100036) / (TRANS MOS SI4810BDY-T1-E3(30V,10A)L-F);
2

+5V_ALW PR224 1K pull down.


2

8731_IINP PR218 "AO4422L"---Id=11A,Rdson=19.6mOhm(25 ℃ ) ; Rdson=26.95mOhm(100 ℃ )


2

PC154 PR172 @Vgs=4.5V


1

PR171 *154K/F_0402_NC PC153 100K_0402 (P/N:BAM44220011) / (TRANS MOSFET AO4422L(30V,11A) SOIC8 L-F);
2

100P_50V_0402

301K/F_0402
1

PR164 .01U_25V_0402
2

0_0402 PR174 ADAPT_OC 28 +5V_ALW


1

100K_0402
+5V_ALW
1

Charge Voltage = 12.975


1

8731_A02 3 PU11A
PU10

8
PR165 +
1 8731_A03 2 PQ44 PR224 Charge Current = 4.4A
8731_CSSP 3 1 2 1 8731_A01 2 2N7002W-7-F *1K_0603_NC 5 PU11B Battery is 4cell & 6cell
RS+ OUT - LM393 +
D 7 D
1
2

1
*100P_50V_0402_NC

8731_CSSN 4 0_0402 6
4

RS-
1

PR169 - LM393
PC145

PC147
100P_50V_0402

.01U_25V_0402

.1U_50V_0603

100P_50V_0402

PC150
5 2
QUANTA
1

4
VCC GND 56.2K/F_0402
2
*.1U_50V_0603_NC

*INA194_NC
1
2

COMPUTER
PC146

PC148

PC144
PC143 *.01U/25V_NC Title
1

PR166 Battery Charger


8731_VREF=4.096V
2 1
Jason_1216: Change PR169 from 8731_VLDO=5.4V Size Document Number R ev
27.4K/F_0402 DM5 1A
59K to 56.2K per M07 A10 ACIN switch threshold=2.048V
400KHz PWM nominal Date: 星期二, 十二月 27, 2005 Sheet 42 of 59
1 2 3 4 5
5 4 3 2 1

POP for TI51116

D D

+5V_SUS
DePOP for TI51116

PJP15
POWER_JP
+PWR_SRC 1 2 51116_VIN
PR99

1
5.1_0603

2
1.8 Volt +/-5% + PC69 + PC70
10U_25V_1206 10U_25V_1206 1.8V_LX
Design Current:7.28A

1
PD8 PC167

2
Maximum Current: 10.5A *CH501H_NC 1U_10V_0603

2
OCP: min A; max A

2
1 2
PC74 PR183 PR97 +3.3V_SUS
1U_10V_0603 7.5K/F_0402
*12.7K/F_NC

1
+1.8V_SUS PR98 *0_0402_NC
1 2PC166

1
1000P_50V_0402
PJP10 PC71 PC72 PU13 PR184

15

14

16
2200P_50V_0402
POWER_JP PQ48 TPS51116 100K_0402

2
.1U_50V_0603
1 2 IRF7413ZTRPBF

VDDP(V5IN-TI)

VDDP(V5FILT-TI)

CS
PC164
PJP11 2 1 1.8BST 22 VBST

8
7
6
5
POWER_JP PR182 13
PGOOD SUSPWROK_1P8V 40
1 2 .1U_50V_0603 0_0603
C 4 1.8V_DH 21 12 C
DRVH NC
PL7 11
S5 SUSPWROK_5V 46
1.5uH_SIQH125_1R5PF_13A/6mohm

3
2
1
7.3*4.3*2.8-15mohm
NEC-TEPSLD0G477M(15)12R-

+1.8V_SUS_P 2 1 1.8V_LX 20 10
LL S3 RUN_ON 19,27,29,40,44,46,47
12.2*12.2*6
1

8
7
6
5
VLDOIN 23 51116_VLDOIN PR179 +1.8V_SUS_P
1

1
*330U_4V_25mOhm_NC

+ PC56 DC-15D0M012 0_0805

1
+ PC149 PC48 470U_4V_15mOhm 4 1.8_DL 19 DRVL
.1U_10V_0402

7 PC161 PR177 +1.5V_RUN


2

PR95 PR93 NC 1U_10V_0603 *0_0805_NC


2

2
2

*2K/F_NC 0_0402 PQ47


3
2
1

PC165 FDS6676AS 18 1 0.9 Volt +/-5%


PGND VTTGND Design Current:1.05A
17
1

CS_GND

2
*.1U_50V_0603_NC

100pF for SC480 4 Maximum Current: 1.5A


1.8V_OUT TON(MODE) PC155 PC160 PC158 PC156 PJP12 Current limit =3.8A
8 VDDQSNS .1U_10V_0402 10U_4V_0805 10U_4V_0805 10U_4V_0805 POWER_JP

1
1.8V_FB 9 24 +0.9V_DDR_VTT_P 1 2
+5V_SUS VDDQSET VTT +0.9V_DDR_VTT
PR96 0_0402 PR181 2
VTTSNS
2

VTTREF
+5V_SUS 0_0402 51116_COMP6
PR94 PC163 10 Ohm for SC480 COMP

51116_TON
25

GND
PAD
PAD
PAD
PAD
1
*10K/F_0402_NC *.1U_50V_0603_NC 26
1

PC162 PAD PR90


*1U_10V_0603_NC *0_0402_NC
2

3
29
28
27
+1.8V_SUS_P

51116_VIN
PR92
B B
PR180 *604K_NC

1
10 Ohm for SC480 0_0402 PR91
0_0402 PC68
*1000P_50V_0402_NC

2
V_DDR_MCH_REF
1

1U for SC480 PC159


.033U_25V_0603
2

"IRF7413ZTRPBF"---Id=13A,Rdson=10.5mOhm@Vgs=4.5V
(P/N:BAM74130036) / (TRANS MOSFET IRF7413ZTRPBF(30V,13A)L-F);

"FDS6676AS"---Id=14.5A,Rdson=5.9mOhm(25 ℃ )@Vgs=4.5V ; ,Rdson=8.11mOhm(100 ℃ )@Vgs=4.5V


(P/N:BAM66760026) / (TRANS MOSFET FDS6676AS_NL(30V,14.5A)ROHS);
Use the worst-case value for RDS(ON) from the MOSFET data sheet, and add a margin of 0.5%/°C for
the rise in RDS(ON) with temperature.

OCP=14A; Rdson=5.9mOhm(25 ℃ )
OCP=10.6A; Rdson=8.11mOhm(100 ℃ )
A A

QUANTA
Title
COMPUTER
1.8V,0.9V

Size Document Number R ev


DM5 1A

Date: 星期二, 十二月 27, 2005 Sheet 43 of 59


5 4 3 2 1
1 2 3 4 5

POP for TPS51483

+PWR_SRC
A A

DePOP for TPS51483

1
PJP4
POWER_JP

2
+5V_SUS 5VCCA1
51483_VIN1 PR142
10_0402
1

5VCCA2 +3.3V_RUN
1

1
PC27 + PC22 PR41 +PWR_SRC

3
PC26 10U_25V_1206 + PC23 PD3 10_0402

1
2200P_50V_0402 .1U_50V_0603 10U_25V_1206 *BAT54A_NC
2

PC135 PC123
2

1U_10V_0603 1U_10V_0603 PR137

1
*100K_0402_NC

2
PJP3
POWER_JP
AGND2 AGND1
1.5 Volt +/-5% Jason_1219:Change PU9 from 1.05 Volt +/-5%

2
Design Current:3.475A TPS51483 to SN0508073 for DELL Design Current:6.02A

1U_10V_0603
B Maximum Current: 5.9A PU9 requset. Maximum Current: 8.6A B

1
+1.5V_RUN OCP: min A; max A PC119 SN0508073 51483_VIN2 OCP: min A; max A
AGND1

1
PJP6 3 28

2
VDDP1 AGND1

1
+ PC20 + PC21
1

8
7
6
5

1 PGND1 PGOOD1 27 1.5V_RUN_PWRGD 1.5V_RUN_PWRGD 40 PC25 10U_25V_1206 10U_25V_1206


PJP8 2200P_50V_0402

2
POWER_JP PQ12 4 1.5V_DH 6 26 1.5V_FBK PC24
SI4800BDY DH1 FBK1
PR28 ILIM1 4 25 5VCCA1 .1U_50V_0603
2

PL5 *13K/F_NC ILIM1 VCCA1


3
2
1

+1.5V_RUN_P 2 1 1.5V_LX 5 24 +1.5V_RUN_P


3.8UH_SIL1045R_3R8_8A/21mohm PC122 LX1 VOUT1
2 for1 SC483

1.05V
1

8
7
6
5
220U_2.5V__15mOhm

PR33 1.5V_BST 23 TON1 PR29


30K for SC483

10*10*4.5 2 1 7 BST1 TON1 +PWR_SRC


1
7.3*4.3*1.8-15mohm
MfrPN:2R5TPE220MF-
SANYO-2R5TPE220MF-

PC31 + DC-38800000 0_0402 *1M_NC


PC32 PQ11 4 .1U_50V_0603 1.5_DL 2 22 EN1 +1.05V_VCCP
.1U_10V_0402 PC116 PR23 SI4810BDY DL1 EN/PSV1 PJP5
2

5
6
7
8
15K/F_0603 PR34 TON2 9 21 1.05V_BST 1PC132 POWER_JP
47pF

+PWR_SRC TON2 BST2 2


100P_50V_0402

*715K/F_NC PR32 .1U_50V_0603 1 2


3
2
1

1.5V_FBK EN2 8 20 1.05V_DH 0_0402 4 PQ10


EN/PSV2 DH2 FDS6612A_NL
10 19 1.05V_LX PL4 PJP7
15Kfor SC483 VOUT2 LX2 1.5UH_SIL104R-1R5PF_10A/8.1 mohm POWER_JP

1
2
3
PR139 PR22 5VCCA2 11 18 ILIM2 PR153 1 2 +1.05V_VCCP_P 1 2
VCCA2 ILIM2
39P_50V_0402

15K/F_0603 *25.5K/F_NC
16.5Kfor SC483

0_0402 10*10*3.8

5
6
7
8

1
PC137 13 17
PGOOD2 VDDP2 +5V_SUS
1

7.3*4.3*2.8-15mohm
NEC-TEPSLD0G477M(15)12R-
PC30 +

1
*470UF_4V_15mOhm_NC
PR45 12 16 1.05V_DL 4 PQ9 +
FBK2 DL2

470U_4V_15mOhm
AGND1 11.8K/F_0603 FDS6676AS PC29
2

2
14 15 .1U_10V_0402

2
AGND2 PGND2

1
C C
AGND1 PC28

1
2
3
PC136
+3.3V_RUN 1U_10V_0603

2
15Kfor SC483

PR158
0_0402
PR47 AGND2
PR157 29.4K/F_0603

*100K_0402_NC
"SI4800BDY"---Id=6.5A,Rdson=23mOhm@Vgs=4.5V AGND2
AGND2 (P/N:BAM48000040) / (TTRANS MOS SI4800BDY-T1-E3(30V7A,SOIC)L-F);
PR46
40,45 1.05V_RUN_PWRGD 1.05V_RUN_PWRGD *0_0402_NC 1.5V_RUN_PWRGD "SI4810BDY"---Id=7.5A,Rdson=16mOhm(25℃);Rdson=22mOhm(100℃)
ILIM2 PR42 @Vgs=4.5V
PD25 *CH751H-40HPT_NC 6.04K/F_0402 (P/N:BAM48100036) / (TRANS MOS SI4810BDY-T1-E3(30V,10A)L-F);
1 2
19,27,29,40,43,46,47 RUN_ON PR48 *0_0402_NC EN1 1.5V_OCP=7.99A;Rdson=16mOhm(25℃)
PR31 ILIM1 PR25 1.5V_OCP=5.98ARdson=22mOhm(100℃)
1

1K/F_0402 11.8K/F AGND2 1.05V_OCP=11.48ARdson=5.9mOhm(25℃)


+5V_SUS EN2 PC185 1.05V_OCP=8.7ARdson=8.11mOhm(100℃)
PR148 *.47U_10V_0603_NC
2

+5V_SUS 1K/F_0402
2

AGND1
PR50 Jason_1208:Add PC185 and "FDS6612A"---Id=8.4A,Rdson=30mOhm@Vgs=4.5V
2

100K_0402 (P/N:BAM66120027) / (TRANS MOSFET FDS6612A_NL(30V,8.4A)SOP);


PR49 PD25 follow M07 A07
100K_0402 "FDS6676AS"---Id=14.5A,Rdson=5.9mOhm(25℃)@Vgs=4.5V ; ,Rdson=8.11mOhm(100℃)@Vgs=4.5V
1

D (P/N:BAM66760026) / (TRANS MOSFET FDS6676AS_NL(30V,14.5A)ROHS); D


1

TON1 PR26 1.5V_LX TON2 PR39 1.05V_LX


280K/F_0402 294K/F_0402
QUANTA
6
3

2 PQ13B
19,27,29,40,43,46,47 RUN_ON 5 PQ13A
2N7002DW
2N7002DW PC124
*1000P_50V_0402_NC
PC129
*1000P_50V_0402_NC COMPUTER
1

Title
4

Depend on Semtech request, we 1.8V,0.9V,1.5V,1.05V

must use AGND1,AGND2 and Size Document Number R ev


AGND1 AGND2 power GND. DM5 1A

Date: 星期二, 十二月 27, 2005 Sheet 44 of 59


1 2 3 4 5
A B C D E F G H

+CPU_PWR_SRC_3 PJP1
POWER_JP
1 2
+CPU_PWR_SRC
PJP2
POWER_JP
+5V_RUN 1 2 +PWR_SRC
PQ3

5
6
7
8
9

1
IRF7821TRPBF
PC4 PC13 PC11 + PC186

1
+CPU_PWR_SRC +3.3V_RUN PC3 4 2200P_50V_0402 .1U_50V_0603 10U_25V_1206

1
PR5 0_0603 *100U/25V_NC

2
1U_10V_0603 1 2 PC104

2
10U_25V_1206

1
2
3
2

2
IMVP_PWRGD 13,40 PU1
PR35 PR13 PC1 Jason_1216: Reserved PC186
1 1
10_0603 10_0603 5 1 .22U_50V_0805 100UF_25V AL Cap for CPU noise issue.

1
+5V_RUN VCC BOOT
10*11.5*4
2 8 U G1

1
+3.3V_RUN PWM UGTE PL3 0.45U_ETQP4LR45XFC_25A_1mohm
6 7 P H1 2 1
FCCM PHSE +VCC_CORE
Throttling temp.

PAD
1
PC125 3 4 LG1 PQ41
105 degree C

3
GND LGTE

5
6
7
8
9
PR130 FDS7088SN3

1
.01U_25V_0402
Close to Phase 1 Inductor PR150 PC112 1.91K/F_0603 ISL6208_QFN

9
.01U_25V_0402

7.3*4.3*1.9-6mohm
Panasonic-EEFSX0D331XR
10_0603 4

2
lower MOSFET

6260_VIN

2
6260_3V3

1
1

1
PC14 + PC140 + PC139

1
2
3

*330U_2V_ESR6_NC
330U_2V_ESR6
.1U_10V_0402
6260_VDD

2
1

1
PC17 PC111

PC131 *.1U_50V_0603_NC 1.5n_50V_0603

20

18

39

40

2
1

1U_10V_0603 PU8 PR141 7.68K/F_0805


VSUM 1 2

3V3
VDD

VIN

PGOOD
2

PR140 10K/F_0402
JASON_1014: Change for M07 A07. 19
1 2
VSS FC CM PR144 10_0402
FCCM 24
41 GND 1 2
2 1
PR9 0_0402
2 1 6260_PSI 27 PWM1 +CPU_PWR_SRC
3 H_PSI# PWM1
+3.3V_RUN PR132 *0_0402_NC
+5V_RUN
40,44 1.05V_RUN_PWRGD 2 1 1 PSI#
1

PR131 *0_0402_NC 23 6260_ISEN1


ISEN1

1
PR17
27,28,40 RUNPWROK 2 1 6260_PGDIN 2 PGD_IN PQ4

5
6
7
8
9
100K PR133 0_0402 PR138 PC115 IRF7821TRPBF PC8 PC12 PC103

1
2 1 6260_RBIAS 3 PC101 .1U_50V_0603 10U_25V_1206

2
PR136 147K/F_0402 RBIAS *10K/F_0402_NC .22U_25V_0603 PR1 0_0603 2200P_50V_0402
28 IMVP6_PROCHOT# 4
2

1U_10V_0603
2 4 1 2 PC6 2

2
VR_TT# PWM2 10U_25V_1206
PWM2 26

2
2 1 2 1 PR7 6260_NTC 5 NTC

1
2
3
PR6 *470K_0402_NTC_NC PU6 PC2
*0_0402_NC 1 26260_SOFT6 5 1 .22U_50V_0805

1
Jason 1011: change PC113 .01U_25V_0402 SOFT 22 6260_ISEN2 VCC BOOT
10*11.5*4
PC113 from .22u to .01u ISEN2 U G2
2 PWM UGTE 8

1
follow M07. CPU_VID0 28 PR143 PC118 PL2 0.45U_ETQP4LR45XFC_25A_1mohm
4 CPU_VID0 VID0 P H2
6 FCCM PHSE 7 2 1 +VCC_CORE
CPU_VID1 29 *10K/F_0402_NC .22U_25V_0603

PAD
4 CPU_VID1

2
VID1 ISL6260_MLFP_40 LG2
3 4 PQ39

3
GND LGTE

5
6
7
8
9
CPU_VID2 30 25 6260_PWM3 FDS7088SN3
4 CPU_VID2 VID2 PWM3 ISL6208_QFN

7.3*4.3*1.9-6mohm
Panasonic-EEFSX0D331XR
CPU_VID3 31 4
4 CPU_VID3 VID3

1
CPU_VID4 32 21 6260_ISEN3
4 CPU_VID4 VID4 ISEN3

1
PC176 + PC138 + PC108

1
2
3
1
CPU_VID5 33 PR145 PC130
4 CPU_VID5 VID5

330U_2V_ESR6

330U_2V_ESR6
.1U_10V_0402
2

2
1
CPU_VID6 34 *10K/F_0402_NC .22U_25V_0603 PC106
4 CPU_VID6
2

VID6
2 1 6260_VRON 35 PR149 7.68K/F_0805 1.5n_50V_0603
27,28,40 RUNPWROK

2
PR128 0_0402 VR_ON VSUM 1 2
6,13 DPRSLPVR 2 1 2 1 6260_DPRSLPVR36 DPRSLPVR
PR12 0_0402 PR16 499_0402 7 6260_OCSET1 2 PR20 PR146 10K/F_0402
6260_DPRSTP 37 OCSET 11.5K/F_0402
3,11 H_DPRSTP# 2 1 DPRSTP# 1 2
PR129 0_0402
38 PR151 10_0402
17 CLK_ENABLE# CLK_EN#
17 VSUM 1 2
VSUM
*.01U_25V_NC
.33U_16V_0603

PR147
2

+CPU_PWR_SRC_3
.012U_50V_0603

PR30 1 2 1 2 1 2 11
332/F_0402 PC121 0_0402 VDIFF PR36
PAD 42
680P_50V_0402 43 3.57K/F_0402 +5V_RUN
PAD
2

1 2 44 PR37
PAD
1

PR27 2.2K/F_0402 45 4.53K/F_0402 Close to Phase 1 Inductor


1

PAD

1
6260_FB 10 46 PQ5 1.5 Volt +/-5%
FB PAD
1

5
6
7
8
9
47 IRF7821TRPBF PC10 PC5
Design Current:3.475A
2

PAD
2

1
PC128

PC120 48 PC102 .1U_50V_0603 10U_25V_1206


1

2
3 PAD Maximum Current: 4.964A 3
6.8K_0402_NTC
PC127

PC126

1 2 1 2 PR24 49 PR121 0_0603 4


2

PAD
PR8

1U_10V_0603
82.5K/F_0402 50 1 2 PC9 PC7 OCP: min A; max A

2
1500P_50V_0402 PAD PR40 2200P_50V_0402 10U_25V_1206
9 COMP

2
15K/F_0402
1

1
2
3
6260_COMP PU7 PC100
2 1 VO 16
PC117 5 1 .22U_50V_0805

1
VCC BOOT
DROOP

220P_50V_0402 10*11.5*4
VSEN

1 2 8 6260_PWM3 2 8 U G3
RTN

DFB

VW PWM UGTE
1

PR21 6.34K/F_0402 PL1 0.45U_ETQP4LR45XFC_25A_1mohm


6 7 P H3 2 1
FCCM PHSE +VCC_CORE
2 1 6260_VW PR43

PAD
13

12

6260_DROOP 14

15

1K/F_0402 3 4 LG3 PQ40

3
GND LGTE

5
6
7
8
9
PC114 1000P_50V_0402 PC18 FDS7088SN3
2

PR44 *.1U_50V_0603_NC ISL6208_QFN


2

9
1 2 6260_DFB 4

NEC-TEPSGV0E337M9-12R-
7.3*4.3*1.9-9mohm
1

1
10K/F_0402 PC105

1
PC107 + PC109 + PC110

1
2
3
1.5n_50V_0603

*330U_2V_ESR6_NC

330U_2V_ESR6
.1U_10V_0402
2 1 ISL6260_VO PR152 7.68K/F_0805

2
PC19 330P/50V/0603 VSUM 1 2

PR155 10K/F_0402
1

PC133 PC134 1 2
2 PR154 1 1000P_50V_0402 1000P_50V_0402
0_0603 PR156 10_0402
2

1 2
2 PR38 1
*0_0603_NC

VCCSENSE 4
D6 D5 D4 D3 D2 D1 D0 Output
CPU_VID0 PR19 2 1
*0_0402_NC 0 0 0 0 0 0 0 )1.500V
VSSSENSE 4 0 0 0 0 0 0 1 )1.4875
CPU_VID1 PR18 2 1
4 *0_0402_NC 0 0 0 0 1 0 1 )1.4375 4
0 0 0 0 1 1 1 )1.4125 PR311=15.5K ; OCP=55A
CPU_VID2 PR10 2 1 0 0 0 1 0 0 0 )1.4000
"TPCA8005-H"---Id=14A,Rdson=9.5mOhm@Vgs=4.5V *0_0402_NC PR311=20K ; OCP=95A
Parallel 0 0 1 0 0 0 1 )1.2875
(P/N:BAM80050006) / (TRANS MOS TPCA8005-H(30V,27A)SOP8 L-F); 0 0 1 1 0 0 0 )1.2000
CPU_VID3 PR125 2 1
*0_0402_NC 0 0 1 1 1 0 0 )1.1500
"IRF7821"---Id=10A,Rdson=9.5mOhm@Vgs=4.5V 0 1 0 1 0 0 0 )1.0000
(P/N:BAM78210034) / (TRANS MOSFET IRF7821TRPBF(30V,13.6A)L-F); CPU_VID4 PR126 2 1
*0_0402_NC
0 1 0 1 0 1 1 )0.9625 QUANTA
0 1 1 1 1 0 0 )0.7500
"PH3230S"---Id=25A,Rdson=4.4mOhm@Vgs=4.5V CPU_VID5 PR11 2 1
*0_0402_NC
1
1
0
0
0
1
0
0
1
0
0
0
0 ) 0.6500
0 )0.5000 Title
COMPUTER
(P/N:BAM32300Z02) / (TRANS MOSFET PH3230S(30V107A)SOT669 L-F);
1 1 0 0 0 0 0 )0.3000 CPU POWER
CPU_VID6 PR127 2 1
"IRF7832"---Id=16A,Rdson=3.7mOhm@Vgs=4.5V *0_0402_NC Size Document Number Rev
(P/N:BAM78320018) / (TTRANS MOSFET IRF7832TRPBF(30V,20A)L-F); DM5 1A

Date: 星期二 , 十二月 27, 2005 Sheet 45 of 59


A B C D E F G H
1 2 3 4 5

+PWR_SRC

1
+PWR_SRC PJP19
POWER_JP

2
1
51120_VIN2
3.3 Volt +/-5% PJP18

1
A A
Design Current:4.24A POWER_JP

1
PC90 PC89 + PC170 + PC172
Maximum Current: 6.06A *10U_25V_1206_NC

.1U_50V_0603

2200P_50V_0402

10U_25V_1206
OCP: min A; max A

2
51120_VIN1 +VCC_TPS51120 +5V_ALW PQ54 +15V_SUS
PR116
PMST2222A
1

1
3 1

2
PC83 + PC80 + 4.7_0603

1
PC85 PR100

1
*10U_25V_1206_NC 10U_25V_1206 PC96 + PC174 0_0805 PR202
2

2
PC95

.1U_50V_0603

10U_25V_1206
PC94 1U_10V_0603

2
+3.3V_SUS

.1U_50V_0603

*0_0805_NC
PC88 .1U_50V_0603 PD9 PR198

2
USM13PT_1A/200V 10K_0402

2
2200P_50V_0402

2
1 2PC77 2 1

1
4.7U_10V_1206 15VS PC171
PQ30 CT_1027: Change PR10, 2.2U_25V_1206
4

3
PR109 from 0 ohm to 2.2

2
+3.3V_SRC PU5 TPS51120 +5V_SUS
ohm per EMI
3 SUS_ENABLE 1 PD21 PJP13
SUS_ENABLE 47

5
6
7
8

1
22 21 PC92 PC81 MMBZ5245B POWER_JP
FDC655BN VIN VREG5 .1U_50V_0603 2.2U_25V_1206 1 2

2
20 28 BST5 2 1 4 PQ34
6
5
2
1

2
V5FILT VBST1

8
7
6
5

2
PR109 FDS6612A_NL
THERM_STP# 9 27 DH5 2.2_0603 PJP14
PQ35 PC91 EN5 DRVH1 POWER_JP
4

1
2
3
SI4800BDY 2 1 BST3 13 26 LX5 +5VSUS_P 1 2

1
PR110 BST2 LL1 PL8
B B

5
6
7
8

7.3*4.3*1.9-25mohm
SANYO-6TPE220M-
PJP16 .1U_50V_0603 DH3
2.2_0603 14 25 DL5 4.7uH_STQ1250-4722APF_8A/25mOhm(5mm)
3
2
1
POWER_JP PL9 DRVH2 DRVL1
12.2*12.2*5.5

1
1 2 +3V_SRC_P 2 1 LX3 15 24 4 PR194 + PC73
3.8UH_SIL1045R_3R8_8A/21mohm LL2 PGND1 PQ33 *0_0402_NC
10*10*4.5 DL3 16 1 220U/6.3V/ESR25

2
DRVL2 VO1
8
7
6
5
1 2 PR104 DC-38800000 3 51120_VFB1 FDS6690AS_NL PC75

1
2
3
VFB1 .1U_10V_0402
*0_0402_NC 17 PGND2
1

PJP17 POWER_JP 4 2
PC79 + PC78 COMP1
8 VO2 COMP2 7
.1U_10V_0402 PQ32
2

220U/6.3V/ESR25 SI4810BDY 51120_VFB2 6 23 PR191


3
2
1

VFB2 CS1 PR115


CS2 18 *0_0402_NC
7.3*4.3*1.9-25mohm
SANYO-6TPE220M-

PR103 PR105 51120_EN2 12 4 VREF2 0_0402


51120_EN1 EN2 VREF2
0_0402 *0_0402_NC 29 EN1
TONSEL 31 5 Volt +/-5%

1
19 VREG3 GND 5 Design Current:3.647A
+VCC_TPS51120 30 PC82
+3.3V_RTC_LDO PGOOD1
10 11 1000P_50V_0402 Maximum Current: 7.1A

2
EN3 PGOOD2
OCP: min A; max A

SKIPSEL
+3.3V_RTC_LDO

1
+VCC_TPS51120

PAD
PAD
PAD
PAD
PAD
PR107 + PC97
1 2 PC87 10K_0402 PR108
.1U_10V_0402 10K_0402 10U_25V_1206
27,40,47 SUS_ON 2

32

33
34
35
36
37
5

PU4
2 PC175 PC98
27,37 AUX_EN
4

*1000P_50V_0402_NC

*1000P_50V_0402_NC
1 PR222 PR113 PR200 PR199
27,40,47 SUS_ON

1
100K_0402 11.8K/F_0402 *0_0402_NC 0_0402

51120_SKIP

1
C C
7SH32
1

PR203

2
PR102 PC86 12.1K/F_0402

2
Jason_1205:Add PR222 *1000P_50V_0402_NC
2

*0_0402_NC PR197 *0_0402_NC


follow M07 A06
+VCC_TPS51120
PR195 *0_0402_NC PR192 *0_0402_NC VREF2
2

+3.3V_SRC PR201
PD10 *0_0402_NC
BAT54C 2 PR112 1
PR114 PR101 *0_0603_NC
2 1 0_0402 PR106
27 ALWON
10K_0402 100K_0402 2 PR190 1
3

0_0603
32 THERM_STP# THERM_STP#
SUSPWROK_5V 43
+3.3V_RTC_LDO PQ36 +3.3V_ALW PR193 *0_0402_NC
FDN340P_NL RUN_ON 19,27,29,40,43,44,47

"SI4800BDY"---Id=6.5A,Rdson=23mOhm@Vgs=4.5V 1 3
(P/N:BAM48000040) / (TTRANS MOS SI4800BDY-T1-E3(30V7A,SOIC)L-F); PQ51 +VCC_TPS51120
2

"SI4810BDY"---Id=7.5A,Rdson=16mOhm(25℃) ; *BSS84LT1G_NC
2

Rdson=22mOhm(100℃) @Vgs=4.5V
(P/N:BAM48100036) / (TRANS MOS SI4810BDY-T1-E3(30V,10A)L-F); PC93 3 1
1

PR204 .1U_50V_0603
3V_OCP=7.375A;Rdson=16mOhm(25℃) PR196
D 3V_OCP=5.364ARdson=22mOhm(100℃)
470K_0402
PR111 VREF2=2V D
2

5.5V_OCP=9.4ARdson=15mOhm(25℃) 470K_0402
1

5.5V_OCP=7.2ARdson=20.62mOhm(100℃) *200K_NC
PC173
QUANTA
3

4.7U_10V_1206
2

2
3

"FDS6612A"---Id=8.4A,Rdson=30mOhm@Vgs=4.5V
(P/N:BAM66120027) / (TRANS MOSFET FDS6612A_NL(30V,8.4A)SOP); 2 PQ38 PQ52 COMPUTER
1

*2N7002W-7-F_NC Title
"FDS6690AS"---Id=10A,Rdson=15mOhm(25℃);Rdson=20.62mOhm(100℃) @Vgs=4.5V 2N7002W-7-F 3VALW,5V,3V, power on
1

(P/N:BAM66900022) / (TRANS MOSFET FDS6690AS_NL(30V,10A)L-F); Jason_1213:Add soft start Size Document Number R ev
follow CDC request DM5 1A

Date: 星期二, 十二月 27, 2005 Sheet 46 of 59


1 2 3 4 5
1 2 3 4 5

+5V_ALW +15V_SUS
Cory_1123:Changed PC168 From
+5V_ALW +15V_SUS
0.033u to 4700p follow M07 A06.

1
+5V_SUS
PQ53 +5V_RUN PR187 PR188
FDC653N_NL 100K_0402 100K_0402

1
6
PR186 PR185 5 4

2
100K_0402 100K_0402 2

1
1 PC177 SUS_ENABLE
SUS_ENABLE 46

1
A A
PC169 PR205

3
*10U_10V_0805_NC
4.7U_10V_1206 *20K_NC

2
RUN_ENABLE SUS_ON_5V# 5 PQ50A

2
2N7002DW

2
3

4
1
RUN_ON_5V# 5 PQ49A PC168 PR189 is used

6
2N7002DW 4700P_50V-0603
for Vgs=12V PR189
27,40,46 SUS_ON 2

2
*470K_0402_NC PQ50B

6
2N7002DW

1
19,27,29,40,43,44,46 RUN_ON 2

2
PQ49B

1
2N7002DW
+3.3V_SRC +3.3V_RUN
PQ31
FDC653N_NL
PD22 6
CH751H-40HPT 5 4
1 2 2

1
3.3VRUN Turn ON Delay : 1 PC76

1
Populate RC components. 4.7U_10V_1206 PC178
PR219 PR206

*10U_10V_0805_NC
200K *20K_NC

2
1 2

2
1
Cory_1123:Pop PD22 and PD23 for +3.3V_RUN PC182
and +1.8V_RUN fast turn off time follow M07 A06. 470P_50V

2
B B

+1.8V_SUS
PQ14
FDC653N_NL +1.8V_RUN
PD23
Cory_1123:Pop PR219,PC182 and PR220,PC183 let CH751H-40HPT
6
5 4
+3.3V_RUN and +1.8V_RUN Turn ON Delay.M07 A06 1 2 2

1
1

1
PC33 PR207
PR220 1U_10V_0603 PC179 PC180 *20K_NC

*4.7U_6.3V_0603_NC

*4.7U_6.3V_0603_NC
200K

2
1 2

2
CT_1214: Added PR223 30 ohm and Q58 to

1
form a discharge of +3.3V_SUS.
PC183
0.01U_25V

2
+3.3V_ALW +3.3V_SUS +3.3V_SRC +1.8V_SUS +5V_SUS
PQ37 +3.3V_SRC
*FDC653N_NL_NC
6

1
5 4
2 PR223 PR211 PR212 PR213

1
1 PC84 30_0402 *30_0402_NC 30_0402 *30_0402_NC
3 *1U_10V_0603_NC

2
C C

Q58

3
Q49 Q50 Q51
SUS_ON_5V# 2 2 2 2
CT_1213: Pop R389 10ohm and Q40 2N7002
to add a quick discharge path for +3.3V_RUN. 2N7002W-7-F *2N7002W-7-F_NC 2N7002W-7-F *2N7002W-7-F_NC

1
+5V_RUN +3.3V_RUN +1.8V_RUN +1.5V_RUN +0.9V_DDR_VTT +2.5V_RUN
1

1
R388 R389 R266 R355 R265 R354
*1K_NC *1K_NC *1K_NC *1K_NC *1K_NC
10
3 2

3 2

3 2

3 2

3 2

3 2
RUN_ON_5V# 2 2 2 2 2 2

Q39 Q40 Q28 Q37 Q27 Q36


1

1
*2N7002W-7-F_NC 2N7002W-7-F *2N7002W-7-F_NC *2N7002W-7-F_NC *2N7002W-7-F_NC *2N7002W-7-F_NC

D D

QUANTA
Reserve discharge path
Title
COMPUTER
RUN POWER SW

Size Document Number R ev


DM5 1A

Date: 星期二, 十二月 27, 2005 Sheet 47 of 59


1 2 3 4 5
1 2 3 4 5

+3.3V_ALW

2
PC142 2200P_50V_0402
2 1 PD14 PD13 PD12 +3.3V_ALW
DA204U DA204U DA204U

PC141 .1U_50V_0603

3
1 2

1
+SBATT 22,41
PR160
A A
JABT1 10K_0402
1 RP22
BATT1+ 4P2R-S-100
2
Adress : 16H

2
BATT2+
SMB_CLK 3 2 1 SBAT_SMBCLK 19,27
SMB_DAT 4 4 3 SBAT_SMBDAT 19,27
BATT_PRES# 5 1 2 SBAT_PRES# 28,41
6 PR161 100_0402
SYSPRES#
BATT_VOLT 7 1 2
TYCO-1566657-2 8 PR159 100_0402

GND
GND
BATT1- +3.3V_ALW
BATT2- 9

11
10

2
PD11
DA204U

3
SBAT_ALARM# 28
+3.3V_ALW

PC151 2200P_50V_0402

2
2 1 +3.3V_ALW
PD19 PD20 PD18
PC152 .1U_50V_0603 DA204U DA204U DA204U
1 2
B B

1
+PBATT 41
JABT2 PR173
1 RP45 10K_0402
BATT1+ 4P2R-S-100
BATT2+ 2
3 2 1 PBAT_SMBCLK 27,42

2
SMB_CLK
SMB_DAT 4 4 3 PBAT_SMBDAT 27,42
BATT_PRES# 5 1 2 PBAT_PRES# 28
6 PR175 100_0402
SYSPRES#
BATT_VOLT 7 1 2 +3.3V_ALW
8 PR168 100_0402
GND
GND

BATT1-
Adress : 16H BATT2- 9

2
11
10

PD17
DA204U

3
PBAT_ALARM# 28
SUYIN-200185MR009G505ZL This resistor must be depopulated
if FDV301N/FDV303 are used to aviod
a 1.36mA constant current drain
from +3VALW.Thus, Bios will not be
to switch Q1 off. MMBT100 will not
have that issue.
+5V_ALW
PS_ID_DISABLE# 27
1

C C

This diode is no-stuff PR4


1

populate if Q1 gets damageed 15K/F_0402 PR120


by ESD. 10K_0402 +5V_ALW +3.3V_ALW
PD2
1

1
2

*DA204U_NC
2

2
Three transistor can be used for D11 PQ2
1

1
Q1(pin compatible):FDV301N/FDV303N *SSM24_NC MMST3904
PR119
3

has low Vgs_on w/buit-in ESD PR3 PR118


2

100K_0402 PD1 2.2K_0402


1 2
1

protection.MMBT100 BJT works in *10K_0402_NC DA204U


2

reverse conduction mode. PQ1


2

2
FDV301N PR117 33_0402
3

3 1 1 2 PS_ID 27
39 DOCK_PSID
JDCIN1
POWER_JACK PR2 *33_NC PQ15
PL10 BLM11B102S 1 2 +DC_IN FDS6679
1 1 2 +DC_IN_SS
FL1 8
2 +DCIN_JACK 1 2 1 7
BLM41PG600SN1L 2 6
3 D CIN- PC99 3 5
1
*.1U_50V_0603_NC
1

PR53
9
8
7
6
5
4

1
RV2 240K_0402 PR51 PC36
4

4.7K_0805 PC34 10U_25V_1206


1

PC35 .1U_50V_0603 PC38


2

2
.47U_25V_0805 .1U_50V_0603
2

D Q49_G PC37 D
*VZ0603M260APT_NC 2 PR162 1 .01U_50V_0603
*0_0402_NC
1

PQ42 PR52
47K_0402
QUANTA
3

28,42 AC_OFF 2 PQ43


2
COMPUTER
2

*2N7002W-7-F_NC Title
*SI2301BDS_NC DCIN,BATT CONNECTOR
1

Size Document Number R ev


DM5 1A

Date: 星期二, 十二月 27, 2005 Sheet 48 of 59


1 2 3 4 5
1 2 3 4 5 6 7 8

DM5 Power Design Block Diagram +5V_RUN +3.3V_RUN

PQ44
FDS6679
+DC_IN +DC_IN_SS
RUNPWROK IMVP_PWRGD
A Power Jack CPU POWER A

ISL6260
Adapter input +ISL6208
+VCC_CORE
DUAL PHAS
PBAT_SMBCLK SOLUTION
(From SMSC) Charger
Pag 45
PBAT_SMBDAT

MAX8731
ADAPT_OC SUS_ON/ALWON/THERM_STP# SUSPWROK_5V
(To SMSC)
Pag 42 SYSTEM POWER +3.3V_SRC

SUS_ON/ALWON/THERM_STP# TPS51120

+VCHGR

+SDC_IN
+5V_SUS

+15V_SUS
B B

+3.3V_ALW
Pag 46
+5V_ALW
Primary Battery
Battery
+PWR_SRC +5V_SUS
Selector

Secondary Battery Pag 41


SUSPWROK_1P8V
SUSPWROK_5V DDR POWER

TPS51116 +1.8V_SUS

(SC480)
RUN_ON
+0.9V_DDR_VTT
PQ75 Pag 43
AO6408
+3.3V_SRC +3VSUS
C C

+5V_SUS

SUS_ENABLE
PGD_IN
RUN_ON N&S BRIDGE
POWER
TPS51483 +1.5V_RUN

(SC483)
+5V_SUS +5V_RUN
RUN POWER RUN_ON
+1.05V_VCCP
PLANE Pag 44
SWITCH
+3.3V_SRC +3.3V_RUN

+1.8V_SUS Pag 47
+1.8V_RUN

D D

+3.3V_SRC +3.3V_ALW
QUANTA
Title
COMPUTER
Power Block Diagram

RUN_ON Size Document Number R ev


DM5 1A

Date: 星期二, 十二月 27, 2005 Sheet 49 of 59


1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

+3.3V_SUS +3.3V_RUN

2.2K 2.2K 2.2K 2.2K


A A
ICH_SMBCLK 7002 CLK_SCLK
ICH_SMBDATA CLK GEN.
ICH7-M CLK_SDATA Page 17
7002
Page 13

+3.3V_ALW DIMM 0
Mini Card Page 15
Page 23

10K 10K DIMM 1


Page 15

8
10 CLK_SMB
SMBUS
B

9 7 GUARDIAN ADDRESS [2F]


B

DAT_SMB Page 32
+5V_ALW

8.2K 8.2K

6 DOCK_SMB_CLK 39
SMBUS
5 40 DOCKING ADDRESS [C4, 72, 70, 48]
DOCK_SMB_DAT Page 39
+3.3V_ALW

100
C SIO 3 C

2'nd SMBUS
MEC5004 8.2K 8.2K 100
4 BATTERY ADDRESS [16]
Page 48

112 SBAT_SMBCLK 6
Inverter
INV SMBUS
111 SBAT_SMBDAT 5
Page 19 ADDRESS [58]
+3.3V_ALW

8.2K 8.2K

100
8 PBAT_SMBCLK 3
D
BATTERY SMBUS D

7 PBAT_SMBDAT 100 4 CONN ADDRESS [16]


Page 27
Page 48
QUANTA
9 Title
COMPUTER
SMBUS Block Diagram
SMBUS
10 CHARGER ADDRESS [12] Size Document Number R ev
DM5 1A
Page 42
Date: 星期二, 十二月 27, 2005 Sheet 50 of 59
1 2 3 4 5 6 7 8

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