Designer/PADS Layout

to
Xpedition Enterprise
Design Translation Guide

Release X-ENTP VX.2.3

May 2018

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TABLE OF CONTENTS
1 INTRODUCTION .................................................................................................................................................4
2 SOFTWARE REQUIREMENTS ...............................................................................................................................5
XPEDITION ENTERPRISE X-ENTP VX.2.3 FLOW ............................................................................................................................................... 5
3 PRE-TRANSLATION STEPS ...................................................................................................................................5
4 TRANSLATE PADS LAYOUT TO XPEDITION ...........................................................................................................6
4.1 TRANSLATE PADS LAYOUT TO HKP FILES.............................................................................................................................................. 6
4.2 CREATE A DESIGN-SPECIFIC CENTRAL LIBRARY ...................................................................................................................................... 11
4.3 IMPORT CELLS AND PADSTACKS FROM .HKP FILES TO CENTRAL LIBRARY ...................................................................................................... 12
4.4 CREATE A NEW XPEDITION PCB LAYOUT ............................................................................................................................................. 13
4.5 IMPORT HKP FILES INTO THE XPEDITION PCB DESIGN AND ENABLE CONSTRAINT MANAGER ........................................................................ 16
5 MIGRATE SYMBOLS AND PARTS IN THE DESIGN-SPECIFIC CENTRAL LIBRARY ..................................................... 19
5.1 CENTRAL LIBRARY MIGRATOR PATH ................................................................................................................................................... 19
5.2 ALTERNATIVE PATH TO CREATE DESIGN-SPECIFIC PDB ............................................................................................................................ 21
6 MIGRATE PADS DESIGNER NETLIST FLOW SCHEMATIC INTO INTEGRATED FLOW PROJECT ................................. 22
6.1 CREATE INTEGRATED FLOW PROJECT .................................................................................................................................................. 22
6.2 [IF NECESSARY] DEFINE PROPERTY MAPPING IN MAP.CFG ....................................................................................................................... 23
6.3 IMPORT NETLIST SCHEMATIC ............................................................................................................................................................ 24
6.4 VERIFY SCHEMATIC ......................................................................................................................................................................... 25
6.5 [IF NECESSARY] SUBSTITUTE SYMBOLS ................................................................................................................................................ 25
7 SYNCHRONIZE XPEDITION DESIGNER WITH XPEDITION LAYOUT ........................................................................ 27
7.1 SET UP SPECIAL COMPONENTS, BORDERS, BUS CONTENTS ..................................................................................................................... 27
7.2 PACKAGE XPEDITION DESIGNER ......................................................................................................................................................... 27
8 VALIDATION AND CLEANUP.............................................................................................................................. 37
8.1 DIAGNOSE “BROKEN BACK” TRACES .................................................................................................................................................. 37
8.2 REVIEW OPEN FANOUTS AND NETLINES .............................................................................................................................................. 38

Designer/PADS to X-ENTP VX.2.3 Design Translation Page 3

1 Introduction
This document describes the process of translating an Xpedition Designer/PADS Layout design to the
Xpedition Central Library (integrated) flow version VX.2.3. This process works for designs created using
DxDesigner 2007.9 or higher. These designs are based on the iCDB architecture, rather than OATS and
WIR files as in older DxDesigner software versions. A separate document describes how to translate older
Dx/PADS designs.

The translation process can be summarized as follows:

 Translate Dx/PADS libraries into Central Library (the process is covered in a separate translation
guidance document)
 Translate PADS layout to Xpedition Layout
 Import Xpedition Designer netlist schematic into integrated flow
 Synchronize schematic and layout

The process may include additional manual steps to fix schematic, layout or library data caused by flow
differences between Designer netlist PADS and Xpedition Central Library (integrated) flow

Designer/PADS to X-ENTP VX.2.3 Design Translation Page 4

2 Software Requirements
The following software is required to be loaded on the computer to complete the conversion process.

Xpedition Enterprise X-ENTP VX.2.3 flow

 Xpedition Designer
 Xpedition Designer Schematic translators
 Xpedition Layout
 Constraint Manager
 Library Manager

3 Pre-Translation Steps
Ensure Xpedition Designer schematic and PADS Layout are synchronized

Before beginning the translation, ensure that the Xpedition Designer schematic and PADS layout are
synchronized by doing a full “round-trip” forward- and back-annotation. This will avoid mismatches
between schematic and layout data, and minimize the effort to find any issues introduced by the
translation.

Designer/PADS to X-ENTP VX.2.3 Design Translation Page 5

4 Translate PADS Layout to Xpedition
In this step the PADS layout .pcb is converted to Xpedition layout and a design-specific Central Library is
created. The PCB is forward annotated initially using a keyin netlist created by the translator, then in a
later step the Xpedition Designer schematic is integrated with the board.

The main steps for translating a PADS layout are described below.

For more detail on running the PADS translator refer to the document PADS Layout to Xpedition Layout
Translator Guide.

4.1 Translate PADS Layout to HKP Files

The PADS PCB translator creates encrypted HKP files that can be read directly into Xpedition and
Library Manager.

4.1.1 Create a new folder to store the Xpedition layout database. Make this folder separate of
the Xpedition Designer netlist-flow schematic.

4.1.2 Using the Release Switcher, configure Xpedition Enterprise VX.2.3 as the active flow.

4.1.3 Invoke the translator from Start ►Xpedition Enterprise X-ENTP VX.2.3 (32-bit)
►PADS PCB Translator VX.2.3

4.1.4 Select PADS Layout Designs and Libraries as the source format. Click OK.

4.1.5 Click OK to close notification about the location of the default configuration file. It can be
changed later on.

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 4.1.6 Click on the ‘Designs’ tab. Browse and select the Xpedition folder to Place translated
files in.

4.1.7 Select the Add button. Browse and select the PADS .pcb design file.

4.1.8 Deselect Translate part types and decals only (without translating design).

4.1.9 Select the Update mapping button. This will scan the selected PADS file for part and
decal attributes and add their names to the [PACKAGE ATTRIBUTES] and [DECAL
ATTRIBUTES] sections of the mapping file, unless the name already exists in the section.

4.1.10 Select the Mapping tab at the top of the dialog.

This dialog is used to configure various options to optimize translation results.

Designer/PADS to X-ENTP VX.2.3 Design Translation Page 7

 4.1.11 The translator uses a default mapping unless the user saves the mapping settings to a file
for later reuse. Once saved, mapping files can be chosen from the browser provided.

4.1.12 Select the LAYERS setting for Set mapping for section.
The translator automatically maps electrical and special layers. In this step, non-electrical
and non-special layers can be converted from PADS into Xpedition layers. The PADS layer
number must be used, not the layer name. Layer numbers from the one after the bottom
electrical layer to layer 20 (or 120 in max layer mode) can be mapped. One PADS layer can
be mapped to multiple Xpedition layers. Below is the list of supported Xpedition layers
(valid names are in quotes).
 Disabled (omitted) for translation: "Disabled" or "DIS"
 Move to User layer of the same name: "User" or "USR"
 Move to Assembly Top: "AssemblyTop", "Assembly_Top", "AST" or "AT"
 Move to Assembly Bottom: "AssemblyBottom", "Assembly_Bottom", "ASB" or "AB"
 Move to Silk Screen Top: "SilkScreenTop", "SilkScreen_Top", "SOT" or "SST"
 Move to Silk Screen Bottom: "SilkScreenBottom", "SilkScreen_Bottom", "SOB" or
"SSB"
 Move to Solder Mask Top: "SolderMaskTop", "SolderMask_Top" or "SMT"
 Move to Solder Mask Bottom: "SolderMaskBottom", "SolderMask_Bottom" or
"SMB"
 Move to Solder Paste Top: "SolderPasteTop", "SolderPaste_Top" or "SPT"
 Move to Solder Paste Bottom: "SolderPasteBottom", "SolderPaste_Bottom" or "SPB"
 Move to Placement Outline on both layers (used by default): "PlacementOutline" or
"PO". This does not apply to TEXT objects.

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  Move to Placement Outline Top: "PlacementOutlineTop", "PlacementOutline_Top" or
"POT". This does not apply to TEXT objects.
 Move to Placement Outline Bottom: "PlacementOutlineBottom",
"PlacementOutline_Bottom" or "POB". This does not apply to TEXT objects.
 Move to Drill Drawing: "DrillDrawing", "Drill_Drawing" or "DD".

4.1.13 When satisfied with the mappings, return to the Designs tab.

4.1.14 Select Translate attributes.

4.1.15 Turn on Apply CAM oversizes to pads and vias. This option automatically applies the
PADS CAM rules so that the Xpedition library has the correct solder mask and paste. In
Xpedition, solder mask and paste are built into padstacks rather than being added as a
post-process in the design.
The processing controlled by this option is as follows:
 When "Apply CAM oversizes to pads and vias" checkbox is off, "CAM.Solder
mask.Adjust", "CAM.Paste mask.Adjust" and "CAM.Apply Oversize To All Pads"
attributes are not taken into consideration by the translator.
 When "Apply CAM oversizes to pads and vias" checkbox is on, all 3 above
attributes are taken into consideration the same way as in PADS in CAM preview:
o When "CAM.Apply Oversize To All Pads" is "Yes", non-existing pads on
"Solder Mask" and "Paste Mask" layers are generated according
to "CAM.Solder mask.Adjust" and "CAM.Paste mask.Adjust" attributes.
Additionally all existing pads on "Solder Mask" and "Paste Mask" layers are
expanded according to "CAM.Solder mask.Adjust" and "CAM.Paste
mask.Adjust" attributes
o When "CAM.Apply Oversize To All Pads" is "No", non existing pads on
"Solder Mask" and "Paste Mask" layers are generated according
to "CAM.Solder mask.Adjust" and "CAM.Paste mask.Adjust" attributes
but existing pads on "Solder Mask" and "Paste Mask" layers are not
expanded.
o Translator honors "CAM.Solder mask.Adjust", "CAM.Paste mask.Adjust"
attributes set on all levels in order of importance:
1. Component
2. Decal
3. Part Type
4. PCB
o Pads on Paste Mask layer are never generated in Expedition for through-hole
pins regardless of CAM settings. This is consistent with CAM preview
functionality in PADS.

4.1.16 Select Overwrite existing files. This overwrites files if writing to a location that has
previously been used.

4.1.17 Select Design Data for Output files.

Designer/PADS to X-ENTP VX.2.3 Design Translation Page 9

 4.1.18 Select Basic for Output units.

4.1.19 Select Translate.

4.1.20 Review errors, warnings, and notes. Close the dialog when done.

4.1.21 Close the translator dialog. If any mappings were modified, the following dialog will
appear.

4.1.22 If desired, select Yes, then choose a location and name for the mapping file.

4.1.23 In Windows, browse to the location where files were written and ensure that files are present
as shown below. The translator creates a folder with the name of each selected PADS
design. In the example below the PADS design was named Corporate_layout.pcb.

Designer/PADS to X-ENTP VX.2.3 Design Translation Page 10

4.2 Create a Design-Specific Central Library
In this step, a Central Library is created to store the layout specific cells translated from the PADS PCB
translator. Later this library will be updated with symbols from the translated symbol libraries and parts
(PDB entries) created from the schematic data.

4.2.1 Invoke Start ► All Programs ► Xpedition Enterprise X-ENTP V X.2.3 ► Library
Manager VX.2.3.

4.2.2 Select File ► New to create a new Xpedition Designer/ Xpedition Layout Central Library.
Browse to the location where the library is to be created. Use the “new folder” icon to
create a folder if necessary.

4.2.3 Ensure that Flow type is set to Xpedition Designer/ Xpedition Layout.

4.2.4 Click OK to create the library.

4.2.5 If your company already has an Xpedition Central Library, copy the CentLib.prp file from
the company library and paste it into the new design-specific library just created,
overwriting the default Centlib.prp file. This will help to avoid non-common properties

Designer/PADS to X-ENTP VX.2.3 Design Translation Page 11

4.3 Import cells and padstacks from .hkp files to Central Library
In this step, the cells and padstacks translated from PADS layout (in .hkp format) are imported into the
new Central Library.

4.3.1 In the design-specific library, right-click the Cells category in the Library Navigator Tree
and select New Partition.

4.3.2 Provide a name for the partition.

4.3.3 Select OK to create the partition.

4.3.4 Select Tools ►Library Services and select the Padstacks tab.

4.3.5 Select Import from option Padstack data file.

4.3.6 Click the navigate button for Import from.

4.3.7 Browse and select the padstack file (Padstack.hkp) that was created by the PADS PCB
translator.

4.3.8 Use the >> button to move all padstacks to the list to be imported.

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 4.3.9 Select Apply to import the padstacks.

4.3.10 Open Cells tab, and redo 4.3.5 - 4.3.9 steps for Cell.hkp

4.3.11 Close Library Services, and then close Library Manager.

The design-specific library now contains cells and padstacks. The parts and symbols will be added after
the library is translated by Central Library Migrator (the process is covered in a separate translation
guidance document).

4.4 Create a new Xpedition PCB Layout

In this step a new Xpedition design is created, into which the Layout HKP files will be imported.

4.4.1 Invoke Start ► All Programs ► Xpedition Enterprise X-ENTP V X.2.3 ► Layout ►
Layout VX.2.3.

4.4.2 Turn on the Message Window using View ► Message Window.

4.4.3 Select File ► New.

4.4.4 The Job Management Wizard dialog opens. A Source Project file does not exist, so a
new one must be created. Browse to the folder where the PCB file should be created and
then type in the project file name (in this example, Corporate.prj).

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 Select Next.

4.4.5 Select Yes to create the new project file

4.4.6 Choose the Central Library tab. Browse and select the design-specific library created in
the previous section. Select Apply.

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 4.4.7 Select the Netlist tab. Browse and select the Netlist.kyn file created by the translator. It is
in the folder with the rest of the HKP files created by the PADS layout translator.

Select OK, then Next

4.4.8 The Create dialog is automatically filled in with the template and other data.

At this point you must choose the Template name “Keyin NCNP”. If you choose any
other template you will encounter a problem when attempting to import the HKP files
created by the PADS translator. You will get the following error message.

For an iCDB-integrated design, the value specified for the <.PHYSICAL_LAYERS>

keyword must match the number of physical layers in the design.

4.4.9 Select Finish.

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 At this point, the Xpedition design is created from the Layout Template.

4.4.10 Select File ►Save

4.5 Import HKP Files into the Xpedition PCB Design and Enable Constraint Manager
The HKP files created by the PADS PCB translator are now imported into the empty template
design.

4.5.1 Open Xpedtion .pcb file (if not yet opened) in Xpedition Layout

4.5.2 Select File ►Import ► Design Data.

4.5.3 For Source directory, browse to the folder containing the HKP files that were created by
the PADS PCB translator.

4.5.4 Leave everything selected and select OK to import the design data.

4.5.5 Messages will appear in the Message Window if that window is opened. If the Message
Window is not opened these messages will appear as pop-up dialogs. The error below is
not a problem. Reviewing the BackAnnotation.txt file in the File ► File Viewer reveals
that the back annotation just says to forward annotate first.

If you get the error message below, you selected the wrong layout template in step 4.4.80.
You must delete the layout design and start over at step 4.4.
For an iCDB-integrated design, the value specified for the <.PHYSICAL_LAYERS>
keyword must match the number of physical layers in the design.

4.5.6 The design is imported at this point but is not displayed. Select View ► Fit Board to see
the design.

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 4.5.7 Enable Constraint Manager. Select Setup ► Project Integration.

4.5.8 Click Edit the Project File using the pencil icon.

4.5.9 Select the Netlist tab. Check the box Use Constraint Manager for constraint entry

4.5.10 The message below appears.

Select OK and exit Project Editor Interface.

4.5.11 Run Forward Annotation with the following options

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 4.5.12 Exit Project Integration.

4.5.13 File ► Save and exit Xpedition.

Designer/PADS to X-ENTP VX.2.3 Design Translation Page 18

5 Migrate symbols and parts in the design-specific Central Library
In section 4.2, a design-specific Central Library was created with cell and padstack data from the PADS
PCB translation. Next the symbols and parts (PDB) are added to this library.

5.1 Central Library Migrator path

5.1.1 The process is covered in detail in the ‘Dx-PADS to X-ENTP Library Translation Guide
VX.2.3’ process document. Particularly see sections ‘Symbol library from .prj’ and
‘Design-specific parts’ where design-specific library use case is covered.

5.1.2 Other considerations.

o Translation of PADS decal design-specific library not required in this case, because it was
translated as a part of PADS layout translation. The existing Central Library with cells
(completed in section 4.3) should be opened in the Central Library Migrator (CLMigrator)
to start the configuration.

o The input libraries for part (PDB) creation are schematic itself (.prj file) and symbol
libraries. Select Designer project .prj file as an input, so all symbol libraries and aliases are
selected automatically. File .prj selection will enable CLMigrator to create the design-
specific parts only. The schematic symbol DEVICE and PKG_TYPE property are used to
create a part in the Central Library. If symbols of the same DEVICE have different
PKG_TYPE (cell assignment), then the resulting part will have multiple cell assignment in
PDB.

o The Databook configuration is not selected, because it is not design-specific. If selected,

the translator will parse the whole database and will try to create parts accordingly. Usually
the configured symbol libraries are not design-specific, so .dbc selection will lead the full
library is translated, not a design-specific portion.

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 o Option “Create parts in single project partition’ can be unchecked or checked. It controls
how the part (PDB) are grouped in the Central Library by partitions. If it is checked, all
design-specific parts will be created in a single partition named as a schematic.

o Option ‘Use configuration file for attribute mappings’ correspond to PCB package .cfg file
which can be linked in the CLMigrator .cnv file.

o Option ‘Modify the Library’s Property Definition file’ will add the properties configured
through PCB package .cfg file to Central Library .prp file to avoid uncommon properties.

5.1.3 Local symbols

Local symbol(s), which are created in the schematic ad-hoc, should be exported from
schematic project iCDB database in the symbol library in order CLMigrator can find it and
use for the part creation. If not exported, the CLMigrator failed to create the corresponding
part and report the error that a related symbol not found.

Open Databook in the Designer, select [local symbols] in Symbol View and export local
symbol(s) in the project directory using context menu (use right-mouse button). If the
project directory is selected, the symbol is copied in .<project name>\SYM folder.

Note, that symbols which represent the hierarchical schematic blocks are also listed under
[local symbols]. They are not the PCB components by definition, so do not require be
exported in the symbol library for the part creation.

5.1.4 Heterogeneous device use case

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 Some heterogeneous part types are not fully supported by Central Library Migrator, so not
built accurately in the Central Library. They are supported in Central Library flow, but
simply not translated accurately from Netlist flow library. In this case, the CLMigrator
reports the error.

[I] Symbol 74_01 describes a heterogenous part. The device used is SN5401
[E] Heterogenous part type II is not supported Part 'SN5401' can't be created for symbol
'74_01'

[I] Symbol diff_rcvr_integ describes a heterogenous part. The device used is FIN1028M
[E]Symbol can’t be associated with part. Duplicated pin number(s) found in part
'FIN1028M' for symbol 'diff_rcvr_integ'

The part (PDB) should be fixed in the Library manually, otherwise the Packager failed.

5.2 Alternative path to create design-specific PDB

Central Library Migrator path to create design-specific PDB have certain limitations, so sometime the
better translation results can be achieved by using alternative method.

There is a utility called Advanced Library Editor (ALE) that provides a function to create part (PDB) data
from the part number, symbol(s), and cell(s) for each part used in the design. The pin mapping
information is taken from the pin numbers built into the Xpedition Designer library symbols.

Use following steps:

o Import symbol in the design-specific Central Library completed in section 4.3

o Download the “Advanced Library Editor” script from the Migration Community.
http://communities.mentor.com/mgcx/docs/DOC-2383

o Install Microsoft .NET 4 framework (free download used to run ALE)

https://www.microsoft.com/net/

o Open Central Library in ALE. At this point the library contain symbols and cells, but no
parts.

o Specify Design project file .prj and Xpedition PCB .pcb file. Click Process.
The utility should create design-specific parts in the Central Library and report the errors
if any occurred.

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6 Migrate PADS Designer Netlist Flow Schematic into Integrated Flow
Project
In this section, the PADS Designer schematic is imported into a new Xpedition Designer “integrated
flow” schematic. The new project is associated with the design-specific library. If necessary, local
symbols are replaced with Central Library symbols.

It is important that all custom properties be defined in the design-specific Central Library before the
import is done. Failing to execute the steps in section Error! Reference source not found. before
importing will result in non-common properties in the integrated-flow design.

6.1 Create Integrated Flow Project

6.1.1 Open Xpedition Designer, and set up new Xpedition Central Library project

6.1.2 Select specific template if your company has a standard template. If not, select the
default template.

6.1.3 Navigate to the design-specific Central Library and select the .lmc file for the design-
specific Central Library initially created in section 4.2, then the cells were imported in
section 4.3 and parts (PDB) and symbols were added in section 5

6.1.4 Provide a project Name and Location where the design is to reside. This should be a
folder separate of the netlist-flow Designer project and separate of the translated Xpedition
design folder.

6.1.5 Select the Create button.

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6.2 [if necessary] Define Property Mapping in map.cfg
6.2.1 The system configuration file map.cfg file can be used to map a netlist property other than
DEVICE (the default) to be the ‘Part Number’ property in Designer schematic.

o If the DEVICE property value is the correct property to use as Part Number in
Xpedition then skip this section and move to section 6.

o NOTE. The DEVICE is a default property to map ‘Part Number’ used in the
Central Library Migrator. If Central Library Migrator is used to create design-
specific Central Library, the mapping DEVICE=Part Number should not be
changed in map.cfg. Otherwise the schematic instance ‘Part Number’ may not
match the Central Library ‘Part Number’, hence Packager failed.

6.2.2 Copy the map.cfg file to the WDIR directory and edit as necessary
Moving a copy of this file to the WDIR directory protects your edits from being
overwritten when a new install is loaded. It also ensures that this edited file will be found
first by the translator since the WDIR folder is the first place that it looks for the map.cfg
file.

6.2.3 Using Windows Explorer navigate to the install location for VX.2.3. Go to <install
path>/EEVX.2.3/SDD_HOME/standard.

6.2.4 Select the map.cfg file. Using the RMB select the Copy option.

6.2.5 Navigate to the WDIR path for EEVX.2.3. The default location is C:\WDIR\EEVX.2.3.
Using the RMB select the Paste option to paste the map.cfg file in this folder.

6.2.6 Double click on the map.cfg file to open it in a text editor.

6.2.7 Edit the DEVICE property to be the netlist-flow property name that should be used as Part
Number in Xpedition. For this example, we will be using the
MANUFACTURING_BIN_NUMBER property instead of DEVICE.

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 6.2.8 Save and Exit out of the map.cfg file.

6.3 Import Netlist Schematic

The netlist-flow schematic is imported into the new project.

6.3.1 In Xpedition Designer, select File ► Import► Netlist Project.

6.3.2 Navigate to the netlist-flow .prj file, select it and then press Open.

6.3.3 Select all of the blocks in the project and then select the Open button. To select all of the
blocks, select the first block and then shift-select the last block.

6.3.4 Errors such as below may be reported.

If this occurs, the netlist-flow design must be fixed and re-imported. Open the netlist-flow
design and run Tools ► Xpedition Designer Diagnostics. It should automatically fix the
duplicate ID’s. Then re-import the netlist-flow design into the integrated-flow design.

6.3.5 Right-click the top-level block (“CorpNetlist” in this example) and select Create Board.

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 6.3.6 Confirm that the top-level schematic now appears under the Boards category.

6.4 Verify Schematic

Perform the steps below to check the integrity of the schematic.

6.4.1 Run Tools ► Diagnostics to check to Xpedition Designer database consistency. It should
not report errors. If there are errors, most can by resolved automatically by choosing the
Click here to fix all errors link.

6.5 [if necessary] Substitute Symbols

As described in section 5.1.3 the netlist-flow schematic may have local symbols. If so, the local symbols
must be replaced with the corresponding symbol from the Central Library. This is done by using the
Substitute Symbols command. If not done, the Packager could not find local symbol in the Central Library
and failed.

6.5.1 If the Databook window is not visible, turn it on with View ► Databook.

6.5.2 Select the Symbol View tab.

6.5.3 Expand the [local symbols] partition.

6.5.4 Select all of the local symbols that were exported from the netlist-flow schematic and
imported into the design-specific Central Library in section 5. Right-click on the selected
symbols and select Substitute Symbols. In this case, the “Quartz” symbol is updated
from the library.

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 6.5.5 Select Yes. The symbol from the library is used to replace the local symbol. The
Databook symbol list is updated to show the symbols in their new partitions.

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7 Synchronize Xpedition Designer with Xpedition Layout
In this section, the integrated-flow schematic and translated PCB layout are synchronized. The first step is
to package the schematic data. After packaging, a script is run to integrate the schematic with the board
and align net names and constraints. Finally the schematic is forward annotated to the board.

7.1 Set up Special Components, Borders, Bus Contents

If the project template used to create the integrated-flow project does not have all the same settings as the
netlist-flow schematic that was imported, the design must be configured properly before being packaged.
Refer to the settings in the netlist-flow design to ensure all are covered.

7.1.1 Use Setup ► Settings ► Project ►Special Components to define all the special
components used in the design.

7.1.2 Use Setup ► Settings ► Project ► Borders and Zones to define borders to match the
netlist-flow design.

7.2 Package Xpedition Designer

This is part of a normal Xpedition Designer / Xpedition design process. This step will assign PDB part
numbers (from the library) to the symbols and check for any errors in the schematic.

7.2.1 In Xpedition Designer, select Tools ► Package.

7.2.2 Enable Allow Alpha-Only Reference Designators.

7.2.3 Select Rebuild Local library data; Preserve locally built data.

7.2.4 Select OK to package.

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 A successful schematic package will end with the following in the output window:

7.2.5 Verify in the Output window that the Packager finished successfully.

7.2.6 Resolve Packager Errors

Sometimes Packager will not complete successfully. The following is only guidance and is not a complete
list of packager errors and solutions. Please refer to SupportNet for more information on errors not
described here.
o Missing Part Number

 There is no Part Number: <###> in the Parts DataBase for symbols with Part Name:
(null) and Part Label: (null). Please add the Part Number to the PDB either
directly or by having the project file point to a PDB that contains it.

This error means either the Part Number defined on the symbol does not exist in the
Central Library or the Part Name and/or Part Label on the schematic symbol do not match
the Part Name or Part Label defined in the PDB for that Part Number. To remedy the
problem, do one of the following:
 Replace the device on the schematic using Component Replace.
 Edit the properties on the schematic symbol to match the Part definition.
 Edit the part definition to match the schematic symbol properties.
 Delete the symbol/device from the schematic and then Place Device again.

If the Part Numbers in question are known to exist in the Central Library and Name/Label
match, then the PDB partitions that contain the Part Numbers may not be available to the
Packager. To fix this, correct the search path scheme in Library Manager.

o Inconsistent PDB data

If some of the PDB not built correctly, the Packager report the errors. This could
be related to the issue discussed in section 5.1.4

7.3 Synchronize Xpedition Designer/xPCB Layout/Constraint Manager

Design constraints are created in Xpedition Layout during translation. These constraints need to be
copied from the Layout to Xpedition Designer before the first forward annotation can occur. During
this process, the program reconciles any differences between net names and stack-up information
found in Xpedition Designer and in Xpedition Layout.

7.3.1 Ensure neither Xpedition Designer nor Xpedition Layout are running.

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 7.3.2 Invoke Synch Migrated Designs VX.2.3 from Xpedition install menu

7.3.3 For Migrated Design Project File, browse to the integrated-flow schematic .prj file.

7.3.4 For Migrated Design PCB, browse to the Xpedition Layout .pcb file translated in the earlier
steps.

7.3.5 Enable Import PCB Constraints to Schematic.

7.3.6 Press OK to execute the program.

7.3.7 Select OK to close the window.

7.3.8 Review the message that appears. The log file is stored in the PCB layout log files directory
<netlist driven PCB project>\PCB\LogFiles\SyncMigratedDesigns.txt

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 It is common to see error message about single pin nets in most PADS designs. In PADS
there may be pins connecting to a net that has no connection on the other end. This is
considered a valid net in Xpedition Designer for Xpedition and thus are expected to be in
the CES data. Such nets are not in CES because the layout sees them as single pin nets and
thus they have become Net-0 in the layout and do not appear in the CES data.

7.3.9 Open Xpedition Designer and disconnect these pins from the nets to which they are
connected. They can be reconnected after the design is synchronized.
Open the schematic in Xpedition Designer.

7.3.10 Use the Search toolbar to locate the device by using the Reference Designator.

7.3.11 There are multiple ways to disconnect the component pin from the net.
o Use Cut Nets command.
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 o Alternatively, use Disconnect command

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 7.3.12 Repeat this for each pin that is listed in the SyncMigratedDesigns.txt report.

7.3.13 Exit Xpedition Designer.

7.3.14 Re-run the Sync Migrated Design script. If there are additional errors then they will need to
be edited as well. Sometimes not all of the errors are reported at one time.

7.3.15 Once you see the above pop-up message then the design is synchronized.

7.3.16 Select the OK button to close the window.

7.3.17 Copy the synced PCB folder into the Xpedition Designer project folder.

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 7.3.18 Open the PCB in Xpedition layout.

7.3.19 Select the YES button to select the Xpedition Designer project file.

7.3.20 Select the Open button.

7.3.21 Select the OK button.

7.3.22 Select the OK button if this message appears.

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 7.3.23 Select the Yes button to run Forward Annotation.

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 7.3.24 Select the Rebuild local library data; preserve locally built data option.

7.3.25 Set the Allow Alpha-only reference designators option.

7.3.26 Un-select the Trace removal options.

7.3.27 Select the yellow button next to the Forward Annotation Required option.

7.3.28 Verify that Forward Annotation has completed without errors.

7.3.29 Close the Forward Annotation window.

7.3.30 Save the design in Xpedition layout.

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 7.3.31 If necessary, open Xpedition Designer and re-connect any connections that were previously
disconnected in the steps earlier in this section.

7.3.32 Package the schematic.

7.3.33 If there are no errors then close Xpedition Designer.

7.3.34 Run Forward Annotation in Xpedition layout.

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8 Validation and Cleanup
Now that the design is synchronized (schematic and PCB), review the project for correctness and
completeness in the following areas:
 Broken traces
 Open Fanouts and Netlines
 Xpedition Text Fonts
 Unnecessary User Layers
 Missing silkscreen
 Adding/Growing/Shrinking Soldermask and Solderpaste on Padstacks

8.1 Diagnose “Broken Back” Traces

If the Forward Annotation log lists broken back traces, the schematic and board do not match in some
way. To explain what is happening, the location of each broken back trace will be displayed in the
forward annotation log.

No matter what unit the design was created in, the Forward Annotation log file lists coordinates of broken-
back traces in generic Database Units (DBU). Since the display units in Xpedition cannot be set to DBU,
the automation script BrokeBackTraces.efm helps to diagnose broken back trace problems. This script is
available on the Mentor Migration Community at the link below.

8.1.1 Download the script from the Community and store in any location.

http://communities.mentor.com/docs/DOC-1933

8.1.2 From within Xpedition, select File ► Open Script Form.

8.1.3 Browse to and select BrokeBackTraces.efm where it was saved locally.

8.1.4 Select Open.

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 8.1.5 Once the script is open, there are two options.
 Auto Populate User Layer: While reading the forward annotation list, the script will
populate a user layer called “Broken Back Traces” with “X” where the center of the
“X” is where the broken back trace is located.
 Populate User Layer During Cross Probe: Populates the user layer “Broken Back
Traces” with only the coordinates selected by double-clicking.

8.1.6 Select Report to populate the list with broken trace locations.

8.1.7 After the list has been populated, double-click any coordinate to zoom into the area of the
broken back trace.

8.2 Review Open Fanouts and Netlines

On occasion, net names are changed by the translators. If a plane is associated with a net that changes
names, this may cause the plane shape to become Net0 and disconnect from the pins. This will results in
open net hazards.

8.2.1 Select Analysis ► Review Hazards.

8.2.2 Select the “#” icon (bottom left hand corner) to update the Review Hazards dialog

8.2.3 Select Online.

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 8.2.4 Review the Open Fanouts and the Open Netlines section for any hazards.

In the case that the net name associated to a plane shape has changed or been removed, the plane will need
to be corrected manually.

This completes the translation, synchronization and cleanup process.

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