Toshiba V Seires Pulse Input Module User's Manual PDF

6F8C0841
model 2000
Pulse Input Module User's Manual
Safety Precautions
This manual contains important information for the operator to operate this product safely and correctly
and avoid bodily injury and property damage.
Grasp the meanings of the following marks and their descriptions before reading this manual.
● Hazard Classifications
Indicates a potentially hazardous situation which, if not avoided,

WARNING could result in serious injury or death.
Indicates a potentially hazardous situation which, if not avoided, can

CAUTION result in minor or moderate injury, or property damage. It can also be
used to alert against unsafe practices.
(Note) 1. Serious injury means loss of sight, injury, burns (high temperature, low temperature), electrical
shock, fracture, or intoxication which leaves aftereffects or requires hospitalization or need to
go the hospital for a long time.
2. Injury means hurt, burn, or electrical shock which does not require hospitalization or going to
the hospital for long time.
3. Property damage means extended breakdown of assets and materials.
● Notation of Markings
Indicates a "may not" mark.

The concrete forbiddance is indicated with a pictograph or wording.
Indicate a mandatory action that you should never fail to do.

The concrete content is indicated inside or near the circle with a pictograph or
wording.
Indicates a caution.
The concrete content is indicated inside or near the triangle.
(Note) The descriptions of forbiddance, mandatory, and caution marks are subject to change, depending
on the labels on the main unit.
6F8C0841
i
1. Markings used on the model 2000 and in this Manual
Make sure warning markings are attached on the model 2000.
If any of them are missing or the wording is illegible, contact Toshiba’s Service Department.
【Warning Mark on the model 2000】

This is the warning mark for dangerous locations. It is attached to the equipment at posi-
!
tions where there is a risk of electric shock and at positions where there is a risk of damage
to the equipment through incorrect wiring.
Take the following precautions where this marks is found.
(1) Keep hands away from terminals, especially the input terminal of the power supply while power is
on, to avoid the risk of electric shock.
(2) Turn off power before installing or removing modules, terminal blocks, or wires.
(3) Applying excess power voltage to the model 2000 can cause failure or malfunction. Apply power of
the specified ratings described in this manual.
(4) Turn off the power of your programmer (personal computer, etc.) before connecting the connector to
the programmer port. Afterwards, turn on power.
The safety label as shown on the left both in Japanese and English
is attached to the power supply terminal of the model 2000 (except
the 24Vdc input power supply module)
Remove the mount paper before wiring.
Peel off either of the Japanese and English labels from the mount
paper and stick it to the model 2000 or near the power terminal
where it can be readily seen.
In the event the seal is damaged, contact the dealer.
NOTE
Marks printed at pages in this manual should always be read carefully.
Be sure to read them in handling your model 2000.
ii model 2000 PULSE INPUT MODULE(PI632/672)

2. Precautions on Installation
WARNING
Mandatory
Be sure to ground the model 2000. The protective
ground terminal of the model 2000 must be
connected to an external protective earth.
Operation without grounding may cause
accidental fire or shock.
CAUTION
Mandatory Mandatory
Avoid the following locations when installing or Install the model 2000 at a place where
storaging the model 2000. maintenance and inspection are easy to do.
• Locations where there is dust, salinity or ion Otherwise, recovery from failure may take
particles much more time, leading to serious accidents.
• Locations where there are corrosive gases
(SO2, H2s) or flammable gases
• Locations where vibration or shock occurs
beyond the allowance
• Locations where there is condensation due Forbidden
to sharp temperature variations Do not cover the hole of the model 2000, and
• Locations where the ambient temperature the ventilator/air inlet of the system.
exceeds the allowance range Otherwise, malfunction such as overheating, can
• Locations where the relative humidity cause fire or malfunction.
exceeds the allowance range
• Locations where the model 2000 is exposed
to direct sunlight
• Locations where strong electric radiation or
magnetic field is generated
Mandatory
Avoid entering wire scraps or other foreign
debris into the model 2000 and related
equipment. Otherwise, it can cause fire, failure
Mandatory or malfunction.
Improper installation or wiring of the system
can cause not only insufficient performance
but also malfunction and failure of the model
2000.
Installation in an unspecified direction or
improper installation can cause fall-off, fire,
interference, or malfunction of the model 2000.
6F8C0841
iii
3. Precautions on Wiring
WARNING
Mandatory Mandatory
Be sure to turn off power before wiring. Be sure to use a crimp-style terminal with
Otherwise, it can cause electric shock or insulating sheath or insulating tape to cover
malfunction of the model 2000. the conductive parts when wiring modules so
that no conductive are exposed.
Handle the terminal cover with care so as not
to fall off or get damaged.
Be sure to fix the cover on the terminal block
after wiring.
An exposed conductive part can cause electrical
shock.
CAUTION
Mandatory Mandatory
Apply power of the specified ratings described It is assumed that the users have general
in the manual. knowledge of industrial electrical control
Applying excess power voltage to the model systems.
2000 can cause explosion or fire.
iv model 2000 PULSE INPUT MODULE(PI632/672)

4. Precautions for Operation
WARNING
Mandatory Mandatory
Configure emergency stop interlocking circuit Be sure to keep the terminal block covers
outside the model 2000. Otherwise, failure or closed during power ON.
malfunction of the model 2000 can cause Do not touch the terminals. Otherwise, it can
human injury, machine damage or serious cause electrical shock or injury.
accidents.
CAUTION
Forbidden Mandatory
The power supply modules, the CPU modules, When you attempt to change a program, forced
the direct I/O modules and the expansion output, RUN/HALT controls, etc. during operation,
interface are dedicated to the model 2000. be careful to operate the system for your safety.
Mount them on the bases of the model 2000. Improper operation or negligence in checking
Do not use them by themselves for other safety conditions can cause machine damage or
purposes. Otherwise, it can cause electrical serious accidents.
shock or injury or malfunction.
Mandatory
Mandatory Set the operating switches of the model 2000
Mount the modules on the base securely until according to this manual.
they click, and fix them on the base with screws. Improper setting can cause failure or malfunction.
Insufficient installation can cause failure or
malfunction.
Mandatory
Mandatory Install fuses suited to the load current capacity
Sample programs and circuits described in this in the external circuits for the relay output
manual are provided for explaining the module, preventing from overload.
operations and applications of the S2. Otherwise it can cause machine damage or
You should test completely before using them accidents.
as a part of your application system.
6F8C0841
v
Mandatory Forbidden
Configure the external circuit to turn on power Turn off power immediately if the model 2000
according to the following sequence. or related equipment emitting smoke or odor.
　Turn on the power of the model 2000 Operation under such situation can cause fire
　　
→ Turn on the power for the I/O module and or electrical shock. Also unauthorized repairing
external load power supplies. will cause fire or serious accidents.
Otherwise, it can cause machine damage, Do not attempt to repair. Contact Toshiba for
malfunction or accidents. repairing.
Mandatory
It is recommended to use an external power
supply that provides power for both the I/O
module and the loads. If not possible, configure
the external circuit so that the external power
required for output modules and power to the
loads are switched ON/OFF simultaneously.
Also, be sure to turn off power to the loads before
turning off power to the model 2000 for system safety.
5. Safety Precautions on Maintenance and Inspection
WARNING
Mandatory Forbidden
Turn off power when removing any units, Do not disassemble or modify the model 2000
modules, terminal blocks or wired cables after and related equipment in hardware nor
installing. Otherwise exposed conductive parts software. Otherwise it can cause failure,
of the wire or on the rear of terminal blocks can malfunction, electrical shock or injury.
cause electrical shock.
Forbidden
Be sure not to connect the opposite electrode of
the battery or charge the battery.
Also, do not try to disassemble the battery or
make it short-circuited or throw it into fire or use it
in overheated condition. Otherwise it can cause
fire or explosion.
vi model 2000 PULSE INPUT MODULE(PI632/672)

CAUTION
Forbidden Mandatory
Be careful not to hit or fall off the model 2000 Place any modules removed from the unit on a
by accident. conductive mat or conductive bag (containing
Excess shock can cause failure. a spare board, etc.) on a grounded desk.
Otherwise, static electricity can damage
components of the module
Mandatory
Touch a grounded metal part to discharge the
static electricity on your body before touching
the model 2000.
Otherwise charged static electricity on your
body can cause malfunction or failure.
Mandatory Forbidden
Use soft cloth to clean the model 2000. Do not apply benzene and thinner when
Use water-dipped and squeezed cloth to clean cleaning the model 2000.
it if dirty. Otherwise, it can cause deformity or
Leaving the model 2000 dirty can cause descoloration with the panel or cause of the
mistaking or malfunction. model 2000.
6. Safety Precautions on Replacing Components

WARNING
Mandatory Mandatory
Turn off the power of the model 2000 before Replace the fuse or battery with a new one
replacing the power fuse or warning fuse. specified.
Otherwise, it can cause electrical shock or fire. Otherwise, it may malfunction or cause fire.
6F8C0841
vii
7. Safety Precautions in Daily OperationL
WARNING
Mandatory Mandatory
Apply power of the specified ratings (voltage Turn off power immediately if the ambient
fluctuation range, frequency, output rating, temperature or internal temperature exceeds
etc.) described in this manual. beyond normal range or if failure has occurred
Otherwise, it can cause malfunction, machine in the model 2000.
damage, or fire due to overheat. Contact Toshiba for repairing. Operation under
such situation can cause fire or electrical shock.
CAUTION
Forbidden Forbidden
Do not touch any components, terminals, Do not forcibly bend or pull or distort the power
connectors or printed circuit boards in the module. cord and other cables. Otherwise, they can be
Otherwise, it can cause the IC or LSI or the like cut off or cause overheat.
to be broken by static electricity, resulting in
failure or malfunction. Also, the edge of
components can cause injury.
Forbidden Forbidden
Do not disassemble or modify the model 2000 Do not enter wire scraps or other foreign debris
and related equipment. into the model 2000 and related equipment.
Otherwise, it can cause malfunction or failure. Also, do not insert metal parts into them.
They can cause fire or accidents.
viii model 2000 PULSE INPUT MODULE(PI632/672)

8. Safety Precautions on Disposal
WARNING CAUTION
Forbidden Mandatory
Do not throw lithium batteries into fire. Observe the local regulations for disposal of the
Otherwise, they can explode. lithium batteries and the model 2000.
6F8C0841
ix
Limitations of Applications
■ The model 2000 has been designed and manufactured for use in an industrial environment.
However, the model 2000 is not intended to be used for systems which can endanger human life
(note 1).
■ Consult Toshiba if you intend to use the model 2000 for a special application which involves human
life and has great influence on the maintenance of the public function (note 2). This is why such
application requires special care on the operation, maintenance, and control of the system (note 3).
Note 1: The systems which can endanger human life are life maintenance systems, equipment
installed in the surgery, and other medical equipment.
Note 2: The systems which involve human life and have great influence on the maintenance of the
public function mean the main control system of a nuclear power plant, safety and protection
system of a nuclear power facility, transport operation and control systems for mass transpor-
tation, control systems of aviation and space systems, and other systems and subsystems
where safety is critical.
Note 3: "Special care" means to build a safety system (foolproof design, fail safe design, redundancy
design, etc.) in full consultation with Toshiba’s engineers.
Immunity
■ Toshiba is not liable for any loss caused by firer, earthquake, action by a third party, or other
accidents, or the operator’s intentional or accidental misuse, incorrect use, or use under abnormal
condition.
■ Toshiba is not liable for any incidental loss caused by the use or non-use of this product, such as
loss of business profits, suspension of business, or loss or change of data on memory.
■ Toshiba is not liable for the loss caused by an operation contradictory to any of the instructions
stated in this manual.
■ Toshiba is not liable for the loss caused by an incorrect operation in combination with other
equipment.
■ In no case Toshiba Corporation is liable for the damage stemming from the malfunction caused by
the combination with an application program made by the user, or caused by sample programs, in
this document, applied to the user’s system.
Note
Use cellular phones and PHSs at least one meter away from the working model 2000 transmission
cables, and I/O bus cable. Otherwise, the system can malfunction.
x model 2000 PULSE INPUT MODULE(PI632/672)

Introduction
This user’s manual describes an overview of the functions and operating methods of pulse input module
PI632/672 of Toshiba’s Integrated Controller Vseries model 2000 (hereafter referred to as "model 2000").
Read this manual carefully before using your PI632/672 module.
How to handle your PI632/672 module varies depending on the controller you use, Chapter 8 describes
such differences. To use this manual, follow either of the cases stated below:
・ When using an S2T controller:

See the chapters other than Chapter 8.
・ When using an controller other than an S2T (namely an S2 / L2):

① Read the opening part of this manual.
② Read chapter 8 and make sure the difference from the S2T.
③ Read chapters 1 through 7 of this manual while keeping in mind the contents of Chapter 8.
6F8C0841
xi
xii model 2000 PULSE INPUT MODULE(PI632/672)
CONTENTS
Chapt1 PI632/672 Overview. . . . . . . . . . . . . . 1
1.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.2 Operation mode overview. . . . . . . . . . . . . . . . . . . . . . . . . 2
1.3 External features. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Chapt2 Specifications. . . . . . . . . . . . . . . . . . 13
2.1 General specifications . . . . . . . . . . . . . . . . . . . . . . . . . . 13
2.2 Functional specifications. . . . . . . . . . . . . . . . . . . . . . . . . 13
2.3 Input/output specifications . . . . . . . . . . . . . . . . . . . . . . . 14
2.4 Input/output internal circuit . . . . . . . . . . . . . . . . . . . . . . . 16
Chapt3 Wiring. . . . . . . . . . . . . . . . . . . . . . . . 19
3.1 Connector pin assignment . . . . . . . . . . . . . . . . . . . . . . . 19
3.2 Signal connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
3.3 Wiring precautions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Chapt4 Register Configuration . . . . . . . . . . . 27

4.1 I/O allocation and I/O registers . . . . . . . . . . . . . . . . . . . . 27
4.2 PI632/672 expansion memory . . . . . . . . . . . . . . . . . . . . 29
Chapt5 Operation Mode Setting . . . . . . . . . . 37

5.1 Mode setting overview . . . . . . . . . . . . . . . . . . . . . . . . . . 37
5.2 Operation mode register setting . . . . . . . . . . . . . . . . . . . 38
Chapt6 Function Details . . . . . . . . . . . . . . . . 41

6.1 Quadrature bi-pulse counter mode . . . . . . . . . . . . . . . . . 41
6.2 Up/down pulse counter mode . . . . . . . . . . . . . . . . . . . . . 44
6.3 Auto-reset universal counter mode. . . . . . . . . . . . . . . . . 47
6.4 Universal counter mode . . . . . . . . . . . . . . . . . . . . . . . . . 49
6.5 Speed counter mode . . . . . . . . . . . . . . . . . . . . . . . . . . . 51
6.6 Programmable interval timer mode. . . . . . . . . . . . . . . . . 53
xiii 　model 2000 PULSE INPUT MODULE (PI632/PI672)

CONTENTS
6.7 Gate-ON timer mode . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
Chapt7 SAMPLE PROGRAMS . . . . . . . . . . 57

7.1 Setting an operation mode57
7.2 Writing Data on the Command Register. . . . . . . . . . . . . 58
7.3 Setting Preset Value Data for Comparison. . . . . . . . . . . 59
7.4 Reading the Count Value . . . . . . . . . . . . . . . . . . . . . . . . 60
7.5 Reading the Hold Value . . . . . . . . . . . . . . . . . . . . . . . . . 60
Chapt8 When Using a Non-S2T Controller . 61

8.1 The Differences . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61
8.2 I/O Module Registration and I/O Registers. . . . . . . . . . . 62
8.3 Expansion Memory. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65
8.4 Sample Program. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67
Chapt9 Appendix . . . . . . . . . . . . . . . . . . . . . 73
A.1 Specification of the READ instruction. . . . . . . . . . . . . . . 73
A.2 Specification of the WRITE instruction . . . . . . . . . . . . . . 75
A.3 Details of the MREAD Command . . . . . . . . . . . . . . . . . . 77
A.4 Details of the MREAD Command . . . . . . . . . . . . . . . . . . 80
6F8C0841 xiv
Chapter 1 PI632/672 Overview
1.1 Introduction
The pulse input module PI632/672 is a high-speed pulse counter module for Toshiba’s
Integrated Controller V series model 2000.
The PI632/672 has 2 channels of pulse inputs, channel 1 (CH1) and channel 2 (CH2),
and can count up to 100 kpps pulses individually for each channel. (max. 50 kpps in
quadrature bi-pulse counter mode)
The PI632 and PI672 are different in the pulse input circuits as follows.
PI632 Voltage input 5 Vdc, 12 Vdc, or 24 Vdc (Selectable)

PI672 Line receiver input Conform to RS-422-A
Except the pulse input circuit, there is no functional difference between PI632 and PI672.
The PI632/672 has total 7 operation modes as listed below.
(1) Quadrature bi-pulse counter mode

(2) Up/down pulse counter mode
(3) Auto-reset universal counter mode
(4) Universal counter mode
(5) Speed counter mode
(6) Programmable interval timer mode
(7) Gate-ON timer mode
In the above (1) through (5) modes, the PI632/672 counts external pulses. In the (6) and
(7) modes, the PI632/672 counts its internal clock pulses, resulting it functions as timer.
These (1) through (7) modes can be set individually for channel 1 and channel 2.
The interrupt function can be active by setting the interrupt request flag to "1".
The interrupt vector is generated from the pulse input module when the present value
counts up to the preset value in all the operation mode.
6F8C0841 1
Chapter1 　PI632/672 Overview
NOTE
(1) The mode settings should be properly alone. Otherwise the PI632/672 will not work as
expected.
(2) The S2T CPU module can support the following number of the PI232/272 modules.
a) max. 4 modules : using the interrupt function
b) any number modules depending in system configuration : not using the interrupt function
Refer to Chapter 8 regarding with the other controllers except the S2T.
(3) The internal current consumption is shown as below. The total current consumption of con-
figured modules in one unit must be below the maximum output rating of the power supply
module.
(4) The interrupt function can be active only installing the PI232/272 on the basic unit.
1.2 Operation mode overview
1 This section outlines the PI632/672’s operation modes. Read this section to get basic
understanding of the operation modes.
1.2.1 Counter operation mode

PI632/672 counts the pulses whose phases are shifted 90° each other. When phase A
pulse precedes against phase B pulse, the PI632/672 counts up (increase). On the other
hand, when phase B pulse precedes, the PI632/672 counts down (decrease).
The counter works as a ring counter with the data range of 0 to 16777215.
When the count value is increased by 1 in the upper limit value (16777215), it is reset to
0. When the count value is decreased by 1 in the lower limit value (0), it is reset to the
upper limit value (16777215).
Two points of comparison values can be set. These are called "set-point-1" and
"set-point-2".
When the count value is greater than the set-point-1, the PI632/672’s hardware
comparison output (*S1) comes ON. When the count value is smaller than the set-point-
2, the PI632/672’s hardware comparison output (*S2) comes ON.
NOTE) The asterisk (*) in the above paragraph represents 1 or 2. 1S1 and 1S2 are the
outputs for channel 1, and 2S1 and 2S2 are the outputs for channel 2.
When the inteurupt reguest request flag is set to "1", the inteurpt function is actiue. The
interurupt vector is genesated in the time when the present values coumts up to the value
of set-poind-1 on when the present value cownts down to the value of set-point-2.
2 　model 2000 PULSE INPUT MODULE (PI632/PI672)

Pulse form (time chart)
90°
Phase A
Counting up (increase)
Phase B
Phase A
Counting down (decrease)
Phase B
NOTE
User can exchange the function of phases A and B. The above time-chart shows the
default condition. For this setting, refer to section 5.
1
Counter operation
16777215
Set-point-1
Count value
Set-point-2
Interrupt
*S1
*S2
6F8C0841 3
PI632/672 counts up (increase) by the pulses of phase A, and counts down (decrease)
by the pulses of phase B.
All other functions are the same as that of (1) Quadrature bi-pulse counter mode.
When the interupt sequest flag is set to "1", the interupt function is actiue. The inteiupt
vector is generated is the time when the present value counts up to the value of set-point-1
on when the present value counts down to the velue of set-point-2.
The comparison output S1 holds "1" dwing the present value is over the value of set-
point-1. The comparison output S2 holds "1" dwing the present value is below the value
of set-point-2.
UP-pulse (phase A)
1 DOWN-pulse (phase B)
Count value
set-point-1 (upper limit)
set-point-2 (lower limit)
Interrupt
＊＊S1
S1
＊＊S2
S2
NOTE
You can exchange the function of phases A and B. The above time-chart shows the
default condition. For this setting, refer to section 5.


[Interrupt Action]
• Interrupt Reguest Flag should be set to 1.
• The counter value is egual to the value of set-point-1, generating interrution.
[Cownter Action]
• This mode perfroms to count single-phase pulses of phase A.
• The caunter value sesets to 0 when it is equal to the value of set-point-1.
• The value of set-point-1 : 1 to 16777215
<Apptication Hint>
• The interrpt action can be used as the constant times interrpt when the palse freguenoy
is constant.
P hase A
S et-point-1
1
Count value
Interrupt

[Interrupt Actin]
• Interrupt Reguest Flag should be set to1.
• The coumter value is equal to the valne of set-point-1, generating interrution.
[Counter Action]
• This mode performs to coumt single-phase pulses of phase A.
• The coumtor value resets to 0 when it coumts up to the upper bnit value (16777215).
<Application Hint >
• The compauion autput S1 is available in this mode.
16777215
Set-point-1
Count value
Interrupt
*S1
6F8C0841 5
[Interrupt Action]
• Interrupt Request Flag should be set to 1.
• The counter value is equal to the value of set-point-1, generating interruption.
[Counter Action]
• This mode performs to count single-phase pulses of phone A during the specified
sampling time.
• The counter value is transfered to the hold register assigned in the expansion
memory every sampling time.
• The sampling time can be selected one of three units (0.01, 0.1 or 1 second).
<Application Hint>
• The frequency of the pulses can be measured by using this mode.
• The comparison output S1 is available in this mode.
∆T ∆T ∆T ∆T ∆T
1 d
Set-point-1
a c
b
Count value e
a c
b
Hold value e
Interrupt
*S1
∆T: sampling time = 0.01s, 0.1s, or 1 s

[Interrupt Action]
• The counter value is equal to the value of set-point-1, generating interruption.
[Counter Action]
• This mode performs to count internal clock pulse in place of external pulses.
• The counter value resets to 0 when it is equal to the value of set-point-1.
• The value of set-point-1 : 1 to 16777215
• The internal clock frequency can be selected one of three values(1k, 10k or
100kHz).

<Application Hint>
• The operation in this mode, that is, is free-running timer.
• The precise time base control is possible by using this mode.
S e t- p o in t- 1
C o u n t v a lu e
0
I n te r ru p t
ｔｔｔ
t＝
　　　　　 Preset value 1
　　 Internal reference pulse frequency (Hz)

[Interrupt Action]
• The counter value is equal to the value of set-point-1, generating interruption. 1
[Counter Action]
• This mode performs to count internal clock pulse during the external gate signal is ON.
• The counter value resets to 0 when the external gate signal times OFF to ON.
• The counter value is hold when external gate signal times ON to OFF, and it is trans-
ferred to the hold register assigned in the expansion memory.
• The internal clock frequency can be selected one of three value (1k, 10k or 100kHz).
<Application Hint>
• The ON duration of the external gate signal can be measured by using this mode.
• The comparison output S1 is available in this mode.
Gate signal
Upper limit (16777215)

b
Set-point-1
c
Count value
a
0
Hold value
a
Interrupt
*S1
6F8C0841 7
1.2.2 Pulse count mode
The PI632/672 has 2 modes for pulse counting. They are the normal count mode and the
precision count mode.
In the normal count mode, the PI632/672 counts at either rising or falling edge of the
pulse. On the other hand, in the precision count mode, the PI632/672 counts at both
rising and falling edges. See the timing diagram below.
The pulse count mode can be selected individually for channel 1 and channel 2.
Quadrature bi-pulse counter mode:
<Normal count mode>
Phase A
Phase B
1
Count up Count down
<Precision count mode>
Phase A
Phase B
Count up Count down
Other than the quadrature bi-pulse counter mode:
<Normal count mode>

Phase A/B
or internal clock
Count
<Precision count mode>

Phase A/B
or internal clock
Count

1.3 External features
＜ PI672 ＞＜ PI632 ＞
Drodnet ID
Statns display
Input voltage setting DIP
LEDs
switches (W1-8)
Right side surface
External
connector
Input specification
Protection seal
Connector on the cable side
connection cable
135
137
115
169
! CAUTION
(1) To avoid electric shock, or fire or malfunction or failure due to foreign matters entered by
chance, make sure to stick the accompanying protection seal after setting an input voltage
with the DIP switches.
(2) The connector for the cable (soldering type) is a standard accessory.
6F8C0841 9
Status LEDs
Indicates the PI632/672 operation status. Six LEDs are provided for each channel.
A Lit when the phase A pulse input is ON (see Note 1)

B Lit when the phase B pulse input is ON
G Lit when both the gate input and the soft-gate are ON (see Note 2)
EXT Lit when the external limit input (EXT) is ON
S1 Lit when the comparison output (*S1) is ON
S2 Lit when the comparison output (*S2) is ON
NOTE
(1) In the programmable interval timer and the gate ON timer modes, this LED is controlled by
the internal clock.
(2) For the soft-gate, refer to section 4.1.
1 DIP switches
• Input voltage setting switch (only for the PI632)
The DIP switches W1 to W8 are prouided onlg on the PI632 to select the input valtage
either 12 or 24Vdc. For 5Vde input, it is seleeted by connection terminal.
Make sure to cover the hole iuith aprotection seal after setting the DIP switches.
input voltage selection (PI632 alone)
Setting
Function 12 Vdc 24 Vdc
side side
DIP switches W1 Channel 1, phase A 12 Vdc 24 Vdc
W1 through W8
W2 Channel 1, phase B 12 Vdc 24 Vdc
W3 Channel 1, phase M 12 Vdc 24 Vdc
12V 24V
Wn W4 Channel 2, phase A 12 Vdc 24 Vdc
W5 Channel 2, phase B 12 Vdc 24 Vdc
W6 Channel 2, phase M 12 Vdc 24 Vdc
Protection seal W7 Channel 1 gate 12 Vdc 24 Vdc
W8 Channel 2 gate 12 Vdc 24 Vdc
WARNING
(1) Make sure to cover the hole after setting an input voltage with DIP switches. This aims to
avoid electrical shock, fire, or malfunction or failure to be caused by foreign matters entered
by accident.
(2) The DIP switches are set to the 12 Vdc side at factory. Use a pair of tweezers or the like
when setting the DIP switches.

External connector
One 40-pin connector (female) is provided for connecting the external signals.
< PI632 >
Pin No.
Function Name A B Name Function
Channel 1 Phase A input 1A5 1 1 1AP
Channel 1 Phase A input
1BP 2 2 1A12
Channel 1 Phase B input
1B12 3 3 1B5 Channel 1 Phase B input
1MP 4 4 1M5 Channel 1 Maker input
Channel 1 Maker input
1M12 5 5 2AP
Channel 2 Phase A input 2A5 6 6 2A12
2BP 7 7 2B5 Channel 2 Phase B input
2B12 8 8 2MP
Channel 2 Maker input 2M5 9 9 2M12
Channel 1 Gate input

1GP 10 10 1G5 Channel 1 Gate input 1
1G12 11 11 2GP
Channel 2 Gate input 2G5 12 12 2G12
Channel 1 External limit input 1EXT- 13 13 1EXT+ Channel 1 External limit input
Channel 1 Compare output 2 1S2 15 15 1S1 Channel 1 Compare output 1
No use 17 17 No use
24 Vdc input P24 18 18 P24 24 Vdc input
0 V for compare outputs N24 19 19 N24 0 V for compare outputs
No use 20 20 No use
Remarks
For phase A, B, zero maker and gate input, the signal name means as follows.
1AP
P ….. + voltage input (24, 12 or 5 Vdc)
5 ….. 0 V terminal for 5 Vdc input
12 … 0 V termanal for 12 or 24 Vdc input
A, B, M or G … Signal type
1 or 2 … Channel 1 or channel 2
NOTE
(1) Internal circuit for phase A, B, M, G and EXT input are isolated each other.
(2) For external wiring, refer to section 3.
6F8C0841 11
< PI672 >
Pin No.

Channel 1 Phase A + 1A+ 1 1 1A- Channel 1 Phase A -
Channel 1 Phase B + 1B+ 2 2 1B- Channel 1 Phase B -
Channel 1 Maker + 1M+ 3 3 1M- Channel 1 Maker -
Line receiver signal ground SG 7 7 SG Line receiver signal ground
Channel 1 Gate input 1G24 8 8 1G12 Channel 1 Gate input
1GP 9 9 2GP Channel 2 Gate input
No use 11 11 No use
1 Channel 1 Extermal limit input 1EXT- 12 12 1EXT+ Channel 1 External limit input
No use 14 14 No use
No use 17 17 No use
24 Vdc input P24 18 18 P24 24 Vdc input
No use 20 20 No use
Remarks
For gate input, the signal name means as follows.
1GP
P ….. + voltage input (24 or 12 Vdc)
12 ... 0 V terminal for 12 Vdc input
24 … 0 V termanal for 24 Vdc input
G … Gate input
NOTE
(1) Phase A, B and M inputs conform to EIA RS-422-A. (Am26LS31 or equivalent)
(2) For external wiring, refer to section 3.

Chapter 2 Specifications
2.1 General specifications
Item PI632 PI672 Remarks

Power voltage 5 Vdc (supplied from back plane bus)
Current consumption Max. 500 mA (5 Vdc) Max. 650 mA (5 Vdc) Note (1)
Environmental conditions Conforms to S2T specifications
Insulation resistance 10 MΩ (500 Vdc) Note (2)
Withstand voltage 1500 Vac - 1 minute 500 Vac - 1 minute Note (2)
Size S2T I/O module size (1 slot)
Weight 250 g
NOTE
(1) Make sure that the total current consumption of a PI632 or PI672 module mounted
on the base unit is below the maximum output rating of power supply (for the
PS693,5 Vdc-7A).
(2) Between the external circuit and internal circuits
2.2 Functional specifications
Item Specifications
Module type Pulse input
I/O allocation type iX+Y 2W (Note: see Chapter 8 in case of S2/L2.)
Number of pulse input channels 2 channels
24-bit, binary counter
Counter configuration
Count value = 0 to 16777215
100 kpps maximum (other than quadrature bi-pulse)
Input pulse frequency
50 kpps maximum (quadrature bi-pulse)
• Quadrature bi-pulse counter
• Up/down pulse counter
• Auto-reset universal counter
Counter operation mode • Universal counter
• Speed counter
• Programmable interval timer
• Gate-ON timer
• Normal mode (1 count per 1 pulse)
Pulse count mode
• Precision count mode (both rising and falling edges)
6F8C0841 13
Chapter2 　Specifications
Item Specifications
2 points for each channel (transistor outputs)
Hardware comparison output
*S1: ON when Count value > set-point-1
function
*S2: ON when Count value < set-point-2
• External gate force ON
Other functions • Phases A and B function exchange
• Count disable
2.3 Input/output specifications

• Input
< PI632 >
Item Specifications
Input voltage 5 Vdc, ±5% 12 Vdc, ±5% 24 Vdc, ±5%
Input current 15.5 mA 15 mA 12.5 mA
Minimum ON voltage 3.75 V 9.5 V 21 V
2 Phase A
Phase B Maximum OFF voltage 1.25 V 2.5 V 5V
Maker Pulse duration 5 µs or more (other than quadrature bi-pulse)
Gate (ON level/OFF level) 10 µs or more (quadrature bi-pulse)
1.5 µs or less (other than quadrature bi-pulse)
ON/OFF transition
3 µs or less (quadrature bi-pulse)
Input voltage 12 - 24 Vdc, +10%/-15%
Input current 10 mA (24 Vdc)
Minimum ON voltage 9.6 V
EXT
Maximum OFF voltage 3.5 V
ON delay 10 ms or less
OFF delay 15 ms or less

2.3 Input/output specifications
< PI672 >
Item Specifications
Conform to EIA RS-422-A
Electrical specifications
(Line receiver: Am26LS31 or equivalent)
Phase A
Pulse duration 5 µs or more (other than quadrature bi-pulse)
Phase B
(ON level/OFF level) 10 µs or more (quadrature bi-pulse)
Maker
1.5 µs or less (other than quadrature bi-pulse)
ON/OFF transition
3 µs or less (quadrature bi-pulse)
Input voltage 12 Vdc, ±5% 24 Vdc, ±5%
Input current 15 mA 12.5 mA
Gate
Minimum ON voltage 9.5 V 21 V
Maximum OFF voltage 2.5 V 5V
Input voltage 12 - 24 Vdc, +10%/-15%
Input current 10 mA (24 Vdc)
Minimum ON voltage 9.6 V
EXT
Maximum OFF voltage 3.5 V
2
• Output
< PI632/PI672 >
Item Specifications
Output method Transistor output (current sinking)
Output voltage 10 - 30 Vdc
1S1 Output current 100 mA or less
1S2
Voltage drop at ON 1.0 V or less
2S1
2S2 Leakage current at OFF 0.1 mA or less
6F8C0841 15
2.4 Input/output internal circuit
• Pulse input circuit (phase A, B, Maker, Gate)
< PI632 >
AP/BP/MP/GP
A5/B5/M5/G5 470
470 3
A12/B12/M12/G12 2
240
1.6 k 1
DIP switch W1 - W8
< PI672 >
2 A−/B−/M−
A+/B+/M+
GP
G12
G24
• External limit input (EXT) < PI632/PI672 >
+EXT
-EXT

2.4 Input/output internal circuit
• Hardware comparison output circuit (1S1, 1S2, 2S1 and 2S2)
< PI632/PI672 >
P24 (24 Vdc)
1S1 (CH1)
1S2 (CH1)
2S1 (CH2)
2S2 (CH2)
N24 (0 V)
6F8C0841 17

Chapter 3 Wiring
3.1 Connector pin assignment

The following figure shows the pin assignment of the PI632/672’s external signal
connector.
< PI632 >
Pin No.
Channel 1 Phase A input 1A5 1 1 1AP
1BP 2 2 1A12
1B12 3 3 1B5 Channel 1 Phase B input
1MP 4 4 1M5 Channel 1 Maker input
1M12 5 5 2AP
Channel 2 Phase A input 2A5 6 6 2A12
2BP 7 7 2B5 Channel 2 Phase B input
2B12 8 8 2MP
Channel 2 Maker input 2M5 9 9 2M12
1GP 10 10 1G5 Channel 1 Gate input
1G12 11 11 2GP
Channel 2 LExternal limit input 2EXT- 14 14 2EXT+ Channel 2 LExternal limit input
No use 17 17 No use
24 Vdc P24 18 18 P24 24 Vdc
No use 20 20 No use
Remarks
For phase A, B, zero maker and gate input, the signal name means as follows.
1AP
P ….. + voltage input (24, 12 or 5 Vdc)
5 ….. 0 V terminal for 5 Vdc input
12 … 0 V termanal for 12 or 24 Vdc input
A, B, M or G … Signal type
6F8C0841 19
Chapter3 　Wiring
NOTE
The cable side connector (soldering type) is standard accessory.
< PI672 >

Pin No.
Channel 2 Phase B+ 2B+ 5 5 2B- Channel 2 Phase B -
Line receiver signal ground SG 7 7 SG Line receiver signal ground
1G24 8 8 1G12 Channel 1 Gate input
1GP 9 9 2GP
No use 11 11 No use
3 Channel 2 LExternal limit input 2EXT- 13 13 2EXT+ Channel 2 LExternal limit input
No use 14 14 No use
No use 17 17 No use
24 Vdc P24 18 18 P24 24 Vdc
No use 20 20 No use
Remarks
For gate input, the signal name means as follows.
1GP
P ….. + voltage input (24 or 12 Vdc)
12 ... 0 V terminal for 12 Vdc input
24 … 0 V termanal for 24 Vdc input
G … Gate input
NOTE
The cable side connector (soldering type) is standard accessory.

3.2 Signal connections

Depending on the operation mode, required signals are different. This section shows how
to connect each signal. Refer to your intended operation mode for which signal is used.
• Pulse input signals
< PI632 >
Either 5 Vdc, 12 Vdc or 24 Vdc can be used for the signal voltage.
For 5 Vdc input, terminals P and 5 are used. (represents A, B, M or G)
For 12 Vdc or 24 Vdc, terminals P and 12 are used.
12 Vdc or 24 Vdc is selected by DIP switches W1 to W8. Refer to section 1.3.
When the voltage is applied between P and 5 or between P and 12, the PI632
recognizes the signal is ON.
The figure below shows the typical connections for a channel.
In case of 5 Vdc input system:

Shielded twisted-pair cable PI632
Pulse generator
Signal Pin No.

Power
AP B1 (B5)
A
A5 A1 (A6)
BP A2 (A7)
3
B
B5 B3 (B7)
MP A4 (B8)
M
M5 B4 (A9)
- + GP A10 (B11)
G5 B10 (A12)
5 Vdc
EXT+ B13 (B14)

Gate
signal
EXT- A13 (A14)
5 Vdc
Limit Pin No. in ( ) shows

signal channel 2.
12 - 24 Vdc
6F8C0841 21
Chapter3 　Wiring
< PI632 >
In case of 12 Vdc or 24 Vdc input system:
Pulse generator
Signal Pin No.

Power
AP B1 (B5)
A
A12 B2 (B6)
BP A2 (A7)
B
B12 A3 (A8)
MP A4 (B8)
M
M12 A5 (B9)
- + GP A10 (B11)
G12 A11 (B12)

12 or 24 Vdc
3 Gate
signal
EXT+ B13 (B14)
EXT- A13 (A14)
12 or 24 Vdc

signal channel 2.
12 - 24 Vdc
NOTE
The input voltage for A, B, M, and G can be selected either 12 Vdc or 24 Vdc by set-
ting the DIP switches provided on the PI632. Refer to section 1.3.

< PI672 >

Line driver type pulse generator is used with the PI672. The interface is RS-422-A.
For the gate (G) input, either 12 Vdc or 24 Vdc can be used. For 12 Vdc, terminals GP
and G12 are used. On the other hand, for 24 Vdc input, terminals GP and G24 are used.
When the voltage for + terminal is higher than - terminal, the PI672 recognizes the signal
is ON. (represents A, B or M)
The figure below shows the typical connections for a channel.
Pulse generator
Signal Pin No.
A
A+ A1 (A4)
A
A− B1 (B4)
B
B+ A2 (A5)
B
B− B2 (B5)
M
M+ A3 (A6)
M
M− B3 (B6)
SG
SG A7 and B7
3
GP A9 (B9)
G12 B8 (A10)
G24 A8 (B10)
Gate
signal
EXT+ B12 (B13)
12 or 24 Vdc
EXT- A12 (A13)

signal channel 2.
12 - 24 Vdc
NOTE
For the gate signal, either G12 or G24 terminal is used depending on the signal volt-
age. When it is 12 Vdc, use G12 terminal. And when it is 24 Vdc, use G24 terminal.
6F8C0841 23
Chapter3 　Wiring
• Hardware comparison output signals
2 points of hardware comparison output are provided for each channel. 1S1 and
1S2 are for channel 1, and 2S1 and 2S2 are for channel 2.
The output method is 24 Vdc transistor output (current sinking).
The figure below shows the typical wiring connections.
PI632/PI672
Signal Pin No.

Load
1S1 B15
1S2 A15
2S1 B16
2S2 A16
P24 A18 and B18
- +
N24 A19 and B19
24 Vdc
3 NOTE
(1) The hardware comparison output function is enabled when the output-enable flag is set to
ON. Refer to section 4.1 for the output-enable flag.
(2) The 24 Vdc power is not required if the hardware comparison outputs are not used.

3.3 Wiring precautions
3.3 Wiring precautions
! CAUTION
Turn off power to the model 2000 and to the PI632/672 before wiring. Failure to do so
can cause electrical shock or damage to the PI632/672.
• Use shielded twisted-pair cable for the pulse input signals to minimize interference
of noise.
• Normally connect the cable shield to the model 2000 frame ground (unit mounting
screw).
However, in some cases, connection to the pulse generator’s ground results more
stable operation. In this case, disconnect the cable shield from the model 2000
frame ground and keep single-point grounding.
• The required signals are dependent on the PI632/672’s operation mode. Check
your operation mode for the necessary signals.
6F8C0841 25
Chapter3 　Wiring

Chapter 4 Register Configuration
4.1 I/O allocation and I/O registers

The PI632/672 is allo cated as the 2/0 type has the I/O type ‘iX+Y 2W’ for I/O allocation.
When the automatic I/O allocation is performed with mounting the PI632/672, the
following I/O allocation table will be created in the S2T.
(T-PDS screen example - in the case that PI632/672 is mounted on Slot 0 of Unit 0)
Then, 2 I/O registers, XW(n) and YW(n+1) are assigned to the PI632/672.
In the above example, XW000 and YW001 are assigned.
Note that the I/O type has ‘i’ designation. It means that the S2T will not update the
assigned I/O registers in the batch I/O processing. To read or write data through the I/O
registers, the Direct I/O instruction (FUN235) or the direct I/O designation (I/IW and O/
OW instead of X/XW and Y/YW) is necessary.
WARNING
See Chapter 8 when an controller other than an S2T is used.
6F8C0841 27
Chapter4 　Register Configuration
The following table shows the functions of I/O registers assigned to the PI632/672.
F E D C B A 9 8 7 6 5 4 3 2 1 0
XW(n) No use Status
YW(n+1) No use (0) Command
Channel 2 Channel 1
(CH2) (CH1)
Register Bit Name Description

F-8 – No use (data not defined)
1: both gate input and soft-gate for CH 2 are
7 CH2 gate status
ON
6 CH2 EXT status 1: EXT input for CH2 is ON
CH2 less than
5 1: CH2 count value is less than the set-point-2
set-point-2
CH2 greater than 1: CH2 count value is greater than the set-
4
XW(n) set-point- 1 point-1
1: both gate input and soft-gate for CH1 are
3 CH1 gate status
ON
2 CH1 EXT status 1: EXT input for CH1 is ON
CH1 less than
1 1: CH1 count value is less than the set-point-2
set-point-2
CH1 greater than 1: CH1 count value is greater than the set-
0
set-point- 1 point-1
4 F-8
7
–
CH2 input-disable
No use (set to 0)
Set to 1 to disable CH2’s count input
6 CH2 output-enable Set to 1 to enable CH2’s comparison outputs
CH 2 interrupt
5 Set 1 to enable CH2 interrupts.
enabled
YW(n+1) 4 CH2 soft-gate Set to 1 to enable CH2’s counter function
3 CH1 input-disable Set to 1 to disable CH1’s count input
2 CH1 output-enable Set to 1 to enable CH1’s comparison outputs
CH1 interrupt
1 Set 1 to enable CH1 interrupts.
enabled
0 CH1 soft-gate Set to 1 to enable CH1’s counter function

4.2 PI632/672 expansion memory

The PI632/672’s count value, set-point value, operation mode data, and other
information are stored in the PI632/672’s expansion memory.
This section explains the expansion memory contents and how to access the expansion
memory.
4.2.1 Memory map

The PI632/672 has the expansion memory that is used to exchange data with S2T. The
memory map of the expansion memory is as follows.
Address Word data

H8000 Channel 1 count calue Channel 1 counter register (24-bit)
H8002 Channel 1 set-point-1 Channel 1 upper comparison value (24-bit)
H8004 Channel 1 set-point-2 Channel 1 lower comparison value (24-bit)
H8006 Channel 1 hold value Channel 1 hold register (24-bit)
H8008 Channel 2 count value Channel 2 counter register (24-bit)
H800A Channel 2 set-point-1 Channel 2 upper comparison value (24-bit)
H800C Channel 2 set-point-2 Channel 2 lower comparison value (24-bit)
H800E Channel 2 hold value Channel 2 hold register (24-bit)
H8010 Interrupt flag (2 bits)
H8011
Access inhibited
H8018 Channel 1 mode

H8019
H801A
Channel 2 mode
4
Access inhibited
H803F
NOTE
(1) See Chapter 8 when you use the controller except the S2T.
(2) Hold values (H8007-H8006, H800F-H800E) and the interrupt flag (H8010) are dedicated to
reading.
The other addresses can be used for reading and writing (except the address that restrict
access).
6F8C0841 29
4.2.2 Expansion memory access
The S2T can read the PI632/672’s expansion memory contents by using READ
instruction (FUN237). It can write data into the expansion memory by using WRITE
instruction (FUN238).
READ instruction (FUN237)

Expression:
[ (A) READ (B) → (C) ]
Operands:
(A): I/O register (XW/YW) assigned to the PI632/672
(B): Starting address of the expansion memory to be read
(B)+1: Number of words to be read (max. 16 for PI632/672)
(C): Starting register of the destination
Example:
R0100
[ H8000 MOV D4000 ] [ 00016 MOV D4001 ]
[ XW000 READ D4000 → D1000 ]
When R0100 is ON, 16 words of expansion memory data starting with address H8000
are read from the PI632/672 which is allocated to XW000. And the data are stored in
4 D1000 and after.
WRITE instruction (FUN238)

Expression:
[ (A) WRITE (B) → (C) ]
Operands:
(A): Starting register of the source
(B): Starting address of the expansion memory to be written
(B)+1: Number of words to be written (max. 6 for PI632/672)
(C): I/O register (XW/YW) assigned to the PI632/672
Example:
R0101
[ H8018 MOV D4010 ] [ 00002 MOV D4011 ]
[ D2000 WRITE D4010 → YW001 ]
When R0101 is ON, 2 words of data starting with D2000 (D2000 and D2001) are written
into the expansion memory address H8018 and H8019 of the PI632/672 which is
allocated to YW001.
NOTE
See Chapter 8 when you use the controller except the S2T.

4.2.3 Count value registers

The addresses H8000, H8001 and H8008, H8009 store the count values for channel 1
and channel 2 respectively.
These data can be read into the S2T by READ instruction. Also, the S2T can write
(change) the count values by WRITE instruction.
<Channel 1>
F 87 0F 0
No use (always 0) Count value (upper) Count value (lower)
Address H8001 Address H8000
<Channel 2>
F 87 0F 0
No use (always 0) Count value (upper) Count value (lower)
The count value is 24-bit length.

The lower address (address H8000 or H8008) stores the lower 16-bit of the count value.
The higher address (address H8001 or H8009) stores the upper 8-bit of the count value.
These subsequent 2 addresses configure 24-bit count value register. (the count value is
0 to 16777215)
The upper 8 bits of the higher address are all 0. When writing a double-word (32-bit) data
into these addresses (presetting the count value), the upper 8 bits should be 0.
The count value registers are cleared to 0 at the timing of the gate condition is fulfilled.
4
NOTE
In this manual, double-word (32-bit) register is expressed as,
upper register • lower register
For example;
D0011•D0010 ... for S2T’s register
H8009•H8008 ... for PI632/672’s expansion memory address
6F8C0841 31
4.2.4 Upper and lower comparison value registers
The addresses H8002 through H8005 and H800A through H800D store the comparison
values for channel 1 and channel 2 respectively.
The upper comparison value is called set-point-1, and the lower comparison value is
called set-point-2. The function of these data is dependent on the counter operation
mode.
These data can be written from the S2T by WRITE instruction. Also, the S2T can read
these data by READ instruction.
<Channel 1 - set-point-1>
F 87 0F 0
No use (always 0) Set-point-1 (upper) Set-point-1 (lower)
F 87 0F 0
F 87 0F 0
Address H800B Address H800A

4 <Channel 2 - set-point-2>
F 87 0F 0
Address H800D Address H800C
The comparison value (set-point-1 or -2) is 24-bit length.

The lower address stores the lower 16-bit of the comparison value. The higher address
stores the upper 8-bit of the comparison value.
These subsequent 2 addresses configure 24-bit comparison value register.
The upper 8 bits of the higher address are all 0. When writing a double-word (32-bit) data
into these addresses (setting the comparison value), the upper 8 bits should be 0.
The comparison value is internally set at the timing of the gate condition is fulfilled.

4.2.5 Hold value registers

The addresses H8006, H8007 and H800E, H800F store the hold values for channel 1
and channel 2 respectively.
These data can be read into the S2T. Writing data into these addresses is prohibited.
<Channel 1>
F 87 0F 0
No use (always 0) Hold value (upper) Hold value (lower)
<Channel 2>
F 8 7 0 F 0
No use (always 0) Hold value (upper) Hold value (lower)
Address H800F Address H800E
The hold value is 24-bit length.

The lower address stores the lower 16-bit of the hold value. The higher address stores
the upper 8-bit of the hold value.
These subsequent 2 addresses configure 24-bit hold value register.
The upper 8 bits of the higher address are all 0.
The hold value registers are cleared to 0 at the timing of the gate condition is fulfilled.
6F8C0841 33
4.2.6 Interrupt Flag
Individual counters have an interrupt function. The interrupt enabled conditions and the
interrupt occurrence conditions are as follows:
[Interrupt enabled conditions]

1) Your PI632/672 module must be mounted on the base unit.
2) The interrupt enabled flag for the command register has been set to "1".
[Interrupt occurrence conditions]

1) When a count value in "count value < set-point-1" counts UP and reaches set-point-1
2) When a count value in "count value < set-point-2" counts DOWN and reaches set-point-2
When an interrupt occurs, the interrupt program corresponding to the module is invoked.
The interrupt is released within the interrupt program after the condition is met. Likewise,
the user program also has to cancel the factors of the interrupt within the user program.
When an interrupt is not released by the program, the subsequent interrupt cannot be
received. An interrupt is released when the interrupt flag or the count value for the pulse
module is read out of expansion memory. At the same time, since the interrupt flag is set
to "0", you may save the value when necessary.
When a channel has two factors of an interrupt, they can be checked by reading two
specific bits on the status register--one indicates exceeding set-point-1 and the other
indicating lower than set-point-2.
Interrupt flag
4 (H8010)
Unknown data CH1 ("1" is set when CH1 has an interrupt)

CH2 ("1" is set when CH2 has an interrupt)
! CAUTION
(1) When your PI632/672 module is mounted on an expansion unit, the interrupt function cannot
be used
(2) To set the interrupt function to enabled, phase G input must be ON and the soft gate of the
command register (bit 0 and bit 4 on the command register) must be set to ON.

4.2.7 Operation mode registers

The channel 1 operation mode can be set by writing specified data into the address
H8018. And the channel 2 operation mode can be set by writing specified data into the
address H8019.
Operation mode setting is important to use the PI632/672. See section 5 for how to set
the operation mode.
Reading data from these addressed memory is prohibited.
<Channel 1>
F E D C B A 9 8 7 6 5 4 3 2 1 0
H8018 No use (0) Operation mode data
Refer to section 5.2
<Channel 2>
F E D C B A 9 8 7 6 5 4 3 2 1 0
Refer to section 5.2
The operation mode is internally set at the timing of the gate condition is fulfilled.
6F8C0841 35

Chapter 5 Operation Mode Setting
5.1 Mode setting overview

The PI632/672 has the following operation modes. The following a, b, c and d functions
are selected in combination.
a. Counter operation mode
(5) Speed counter mode (sampling time: 0.01s, 0.1s or 1s)
(6) Programmable interval timer mode (internal clock: 1 kHz, 10 kHz or 100 kHz)
(7) Gate-ON timer mode (internal clock: 1 kHz, 10 kHz or 100 kHz)
b. Pulse count mode
For the above each counter operation mode, the pulse count mode can be selected
either normal count mode or precision count mode. Refer to section 1.2.2 for the pulse
count mode.
c. Gate force
For the above counter operation mode except (7), the gate force function can be used.
When the gate force is specified, the external Gate signal is recognized as always ON
without need of actual Gate signal wiring.
d. Phase A/B exchange
For the above counter operation modes (1) and (2), function of phase A and phase B can
be exchanged. That is, counting direction (up or down) can be changed by this setting.
To set the operation mode, the operation mode register in the PI632/672’s expansion
memory is used. There are 2 operation mode registers in the expansion memory. One is
for channel 1 and the other is for channel 2.
Therefore, the operation mode can be set individually for channel 1 and channel 2. For
example, you can set channel 1 to the quadrature bi-pulse counter and channel 2 to the
speed counter.
6F8C0841 37
Chapter5 　Operation Mode Setting
5.2 Operation mode register setting
To use the PI632/672, it is important to set (write) a correct data into the operation mode
register which is allocated on the PI632/672’s expansion memory. (Refer to section
4.2.6)
Operation mode register:
<Channel 1>
F E D C B A 9 8 7 6 5 4 3 2 1 0
<Channel 2>
F E D C B A 9 8 7 6 5 4 3 2 1 0
The following tables show the operation mode data to be written into the operation mode
register for setting each mode.
To write the data into the operation mode register, WRITE instruction (FUN238) is used.
Operation mode data:

In the following tables, the number in brackets ( ) on the operation mode data column
shows the decimal value of the operation mode data.
Phase A/B Pulse count Operation mode

Gate force
exchange mode data
Normal H0002 (2)
Normal
Precision H0042 (66)
5 Normal
Forced
Normal
Precision
H0102 (258)
H0142 (322)
Normal H0802 (2050)
Normal
Exchange
Normal H0902 (2306)
Forced

Gate force
exchange mode data
Normal H0000 (0)
Normal
Normal
Normal H0100 (256)
Forced
Normal H0800 (2048)
Normal
Exchange
Normal H0900 (2304)
Forced

5.2 Operation mode register setting
Operation mode
Gate force Pulse count mode
data
Normal H0081 (129)
Normal
Precision H00C1 (193)
Normal H0181 (385)
Forced
Operation mode
data
Normal H0001 (1)
Normal
Normal H0101 (257)
Forced
Operation mode
Pulse count mode Sampling time
data
0.01 s H0005 (5)
Normal 0.1 s H0205 (517)
1s H0405 (1029)
0.01 s H0045 (69)
Precision 0.1 s H0245 (581)
1s H0445 (1093)
Gate force
Pulse count
Internal clock
Operation mode
5
mode data
1 kHz H0091 (145)
Normal 10 kHz H00A1 (161)
100 kHz H00B1 (177)
Normal
1 kHz H00D1 (209)
Precision 10 kHz H00E1 (225)
100 kHz H00F1 (241)
1 kHz H0191 (401)
100 kHz H01B1 (433)
Forced
1 kHz H01D1 (465)
100 kHz H01F1 (497)
6F8C0841 39
Chapter5 　Operation Mode Setting
Operation mode
Pulse count mode Internal clock
data
1 kHz H0011 (17)
Normal 10 kHz H0021 (33)
100 kHz H0031 (49)
1 kHz H0051 (81)
Precision 10 kHz H0061 (97)
100 kHz H0071 (113)
S2T sample programs to set the operation modes are shown below.
In these sample programs, the PI632/672’s operation modes are set at the 2nd scan of
the S2T program execution.
Sample 1:
This program sets channel 1 to the quadrature bi-pulse counter of precision pulse count
mode with gate forced (phase A/B exchange is normal) , and channel 2 to the 1 second
speed counter of normal pulse count mode.
It is assumed that the PI632/672 is allocated to XW000 and YW001.
1 ［ 00322 MOV D0010 ］［ 01029 MOV D0011 ］

(H8018)
［-32744 MOV D4000 ］［ 00002 MOV D4001 ］
［ D0010 WRITE D4000 → XW000 ］
By executing this program, the data 322 (H0142) and 1029 (H0405) are written into the
5 addresses H8018 and H8019 of the PI632/672’s expansion memory respectively.
Sample 2:
This program sets channel 1 to the auto-reset universal counter of normal pulse count
mode with gate force function, and channel 2 to the gate ON timer with using 10 kHz
clock of precision pulse count mode.
It is assumed that the PI632/672 is allocated to XW000 and YW001.
1 ［ 00129 MOV D0010 ］［ 00097 MOV D0011 ］

(H8018)
［-32744 MOV D4000 ］［ 00002 MOV D4001 ］
［ D0010 WRITE D4000 → XW000 ］
By executing this program, the data 129 (H0081) and 97 (H0061) are written into the
addresses H8018 and H8019 of the PI632/672’s expansion memory respectively.
! CAUTION
(1) Be sure to make a user program so that the command to write operation modes and preset
values (WRITE command) is executed on the second scan or later (no writing is executed
even when a WRITE command is executed on the first scan).
(2) It is restricted to read data on the operation mode register.

Chapter 6 Function Details
6.1 Quadrature bi-pulse counter mode

(1) Mode setting

Gate force
exchange mode data
Normal H0002 (2)
Normal
Normal
Normal H0102 (258)
Forced
Normal H0802 (2050)
Normal
Exchange
Normal H0902 (2306)
Forced
(2) External signals
Signal Function
Phase A Quadrature pulses Counting up when phase A precedes (at normal)
Phase B Counting down when phase B precedes (at normal)
Can be used to clear the count value
Marker
(cleared at the rising edge of Marker while EXT is ON)
Used to enable the counter operation (not necessary if gate force is used)
Gate (counter operation is enabled when both external gate and soft-gate are
ON)
EXT Can be used to clear the count value (see Marker)
S1
Comes ON when count value > set-point-1
S2
Comes ON when count value < set-point-2
(3) Expansion memory
Address
Name Function
(CH1/CH2)
Count value H8001•H8000 / H8009•H8008 Stores the count value (read/write)
Set-point-1 H8003•H8002 / H800B•H800A Can be used for hardware comparison
Set-point-2 H8005•H8004 / H800D•H800C output (read/write)
Hold value H8007•H8006 / H800F•H800E Stores the hold value (read only)
Interrupt flag H8010(Bit0/Bit1) Setting interrupt enabled (read only)
Used to set the operation mode (write
Mode H8018 / H8019
only)
6F8C0841 41
Chapter6 　Function Details
(4) Command register (YW)
Bit position
Name Function
(CH1/CH2)
Used to enable the counter operation
Soft-gate 0/4
(enabled when both external gate and soft-gate are ON)
Output-enable 2/6 Set to ON to enable hardware comparison outputs
Input-disable 3/7 Set to ON to disable pulse count
(5) Operation
PI632/672 counts the pulses whose phases are shifted 90( each other.
In the normal condition, the PI632/672 counts up (increase) when phase A pulse
precedes against phase B pulse, and the PI632/672 counts down (decrease) when
phase B pulse precedes.
PI632/672 can count up to 50 kHz pulses. Therefore the maximum counting speed is as
follows.
Normal count mode: 50 k counts per second
Precision count mode: 200 k counts per second
This mode function is enabled while both external gate and soft-gate are ON.
If the gate force function is used, this mode function is enabled by soft-gate ON.
(Note that when the gate condition is not fulfilled, the count value is no meaning)
The count value can be changed by directly writing a data into the expansion memory.
Also, the count value is cleared to 0 by hardware at the following timing.
a) At the moment of gate condition is fulfilled
b) At the moment of Maker comes ON while EXT is ON
(EXT must be ON at least 100 ms before Maker comes ON)
When an up count comes at the count value is upper limit (16777215), the count value is
reset to 0. When a down count comes at the count value is lower limit (0), the count value
is reset to the upper limit value (16777215).
When the output-enable bit in the command register (YW) is ON, the hardware
comparison outputs (S1 and S2) are enabled. In this condition, when the count value is
greater than the set-point-1, S1 comes ON. And when the count value is smaller than the
set-point-2, S2 comes ON.
6 When the input-disable bit in the command register (YW) is ON, PI632/672 stops the
pulse counting.
When the gate condition comes OFF, the current count value is transferred into the hold
register.

6.1 Quadrature bi-pulse counter mode
Phase A and B Counting down

Counting up
Gate
Soft-gate
16777215
Set-point-1
Count value Set-point-2
Interrupt
S1
S2
6F8C0841 43
6.2 Up/down pulse counter mode
(1) Mode setting

Gate force
exchange mode data
Normal H0000 (0)
Normal
Normal
Normal H0100 (256)
Forced
Normal H0800 (2048)
Normal
Exchange
Normal H0900 (2304)
Forced
Signal Function
Phase A Counting up pulse (at normal)
Phase B Counting down pulse (at normal)
Can be used to clear the count value
Marker
(cleared at the rising edge of Marker while EXT is ON)
ON)
EXT Can be used to clear the count value (see Marker)
S1
S2
Comes ON when count value < set-point-2
6 (3) Expansion memory
Address
Name Function
(CH1/CH2)
Set-point-1 H8003•H8002 / H800B•H800A Can be used for hardware comparison
Set-point-2 H8005•H8004 / H800D•H800C output (read/write)
Mode H8018 / H8019
only)
Bit position
Name Function
(CH1/CH2)
Soft-gate 0/4
Output-enable 2/6 Set to ON to enable hardware comparison outputs

6.2 Up/down pulse counter mode
(5) Operation
PI632/672 counts the pulses phase A and phase B.
In the normal condition, phase A is counting up (increase), and phase B is counting down
(decrease). When both phase A and phase B come ON simultaneously, counting is not
executed.
In the normal count mode, PI632/672 counts at the rising edge of the pulse. On the other
hand, in the precision count mode, PI632/672 counts at both rising and falling edges of
the pulse. Therefore the count value becomes double in the precision count mode.
follows.
The count value can be changed by directly writing a data into the expansion memory.
Also, the count value is cleared to 0 by hardware at the following timing.
a) At the moment of gate condition is fulfilled
b) At the moment of Marker comes ON while EXT is ON
(EXT must be ON at least 100 ms before Marker comes ON)
When an up count comes at the count value is upper limit (16777215), the count value is
reset to 0. When a down count comes at the count value is lower limit (0), the count value
is reset to the upper limit value (16777215).
comparison outputs (S1 and S2) are enabled. In this condition, when the count value is
greater than the set-point-1, S1 comes ON. And when the count value is smaller than the
set-point-2, S2 comes ON.
When the input-disable bit in the command register (YW) is ON, PI632/672 stops the
pulse counting.
register.
When the interrupt enabled bit has been set to "1", the UP- or DOWN- pulse counter 6
mode causes interrupts when the pulse counter counts up and reaches set-point-1 or
when the pulse counter counts down and reaches set-point-2. You may use the
comparison output function, which holds output when the count value reaches set-point-1
(upper limit) or below set-point-2 (lower limit).
6F8C0841 45
Phase A
Phase B
Gate
Soft-gate
16777215
Set-point-1
Count value Set-point-2
Interrupt
S1
S2

6.3 Auto-reset universal counter mode
6.3 Auto-reset universal counter mode

(1) Mode setting
Operation mode
data
Normal H0081 (129)
Normal
Normal H0181 (385)
Forced
Signal Function
Phase A Counting up pulse
Phase B No use
Marker No use
ON)
EXT No use
S1 No use
S2 No use
Address
Name Function
(CH1/CH2)
Set-point-1 H8003•H8002 / H800B•H800A Used to set the reset point (read/write)
Set-point-2 H8005•H8004 / H800D•H800C No use
Interrupt flag H8010(Bit0/Bit1) Setting interrupt enabled (read only) 6
Mode H8018 / H8019
only)
Bit position
Name Function
(CH1/CH2)
Soft-gate 0/4
Output-enable 2/6 No use
6F8C0841 47
(5) Operation
PI632/672 counts up by the single phase pulses into phase A.
follows.
The count value is cleared to 0 at the timing of gate condition is fulfilled.
Also, the count value can be changed by directly writing a data into the expansion
memory.
When the count value reaches the set-point-1, the count value is reset to 0 (zero).
The set-point-1 can be set in the range of 1 to 16777215.
register.
When the interrupt enabled flag has been set to "1", this mode causes interrupts when
the counter reaches set-point-1. When the frequency of pulses is fixed, the auto reset
universal counter mode can be used as a timer which causes fixed-frequency interrupts.
Phase A
Gate
Soft-gate
Set-point-1
6 Count value
Interrupt

6.4 Universal counter mode
6.4 Universal counter mode

(1) Mode setting
Operation mode
data
Normal H0001 (1)
Normal
Normal H0101 (257)
Forced
Signal Function
Phase B No use
Marker No use
ON)
EXT No use
S1
S2 No use
Address
Name Function
(CH1/CH2)
Can be used for hardware comparison
Set-point-1 H8003•H8002 / H800B•H800A
output (read/write)
Set-point-2
Hold value
H8005•H8004 / H800D•H800C No use
H8007•H8006 / H800F•H800E Stores the hold value (read only)
6
Mode H8018 / H8019
only)
Bit position
Name Function
(CH1/CH2)
Soft-gate 0/4
Output-enable 2/6 Set to ON to enable hardware comparison output
6F8C0841 49
(5) Operation
PI632/672 counts up by the single phase pulses into phase A.
follows.
The count value is cleared to 0 at the timing of gate condition is fulfilled.
Also, the count value can be changed by directly writing a data into the expansion
memory.
When the count value exceeds the upper limit value (16777215), it is reset to 0 (zero).
comparison output (S1) is enabled. In this condition, when the count value is greater than
the set-point-1, S1 comes ON.
register.
When the interrupt enabled flag has been set to "1", the universal counter mode causes
interrupts when the count value reaches set-point-1.
Phase A
Gate
Soft-gate
6 16777215
Set-point-1
Count value
Interrupt
S1

6.5 Speed counter mode
6.5 Speed counter mode

(1) Mode setting
Operation mode
Pulse count mode Sampling time
data
0.01 s H0005 (5)
Normal 0.1 s H0205 (517)
1s H0405 (1029)
0.01 s H0045 (69)
Precision 0.1 s H0245 (581)
1s H0445 (1093)
Signal Function
Phase B No use
Marker No use
Gate No use
EXT No use
S1
S2 No use
Address
Name Function
(CH1/CH2)
Set-point-1 H8003•H8002 / H800B•H800A
output (read/write)
Set-point-2 H8005•H8004 / H800D•H800C No use 6
Stores the count value in a sampling
Hold value H8007•H8006 / H800F•H800E
time (read only)
Mode H8018 / H8019
only)
Bit position
Name Function
(CH1/CH2)
Soft-gate 0/4
(enabled while ON)
6F8C0841 51
(5) Operation
PI632/672 counts the single phase pulses into phase A during the specified sampling
time.
The sampling time can be selected from 0.01, 0.1 or 1 second.
follows.
This mode function is enabled while soft-gate is ON.
The count value in a sampling time is transferred into the hold register. By reading the
hold register, the pulse rate can be measured.
When the interrupt enabled flag has been set to "1", the gate ON timer mode causes
Phase A
Soft-gate
∆T ∆T ∆T ∆T ∆T
c
Set-point-1
b
Count value a
d
6
0
b
a
d
Hold value
Interrupt
S1
∆T: sampling time = 0.01s, 0.1s or 1 s

6.6 Programmable interval timer mode
6.6 Programmable interval timer mode

(1) Mode setting
Pulse count Operation mode

Gate force Internal clock
mode data
1 kHz H0091 (145)
100 kHz H00B1 (177)
Normal
1 kHz H00D1 (209)
100 kHz H00F1 (241)
1 kHz H0191 (401)
100 kHz H01B1 (433)
Forced
1 kHz H01D1 (465)
100 kHz H01F1 (497)
Signal Function
Phase A No use
Phase B No use
Marker No use
Gate
(the operation is enabled when both external gate and soft-gate are ON)
EXT No use
S1 No use
S2 No use
(3) Expansion memory 6
Address
Name Function
(CH1/CH2)
Set-point-1 H8003•H8002 / H800B•H800A Used to set the interval (read/write)
Set-point-2 H8005•H8004 / H800D•H800C No use
Mode H8018 / H8019
only)
Bit position
Name Function
(CH1/CH2)
Soft-gate 0/4
Output-enable 2/6 No use
Input-disable 3/7 Set to ON to disable count
6F8C0841 53
(5) Operation
Instead of external pulses, PI632/672 counts its internal clock pulses. As the result,
PI632/672 works as free-running timer in this mode.
The frequency of the internal clock can be selected from 1, 10 or 100 kHz.
In the normal count mode, PI632/672 counts at the rising edge of the internal clock pulse.
On the other hand, in the precision count mode, PI632/672 counts at both rising and
falling edges of the internal clock pulse. The table below shows the time base which
increases the count value by 1.
Count mode Internal clock Time base (= 1 count)

1 kHz 1 ms
Normal 10 kHz 0.1 ms
100 kHz 0.01 ms
1 kHz 0.5 ms
Precision 10 kHz 0.05 ms
100 kHz 0.005 ms
When the count value reaches the set-point-1, the count value is reset to 0 (zero).
The set-point-1 can be set in the range of 1 to 16777215.
register.
When the interrupt enabled flag has been set to "1", this mode causes fixed-frequency
interrupts.
G a te
S o ft-g a te
6 S e t-p o in t-1
C o u n t v a lu e
In te rru p t
ｔｔｔ
ｔ　　＝　　　　　　 Preset value 1

Internal reference pulse frequency (Hz)

6.7 Gate-ON timer mode
6.7 Gate-ON timer mode

(1) Mode setting
Operation mode
Pulse count mode Internal clock
data
1 kHz H0011 (17)
Normal 10 kHz H0021 (33)
100 kHz H0031 (49)
1 kHz H0051 (81)
Precision 10 kHz H0061 (97)
100 kHz H0071 (113)
Signal Function
Phase A No use
Phase B No use
Marker No use
Gate Gate signal whose ON duration is measured
EXT No use
S1
S2 No use
Address
Name Function
(CH1/CH2)
Set-point-1 H8003•H8002 / H800B•H800A
output (read/write)
Set-point-2 H8005•H8004 / H800D•H800C No use 6
Stores the count value in a gate ON
Hold value H8007•H8006 / H800F•H800E
duration (read only)
Mode H8018 / H8019
only)
Bit position
Name Function
(CH1/CH2)
Soft-gate 0/4
(enabled while soft-gate is ON)
Input-disable 3/7 Set to ON to disable count
6F8C0841 55
(5) Operation
PI632/672 measures the time duration of Gate signal ON state. The time is measured by
counting PI632/672’s internal clock pulses. The frequency of the internal clock can be
selected from 1, 10 or 100 kHz.
In the normal count mode, PI632/672 counts at the rising edge of the internal clock pulse.
On the other hand, in the precision count mode, PI632/672 counts at both rising and
falling edges of the internal clock pulse. The table below shows the time base which
increases the count value by 1.
The count rage is 1 to 16777215. The countable duration is also shown in the table.
Count mode Internal clock Time base (= 1 count) Countable duration

1 kHz 1 ms 1 ms to 16777.215 s
Normal 10 kHz 0.1 ms 0.1 ms to 1677.7215 s
100 kHz 0.01 ms 0.01 ms to 167.77215 s
1 kHz 0.5 ms 0.5 ms to 8388.6075 s
Precision 10 kHz 0.05 ms 0.05 ms to 838.86075 s
100 kHz 0.005 ms 0.005 ms to 83.886075 s
This mode function is enabled while soft-gate is ON.
When the Gate signal is changed to ON, the counting is started from 0. Then the Gate
signal is changed to OFF, the count value is transferred to the hold register.
For example, if the hold register value is 7863 under the setting of 10 kHz precision
mode, it means that the Gate ON duration was;
7863 × 0.05 ms = 393.15 ms
When the interrupt enabled flag has been set to "1", the gate ON timer mode causes
Soft-gate
Gate
6 Upper limit (16777215)

b
Set-point-1
c
Count value
a
0
Hold value
a
Interrupt
*S1

Chapter 7 SAMPLE PROGRAMS
7.1 Setting an operation mode

The operation mode sets the operation mode for channel 1 to the 90-degree phase
differential bipulse counter mode (pulse mode = frequency multiply, gate forced = none,
A/B phase = normal). Mode data 66 (H0042) on the second scan is written on address
H8018 (CH1 mode) of expansion memory.
This sample program assumes that your PI632/672 are allocated to XW0000 and
YW001.
In the following sample programs, it is assumed that the PI632/672 is allocated to XW000
and YW001.
• Setting the quadrature bi-pulse counter mode for channel 1
(pulse mode = precision, gate force = no, phase A/B = normal)
1 ［ 00066 MOV D0010 ］

(H8018)
［-32744 MOV RW050 ］［ 00001 MOV RW051 ］
［ D0010 WRITE RW050 → XW000 ］
At the beginning of RUN mode (at the first scan), the mode data 66 (H0042) is
written into the address H8018 (CH1 mode) of the expansion memory.
! CAUTION
(2) It is restricted to read data on the operation mode register.
6F8C0841 57
Chapter7 　SAMPLE PROGRAMS
7.2 Writing Data on the Command Register
This sample program sets the following:
Channel 1 Soft gate (Y0010) = ON
Interrupt enabled (Y0011) = ON
　 Output enabled (Y0012) = ON
When R0101 is ON, bits 0, 1, 2 (Y0010, Y0011, Y0012) are set to ON.
This sample program assumes that your P16232/762 are allocated to XW000 and
YW001.
• writing the command register (YW001)
Channel 1 Soft-gate (Y0010) = ON
Output-enable (Y0012) = ON
R0100
1 ［ 0000150000 DMOV D0013•D0012 ］
［ 0000000200 DMOV D0015•D0014 ］
(H8002)
［-32766 MOV RW050 ］［ 00004 MOV RW051 ］
［ D0012 WRITE RW050 → XW000 ］
When R0101 is ON, Y0010 and Y0012 are set to ON. Then I/O registers (XW000
and YW001) are updated by direct I/O instruction (I/O).
! CAUTION
Be sure to make a user program so that the command to write operation modes and preset
values (WRITE command) is executed on the second scan or later (no writing is executed even
7 when a WRITE command is executed on the first scan).

7.3 Setting Preset Value Data for Comparison
7.3 Setting Preset Value Data for Comparison

Channel 1 Preset value 1 = 150000

Preset value 2 = 200
When R0100 is ON, data 150000 and 200 are respectively written onto H8003-H8002
(CH1 set-point-1) and H8005-H8004 (CH1 set-point-2) on expansion memory.
This sample program assumes that your P16232/762 are allocated to XW000 and
YW001.
• Writing the set-point data
Channel 1 Set-point-1 = 150000
Set-point-2 = 200
R0101
　
Y0010
1 ( )
　
Y0012
( )
At the rising edge of R0100 coming ON, the data 150000 and 200 are written into the
addresses H8003•H8002 (CH1 set-point-1) and H8005(H8004 (CH1 set-point-2).
! CAUTION
7
6F8C0841 59
Chapter7 　SAMPLE PROGRAMS
7.4 Reading the Count Value
This sample program reads the count value of Channel 1.
When X0003 (bit 3 on status register XW0: CH1 status register) is ON, the count value of
channel 1 is read out of H8000 on expansion memory and written onto D0101-D0100 on
the double-word register.
This sample program assumes that your P1632/672 are allocated to XW000 and YW001.
• Reading the count value
X0003
［ -32768 MOV RW068 ］［ 00002 MOV RW061 ］
(H8000)
1
［ XW000 READ RW060 → D0100 ］
When X0003 (CH1 gate status) is ON, the count value is read and stored in the
double-word register D0101•D0100.
To use the status register (XW000), direct I/O instruction is necessary in the
program.
7.5 Reading the Hold Value

This sample program reads the hold value of Channel 1.
When R0101 is ON, the hold value of channel 1 is read out of H8006 on expansion
memory and written onto D0103-D0102 on the double-word register.
This sample program assumes that your PI632/672 are allocated to XW000 and YW001.
• Reading the hold value
7 R0101
［ -32762 MOV RW060 ］［ 00002 MOV RW061 ］
(H8006)
1
［ XW000 READ RW060 → D0102 ］
When R0101 is ON, the hold value is read and stored in the double-word register
D0103•D0102.
! CAUTION
The hold value register is used for reading only.
Do not use the register for writing data.

Chapter 8 When Using a Non-S2T Controller
8.1 The Differences

The functions of the PI632/672 vary depending on the controller you use. Chapters 1
through 7 describe the case when you use an S2T controller. The following table lists the
differences when you use a non-S2T controller, such as an S2. For more details, see
Section 8-2 and the following sections.
Difference S2T Non-S2T (S2 / L2) Remarks

Tool used T-PDS Integrated controller See the corresponding
(T series programmer) engineering tool user’s manual for how
to manipulate the tool.
Maximum ・When the interrupt ・When the interrupt The interrupt function
number of function is enabled: 4 function is enabled: 4 is effective only when
PI632/672s modules (in use of modules (in use of the module is mounted
allowed per the BU648E) the BU648E) on the basic unit. The
controller ・When the interrupt 8 modules (in use of only S2PU22 is usable
as the basic unit.
function is disabled: the BU668)
Arbitrary ・When the interrupt
function is disabled:
Arbitrary
Input register XWn %IWn
Output register YWn+1 %QWn+1
Bit expression Hexadecimal numbers Decimal numbers
by the register (0 to F) (0 to 15)
Module X+Y 2W %I/QW register 4W 2W at topof the regis-
allocation area ters can be used for a
non-S2T controller.
Extended H80 ＊＊ H00 ＊＊ "＊＊ " indicates "00"
memory to "19".
address
expression
Extended READ command MREAD command Reads from memory
memory WRITE command MWRITE command Writes into memory
access
command
6F8C0841 61
第 8 章　When Using a Non-S2T Controller
8.2 I/O Module Registration and I/O Registers
(1) Register your PI632 (or PI672) on the installation slot position for the PI632 (or
PI672) from the configuration editor screen of the engineering tool.
(2) Your PI632 (or PI672) is allocated to "n" on 4-word area in the %I/QW register of the
control module. However, only the first 2 words alone are used actually.
("n" indicates a register number, which varies depending on the installation of other
I/IO modules. You can check the register number from the I/O connection screen of
the engineering tool.)
ﾚｼﾞｽﾀ番号
Register number ％Ｉ/ＱＷレジスタ
%I/QW register
Address
ｱﾄﾞﾚｽ（直接表記）
(direct expression)
0 %IW0 or %QW0
1 %IW1 or %QW1
2 %IW2 or %QW2
3
4
％Ｉ/ＱＷレジスタ
%I/QW register n-1
４Ｗ領域
4W area n ｽﾃｰﾀｽﾚｼﾞｽﾀ
Status
n + 1 Command
register
ｺﾏﾝﾄﾞﾚｼﾞｽﾀ
%IWn (Input（入
%IWn
%QWn+1(Output
register %QWn+1
力レジスタ）
register)
（出力register)
レジスタ）
PI632（または PI672）
PI632 (or PI672)
allocation
割付け領域 area n+2 （不使用）
(Unassigned)
n+3 （不使用）
(Unassigned)
n+4
1263
1264
1265
1266
8 1267

8.2 I/O Module Registration and I/O Registers
(3) In the user program, addresses of I/O variables are written in direct expression.
However, you can write variable names for I/O variables after having defined and
registered such variable names in the symbol editor screen of the engineering tool.
Variable names are arbitrary (20-byte characters or less).
In this book, the following variable names are used in Chapter 8.
Register expression
Register address
Register Variable name registered
(Direct expression)
Status register %IWn PI_STS
Command register %QWn+1 PI_CMD
Bit expression
Bit address
Bit Variable name registered
(Direct expression)
Bit 0 for status register %IXn.0 PI_STS_0
: : :
Bit 15 for status register %IXn.15 PI_STS_15
Bit 0 for command register %QXn+1.0 PI_CMD_O
: : :
Bit 15 for command register %QXn+1.15 PI_CMD_15
(4) When accessing the extended memory register of the PI632/672 in the user pro-
gram, use the following commands (refer to A.3 and A.4 in Appendix.):
8
・ When reading data: MREAD command
・ When writing data: MWRITE command
6F8C0841 63
The following table indicates the functions of the I/O registers assigned to the PI632/672.
ＦＥＤＣＢＡ９８７６５４３２１０
PI_STS 不使用（不定）
Unassigned (unknown) ステータス
Status register
PI_CMD 不使用（０）
Unassigned (0) コマンド
Command register
チャンネル２
Channel 2 チャンネル１
Channel 1
（ＣＨ２）（ＣＨ１）
(CH2) (CH1)
Register Bit Name Description

15-8 -
7 CH2 gate status Unassigned ( data undefined)
6 CH2 EXT status 1:while CH2’s gate input and soft-gate are ON.
CH2 has a set-
5 point value less 1: while CH2’s EXT input is ON
than 2
CH2 has a set-
4 point value 1: while CH2 count value < set-point-2
PI_STS exceeding 1
3 CH1 gate status 1: while CH2 count value > set-point 1
2 CH1 EXT status 1: while CH1’s gate input and soft-gate are ON
CH1 has a set-
1 point value less 1: CH1’s EXT input is ON
than 2
CH1 has a set-
0 point value 1: while CH1’s count value < set-point-2
exceeding 1
Unassigned ( set
15-8 1: while CH1’s count value > set-point-1
to 0)
8 7
CH2 input dis-
abled
Sets 0 to disable CH2’s count input.
CH2 output
6 Sets 1 to enable CH2’s comparison output.
enabled
CH2 interrupt
5 Sets 1 to enable CH2’s interrupt.
enabled
PI_CMD
4 CH2 soft-gate Sets 1 to enable CH2’s counter function.
CH1 input dis-
3 Sets 1 to disable CH1’s count input.
abled
CH1 output
2 Sets 1 to enable CH1’s comparison output.
enabled
CH1 interrupt
1 Sets 1 to enable CH1’s interrupt.
enabled
0 CH1 soft-gate Sets 1 to enable CH1’s counter function.

8.3 Expansion Memory
8.3 Expansion Memory

Data, such as the count values, set-point values, and operation modes of the PI632/672
are stored on the expansion memory of the PI632/672.
8.3.1 Memory Map

The contents of expansion memory are the same between the PI632 and the PI672
although their addresses are different from the case when an S2T controller is used.
アドレス
Address ワードデータ
Word data
H0000 チャンネル１
Channel 1 チャンネル１カウンタレジスタ（24
Channel 1 counter register (24 bits) ビット）
カウント値
count value
Channel 1 チャンネル１上限比較値（24 ビット）
Channel 1 upper limit comparison value (24 bits)
設定値１
set-point-1
Channel 1 チャンネル１下限比較値（24 ビット）
Channel 1 lower limit comparison value (24 bits)
設定値２
set-point-2
Channel 1 チャンネル１ホールドレジスタ（24
Channel 1 hold register (24 bits) ビット）
ホールド値
hold value
H0008 チャンネル２
Channel 2 チャンネル２カウンタレジスタ（24
Channel 2 counter register (24 bits) ビット）
カウント値
count value
H000A チャンネル２
Channel 2 チャンネル２上限比較値（24 ビット）
Channel 2 upper limit comparison value (24 bits)
設定値１1
set-point
H000C チャンネル２
Channel 2 チャンネル２下限比較値（24 ビット）
Channel 2 lower limit comparison value (24 bits)
設定値２
set-point-2
H000E チャンネル２
Channel 2 チャンネル２ホールドレジスタ（24
Channel 2 hold register (24 bits) ビット）
ホールド値
hold value 8
H0010 割込みフラグ（２ビット）
Interrupt flag (2 bits)
H0011 アクセス禁止
Access restricted
H0018 チャンネル１モード
Channel 1 mode
H0019 チャンネル２モード
Channel 2 mode
H001A
アクセス禁止
Access restricted
H003F
! CAUTION
The hold values (H0007-H0006, H000F-H000E) and the interrupt flag (H0010) are for read only.
Meanwhile, the mode registers (H0018 and H0019) are for writing only. The other addresses are
for reading and writing (except for the areas restricted).
6F8C0841 65
8.3.2 Expansion Memory Access
The contents of the expansion memory of the PI632/672 can be read by the MREAD
command. Also data can be written onto extended memory by the MWRITE command.
(refer to Appendix A.3 and Appendix A.4 respectively for ther MREAD command and the
MWRITE command.)
■ Definition of the Structure

TYPE 【Description】
PI_MEM:STRUCT Define a structure in advance because
CH1_CNT: DINT; the extended memory in the PI632/
CH1_SET1: DINT; 672 module will be a combined data
CH1_SET2: DINT; structure consisting of multiple data
CH1_HOLD: DINT; types. The definition allows to make
CH2_CNT: DINT; reference to variables in the program
CH2_SET1: DINT; when reading data on the extended
CH2_SET2: DINT; memory and writing set-point values
CH2_HOLD: DINT; on the extended memory.
CH1_INT: BOOL;
CH2_INT: BOOL;
DUMMY: ARRAY[0..6] OF INT;
CH1_MODE: WORD;
CH2_MODE: WORD;
END_STRUCT
END_TYPE
■ Reading Data on Expansion Memory
【Description】
メインタスク
Main task Declare variables in the data area to
transfer data from Boolean variables
VAR
BOOL1 and BOOL2 used in the
BOOL1: BOOL;
program and from the PI632
BOOL2: BOOL;
PI: PI_MEM;
8 END_VAR 【Description of Operation】
When BOOL1 = TRUE (1), 16-word
BOOL1 MREAD BOOL2 data are read from address H0000 on
E ( ) the extended memory of the PI632
16#0003 mounted in slot 3 of the basic unit and
LD T stored on the 16-word area that
16#0000 begins with variable PI.CH1_CNT.
LD TADR When BOOL1 = FALSE (0), this
PI.CH1_CN process is not executed.
T P
16
LD N

8.4 Sample Program
■ Writing Data on Expansion Memory
【Description】
メインタスク
Main task Declare variables in the data area to
VAR transfer data from Boolean variables
BOOL1: BOOL; BOOL1 and BOOL2 used in the
BOOL2: BOOL; program and from the PI632.
PI: PI_MEM;
END_VAR
【Description of Operation】
When BOOL1 = TRUE (1), the 2-word
BOOL1 MＷＲＩＴＥ BOOL2 setting data beginning with variable
E ( ) PI.CH1_MODE are transferred to the
16#0003 2-word area from address H0018 on
LD T the extended memory of the PI632
16#0018 mounted in slot 3 of the basic unit.
LD TADR When BOOL1 = FALSE (0), this
PI.CH1_MODE process is not executed.
LD P
2
LD N
8.4 Sample Program

8.4.1 Definition of the Structure
Define a structure in advance because the extended memory in the PI632/672 module
will be a combined data structure consisting of multiple data types. The definition allows
8
to make reference to variables in the program when reading data on the extended
memory and writing set-point values on the extended memory.
TYPE
PI_MEM:STRUCT
CH1_CNT: DINT;
CH1_SET1: DINT;
CH1_SET2: DINT;
CH1_HOLD: DINT;
CH2_CNT: DINT;
CH2_SET1: DINT;
CH2_SET2: DINT;
CH2_HOLD: DINT;
CH1_INT: BOOL;
CH2_INT: BOOL;
DUMMY: ARRAY[0..6] OF INT;
CH1_MODE: WORD;
CH2_MODE: WORD;
END_STRUCT
END_TYPE
6F8C0841 67
8.4.2 Setting an Operation Mode
This program sets the operation mode of channel 1 to a 90-degree phase-differential bi-
pulse counter mode (pulse mode = frequency multiply, gate force = none, A/B phase =
normal). Mode data H0042 are written on address H0018 of the extended memory (CH1
mode) on the second scan.
The following sample program assumes that the extended memory of the PI632/672 has
the same structure defined in 8.4.1, Definition of the Structure. The PI632/672 is
assumed to have been mounted in slot 3 (S3) of the basic unit.
メインタスク
Main task
VAR
BOOL1: BOOL;
BOOL2: BOOL;
PI: PI_MEM;
END_VAR
MOVE_WORD BOOL1
EN 　　　　ENO
16#0042 PI.CH1_MODE
LD SET
BOOL2
E MＷＲＩＴＥ
16#0003
LD
T
16#0018
LD
TADR
PI.CH1_MODE
LD
P
1
LD
N
8 ! CAUTION
(1) Make a program so that writing an operation mode and set-point values (WRITE command)
is executed on the second scan or later. (No writing is made even when the WRITE
command is executed on the first scan.)
(2) Reading data in the operation mode register is restricted.

8.4 Sample Program
8.4.3 Writing in the Command Register
Channel 1 Soft-gate (PI_CMD_0) = TRUE (1)
Interrupt enabled (PI_CMD_1) = TRUE (1)
Output enabled (PI_CMD_2) = TRUE (1)
When BOOL1 = TRUE (1), bits 0, 1, and 2 of the command register (PI_CMD_0,
PI_CMD_1, PI_CMD_2) are set to TRUE (1).
The following sample program assumes that the command register of the PI632/672 has
been defined with variable PI_CMD. Also the PI632/6762 is assumed to have been
mounted in slot 3 (S3) of the basic unit.
メインタスク
-
Main task
VAR
B OOL1: BOOL;
B OOL2: BOOL;
END _VAR
BOOL1 MOVE_WORD BOOL2

EN 　　　　 ENO
16#0007 PI_CMD
LD SET
! CAUTION 8
6F8C0841 69
8.4.4 Setting Comparison Set-Point Value Data
This program sets the following:
Channel 1 Set-point-1 = 150000
Set-point-2 = 200
When BOOL1 = TRUE (1), data 150000 and data 200 are respectively written on H0003-
H0002 (CH1 set-point-1) and H0005-H0004 (CH1 set-point-2) of the extended memory.
メインタスク
-
Main task
VAR
BOOL1: BOOL;
BOOL2: BOOL;
BOOL3: BOOL;
PI: PI_MEM;
END VAR
MOVE_DＩＮＴ MOVE_DＩＮＴ
　　　　ENO 　　　　ENO
BOOL1 BOOL2
EN EN
150000 PI.CH1_SET1 200 PI.CH1_SET2

LD SET LD SET
BOOL3
E MＷＲＩＴＥ
16#0003
LD
T
16#0002
LD
TADR
PI.CH1_SET1
LD
P
8 4
LD
N
! CAUTION

8.4 Sample Program
8.4.5 Reading the Count Value
This program reads the count value of CH1.
When PI_STS_3 (bit 3 of the status register: CH1 gate status) = TRUE (1), the count
value of CH1 is read from H0000 of the extended memory and stored in the register
whose variable name is PI.CH1_CNT.
メインタスク
-
Main task
VAR
BOOL1: BOOL;
PI: PI_MEM;
END_VAR
ＰＩ＿ＳＴＳ
PI_STS_3 BOOL1
3
E MＲＥAD
16#0003
LD
T
16#0000
LD
TADR
PI.CH1_CNT
LD
P
2
LD
N
6F8C0841 71
8.4.6 Reading the Hold Value
This program reads the hold value of Channel 1.
When CH1 gate status (PI_STS_3) = FALSE (0), the hold value of channel 1 is read from
H0006 of the extended memory and stored on the register whose variable name is
PI.CH1_HOLD.
メインタスク
-
Main task
VAR
BOOL1: BOOL;
PI：　　　PI_MEM;
　BOOL2: BOOL;
PI: PI_MEM;
END_VAR
PI_STS_3
BOOL1 1
BOOL2
E MＲＥAD
16#0003
LD
T
16#0006
LD
TADR
PI.CH1_HOLD
LD
P
2
LD
N
! CAUTION
The hold value register is for read only.
8 Don’t use it for writing data.

Appendix
A.1 Specification of the READ instruction
Special module data read
FUN 237 Special module data read (READ)

Reads designated range of data from the special module.
Input Execution output
[ A READ B → C ]
■ Function
• This instruction reads data from the expansion memory of the special module that is
designated by operand A, and stores them in S2T’s registers starting with operand C.
• The transfer source address (buffer memory address) is designated by operand B.
• The transfer size (number of words) is designated by operand B+1.
■ Operand
Register
Constant Index
Opr Name XW YW SW LW RW W T C D F IW OW I J K
Special
A √ √ √ √
module
Transfer
B √ √ √ √ √ √ √ √ √ √
parameter
Top register
C √ √ √ √ √ √ √ √ √ √
of destination
■ Program example
R0000
[ XW000 READ RW010 → D0100 ]
• When R0000 is ON, the expansion memory data of the size indicated by RW011,
starting with the address indicated by RW010 of the special module allocated to
XW000, are read and stored in D0100 and after.
• The maximum number of words to be read is 256 words. (16 words for PI632/672)
6F8C0841 73
　Appendix
Chapter
XW000 special module S2T
RW010 H8000
Expansion memory RW011 8
H8000 1234 READ D0100 1234
H8007 5678 8 words D0107 5678
NOTE(1) The special module can be designated not only by the assigned register, but
also by the mounting position. The mounting position is designated by a
constant data for the operand A as follows.
(Unit number) × 256 + (Slot number)

H
Slot number (hexadecimal)

Unit number (hexadecimal)
Unit number Hexadecimal Slot number Hexadecimal

0 H00 0 H00
1 H01 1 H01
2 H02 2 H02
3 H03 3 H03
4 H04
5 H05
6 H06
7 H07
For example, if a special module is mounted on Slot-4, Unit-0 (basic unit) and
allocated to XW008 - YW09, the following two READ instructions are the same.
[ XW008 READ RW010 → D0100 ]
[ H0004 READ RW010 → D0100 ]
NOTE(2) The READ instruction is not executed as error in the following cases. In these
cases, ERF (instruction error flag = S0051) is set to ON.
• When the operand A is other than a valid constant (see Note 1) or XW/YW
register.
• When the designated special module has been disconnected.
• When no answer error occurs with the designated special module.
• When the number of words transferred exceeds 256 words.
• When the source table of transfer is out of the valid range.
• When the destination table of transfer is out of the valid range.

A.2 Specification of the WRITE instruction
A.2 Specification of the WRITE instruction
Special module data write
FUN 238 Special module data write (WRITE)

Writes designated range of data into the special module.
Input Execution output
[ A WRITE B → C ]
■ Function
• This instruction transfers data stored in S2T’s registers starting with operand A into
the expansion memory of the special module that is designated by operand C.
• The destination address (expansion memory address) is designated by operand B.
• The transfer size (number of words) is designated by operand B+1.
■ Operand
Register
Constant Index
Opr Name XW YW SW LW RW W T C D F IW OW I J K
Top register
A √ √ √ √ √ √ √ √ √ √ √
of source
Transfer
B √ √ √ √ √ √ √ √ √ √
parameter
Special
C √ √ √ √
module
■ Program example
R0000
[ D0100 WRITE RW010 → YW001 ]
• When R0000 is ON, the register data of the size indicated by RW011, starting with
D0100, are transferred to the expansion memory starting with the address
indicated by RW010 of the special module allocated to YW001.
• The maximum number of words to be transferred is 256 words. (6 words for PI632/672)
S2T YW001 special module
RW010 H8002
RW011 4
Expansion memory
D0100 1234 WRITE H8002 1234
D0103 5678 4 words H8005 5678
6F8C0841 75
　Appendix
Chapter
NOTE(1) The special module can be designated not only by the assigned register, but
also by the mounting position. The mounting position is designated by a
constant data for the operand C as follows.
(Unit number) × 256 + (Slot number)

H
Slot number (hexadecimal)

Unit number (hexadecimal)
Unit number Hexadecimal Slot number Hexadecimal

0 H00 0 H00
1 H01 1 H01
2 H02 2 H02
3 H03 3 H03
4 H04
5 H05
6 H06
7 H07
For example, if a special module is mounted on Slot-2, Unit-1 (expansion unit
#1) and allocated to XW020 - YW021, the following two WRITE instructions
are the same.
[ D0100 WRITE RW010 → XW020 ]
[ D0100 WRITE RW010 → H0102 ]
NOTE(2) The WRITE instruction is not executed as error in the following cases. In
these cases, ERF (instruction error flag = S0051) is set to ON.
• When the operand C is other than a valid constant (see Note 1) or XW/YW
register.
• When the designated special module has been disconnected.
• When no answer error occurs with the designated special module.
• When the number of words transferred exceeds 256 words.
• When the source table of transfer is out of the valid range.
• When the destination table of transfer is out of the valid range.

A.3 Details of the MREAD Command
Special module data input
Input/Output Special module data input
MREAD
E Completion
Execution enabled output
Bus/Unit/Slot T
Block diagram MREAD
Top address of expansion TADR
memory
Transfer destination P
variable
Number of transfer N
words
EN input Pulsification Index modification

Modification
－－－
■ Argument
Argument Operand Type Constant Description Remarks
specified
E
Boolean
type ○ Execution enabled
input
T
16 bit array
length ○ Bus/Unit/Slot
Input TADR
16 bit array
type ○ Top address of
extended memory
0 to 7FFFH
P
Pointer
type － Transfer destina-
tion variable
N
Unassigned
integer ○ Number of transfer
words
1 to 256 words
Output － Boolean － Completion output
6F8C0841 77
　Appendix
Chapter
【Additional description of input argument】

) (1) Data structure of the Bus/Unit/Slot
15 12 11 8 7 0
Bus Unit Slot
16#00 to 16#0A: Effective
16#0 to 16#7: Effective ("0" for the basic unit)
)
(2)Top address of expansion memory
15 8 7 0
Extended memory address (16#0000 to 16#7FFF)
(3)Number of transfer words

15 14 8 7 0
Number of transfer words (1 to 256)
Bit<15>: When set to "1", an interrupt occurs on the special module.
■ Functions
・ While execution enabled input is FALSE (OFF), no data from the special module is
input.
・ While execution enabled input E is TRUE (ON), data is transferred into the CPU
module from expansion memory in the special module specified with an input
argument.
・ Arguments specify the transfer source (slot position of the special module installed,
top address of the expansion memory in the special module), transfer destination
(variables in the CPU module), and the number of transfer words.
・ When an error is detected during execution, the error flag for the system variable is
set.
・ From 1 to 256 words can be specified for the number of transfer words.
・ No input/output variable can be directly specified to the transfer destination variable.
Input Processing Output Error flag
FALSE(OFF) Not executed FALSE(OFF) －

TRUE(ON) Executed: during normal operation TRUE(ON) －
Not executed: Error TRUE(ON) TRUE(ON)

SIGNAL1 MREAD SIGNAL2

1 E 1
LD ST
SAMPLE1
16#1_1_06 T
LD
SAMPLE2
16#0100 TADR
LD
SAMPLE3
1234 P
LD
SAMPLE4
200 N
LD
Expansion memory address Transfer destination

in the special module variable SAMPLE3
15 0 15 0
16#0000
N=200W
TADR=16#0100 Transfer
N=200W
16#01C8
IO specified: SAMPLE1
Bus channel 1
Unit: 1
Slot: 8
16#7FFF
【Description of operation】
・ Variable SAMPLE1 specifies the slot position of the special module installed (Bus:
channel 1, Unit: 1, Slot: 1).
・ Variable SAMPLE 2 specifies the top address of the expansion memory in the special
module for reading.(16#0100)
・ Variable SAMPLE3 specifies the transfer destination variable.
・ Variable SAMPLE4 specifies the number of transfer words (200 words specified).
・ While SIGNAL1 is TRUE (ON), transfer is executed in the arguments specified
above. When the transfer has completed normally, variable SIGNAL2 turns TRUE
(ON).
■ Exception Handling
・ When the special module specified is not installed, or when the special module
cannot be accessed due to, for example, failure.
・ When the module specified is not a special module
・ When the number of transfer words exceeds 256 words
・ When the extended address of the special module (transfer source) is outside 0 to
7FFF.
・ When the range of the transfer destination variable specified is outside the area.
・ When an I/O variable is directly specified to the transfer destination variable.
When any of the above errors occurs, no transfer is executed, and the error flag for the
system variable turns TRUE (ON).
6F8C0841 79
　Appendix
Chapter
Special module data output
Input/Output Special module data output
MWRITE
E Completion
Execution enabled output
Bus/Unit/Slot T
Block diagram Top address of expansion TADR MWRITE
memory
５
Transfer source
variable
P
Number of tra
nsfer words
５ N
EN input Pulsification Index modification

Modification
－－－
■ Argument
Argument Operand Type Constant Description Remarks
specified
E
Boolean
type ○ Execution enabled
input
T
16 bit array
length ○ Bus/Unit/Slot
Input TADR
16 bit array
type ○ Top address of
extended memory
0 to 7FFFH
P
Pointer
type － Transfer source
variable
N
Unassigned
integer ○ Number of transfer
words
1 to 256 words
Output － Boolean － Completion output

【Additional description of input argument】

構
(1) Data structure of the Bus/Unit/Slot
15 12 11 8 7 0
Bus Unit Slot
16#00 to 16#0A: Effective
(2)Top address of expansion memory
15 8 7 0
Extended memory address (16#0000 to 16#7FFF)
(3)Number of transfer words

15 14 8 7 0
Number of transfer words (1 to 256)
Bit<15>: When set to "1", an interrupt occurs on the special module.
■ Functions
・ While execution enabled input is FALSE (OFF), no data from the special module is
input.
・ While execution enabled input E is TRUE (ON), data is transferred into the expansion
memory in the special module from transfer source variable in the CPU module
specified with an input argument.
・ Arguments specify the transfer source (variable in the CPU module), transfer
destination (slot position of the special module, top address of the expansion memory
in the special module), and the number of transfer words.
・ When an error is detected during execution, the error flag for the system variable is
set.
・ From 1 to 256 words can be specified for the number of transfer words.
・ No input/output variable can be directly specified to the transfer destination variable.
Input Processing Output Error flag
FALSE(OFF) Not executed FALSE(OFF) －

TRUE(ON) Executed: during normal opera- TRUE(ON) －
Not executed: Error TRUE(ON) TRUE(ON)
6F8C0841 81
　Appendix
Chapter
SIGNAL1 MWRITE SIGNAL2

1 E 1
LD ST
SAMPLE1
16#1_1_06 T
LD
SAMPLE2
16#0100 TADR
LD
SAMPLE3
1234 P
LD
SAMPLE4
200 N
LD
Transfer source variable Expansion address in

SAMPLE3 the special module
15 0 0 15
16#0000
N=200W
Transfer TADR=16#0100
N=200W
16#01C8
IO specified: SAMPLE1
Bus channel 1
nit: 1
Slot: 8
16#7FFF
【Description of operation】
・ Variable SAMPLE1 specifies the slot position of the special module installed (Bus:
channel 1, Unit: 1, Slot: 1).
・ Variable SAMPLE 2 specifies the top address of the expansion memory in the special
module for writing.(16#0100)
・ Variable SAMPLE3 specifies the transfer source variable.
・ Variable SAMPLE4 specifies the number of transfer words (200 words specified).
・ While SIGNAL1 is TRUE (ON), transfer is executed in the arguments specified above.
When the transfer has completed normally, variable SIGNAL2 turns TRUE (ON).
■ Exception Handling
・ When the special module specified is not installed, or when the special module
cannot be accessed due to, for example, failure.
・ When the module specified is not a special module
・ When the number of transfer words exceeds 256 words
・ When the extended address of the special module (transfer source) is outside 0 to
7FFF.
・ When the range of the transfer source variable specified is outside the area.
・ When an I/O variable is directly specified to the transfer source variable.
When any of the above errors occurs, no transfer is executed, and the error flag for the
system variable turns TRUE (ON).

Integrated Controller V series
model 2000 PULSE INPUT MODULE User’s Manual
1st edition 7th Jannery 2002 0867.1.0102
INFORMATION AND INDUSTRIAL SYSTEMS & SERVICES COMPANY

INDUSTRIAL EQUIPMENT DEPARTMENT
1-1, Shibaura 1-chome, Minato-ku, Tokyo 105-8001, Japan

Tel.:+81-3-3457-4900 Fax.:+81-3-5444-9268
C TOSHIBA Corporation 2001-2002

All Rights Reserved.
6F8C0841

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6F8C0841

Indicates a potentially hazardous situation which, if not avoided,

Indicates a potentially hazardous situation which, if not avoided, can

Indicates a "may not" mark.

Indicate a mandatory action that you should never fail to do.

【Warning Mark on the model 2000】

ii model 2000 PULSE INPUT MODULE(PI632/672)

iv model 2000 PULSE INPUT MODULE(PI632/672)

5. Safety Precautions on Maintenance and Inspection

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6. Safety Precautions on Replacing Components

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x model 2000 PULSE INPUT MODULE(PI632/672)

・ When using an S2T controller:

・ When using an controller other than an S2T (namely an S2 / L2):

1.2 Operation mode overview. . . . . . . . . . . . . . . . . . . . . . . . . 2

1.3 External features. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

2.2 Functional specifications. . . . . . . . . . . . . . . . . . . . . . . . . 13

2.3 Input/output specifications . . . . . . . . . . . . . . . . . . . . . . . 14

2.4 Input/output internal circuit . . . . . . . . . . . . . . . . . . . . . . . 16

3.2 Signal connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

3.3 Wiring precautions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

Chapt4 Register Configuration . . . . . . . . . . . 27

4.2 PI632/672 expansion memory . . . . . . . . . . . . . . . . . . . . 29

Chapt5 Operation Mode Setting . . . . . . . . . . 37

5.2 Operation mode register setting . . . . . . . . . . . . . . . . . . . 38

Chapt6 Function Details . . . . . . . . . . . . . . . . 41

6.2 Up/down pulse counter mode . . . . . . . . . . . . . . . . . . . . . 44

6.3 Auto-reset universal counter mode. . . . . . . . . . . . . . . . . 47

6.4 Universal counter mode . . . . . . . . . . . . . . . . . . . . . . . . . 49

6.5 Speed counter mode . . . . . . . . . . . . . . . . . . . . . . . . . . . 51

6.6 Programmable interval timer mode. . . . . . . . . . . . . . . . . 53

xiii model 2000 PULSE INPUT MODULE (PI632/PI672)

Chapt7 SAMPLE PROGRAMS . . . . . . . . . . 57

7.2 Writing Data on the Command Register. . . . . . . . . . . . . 58

7.3 Setting Preset Value Data for Comparison. . . . . . . . . . . 59

7.4 Reading the Count Value . . . . . . . . . . . . . . . . . . . . . . . . 60

7.5 Reading the Hold Value . . . . . . . . . . . . . . . . . . . . . . . . . 60

Chapt8 When Using a Non-S2T Controller . 61

8.2 I/O Module Registration and I/O Registers. . . . . . . . . . . 62

8.3 Expansion Memory. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65

8.4 Sample Program. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67

A.2 Specification of the WRITE instruction . . . . . . . . . . . . . . 75

A.3 Details of the MREAD Command . . . . . . . . . . . . . . . . . . 77

A.4 Details of the MREAD Command . . . . . . . . . . . . . . . . . . 80

PI632 Voltage input 5 Vdc, 12 Vdc, or 24 Vdc (Selectable)

The PI632/672 has total 7 operation modes as listed below.

(1) Quadrature bi-pulse counter mode

1.2 Operation mode overview

1.2.1 Counter operation mode

2 model 2000 PULSE INPUT MODULE (PI632/PI672)

Pulse form (time chart)

set-point-2 (lower limit)

4 model 2000 PULSE INPUT MODULE (PI632/PI672)

(3) Auto-reset universal counter mode

(4) Universal counter mode

∆T: sampling time = 0.01s, 0.1s, or 1 s

(6) Programmable interval timer mode

6 model 2000 PULSE INPUT MODULE (PI632/PI672)

(7) Gate-ON timer mode

Upper limit (16777215)

Quadrature bi-pulse counter mode:

<Normal count mode>

xiii 　model 2000 PULSE INPUT MODULE (PI632/PI672)

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