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ACS755 050 Datasheet PDF
ACS755 050 Datasheet PDF
Deadline for receipt of LAST TIME BUY orders: April 30, 2011
Recommended Substitutions:
For existing customer transition, and for new customers or new appli-
cations, refer to the ACS758LCB-050U-PFF-T.
Allegro MicroSystems, Inc. reserves the right to make, from time to time, revisions to the anticipated product life cycle plan
for a product to accommodate changes in production capabilities, alternative product availabilities, or market demand. The
information included herein is believed to be accurate and reliable. However, Allegro MicroSystems, Inc. assumes no respon-
sibility for its use; nor for any infringements of patents or other rights of third parties which may result from its use.
ACS755xCB-050
Fully Integrated, Hall Effect-Based Linear Current Sensor IC
with High Voltage Isolation and a Low-Resistance Current Conductor
Typical Application
+5 V
1
4 VCC
IP+ CBYP
ACS755 0.1 µF
IP 2
GND
CF
5
IP– 3
VIOUT VOUT
RF
ACS755050-DS Rev. 11
Fully Integrated, Hall Effect-Based Linear Current Sensor IC
ACS755xCB-050
with High Voltage Isolation and a Low-Resistance Current Conductor
Description (continued)
The thickness of the copper conductor allows survival of the device isolators or other costly isolation techniques.
at up to 5× overcurrent conditions. The terminals of the conductive The device is fully calibrated prior to shipment from the factory.
path are electrically isolated from the signal leads (pins 1 through The ACS75x family is lead (Pb) free. All leads are plated with
3). This allows the ACS755 family of sensor ICs to be used in 100% matte tin, and there is no Pb inside the package. The heavy
applications requiring electrical isolation without the use of opto- gauge leadframe is made of oxygen-free copper.
Selection Guide
Primary Package
Sensitivity
TOP Sampled Bandwidth
Part Number Sens (Typ.) Packing1
(°C) Current, IP (kHz) Terminals Signal Pins
(mV/A)
(A)
ACS755LCB-050-PFF2 –40 to 150 50 60 18 Formed Formed 170 pieces per bulk bag
1 Contact Allegro for additional packing options.
2 Variantis in production but has been determined to be LAST TIME BUY. This classification indicates that the variant is obsolete and notice has been
given. Sale of the variant is currently restricted to existing customer applications. The variant should not be purchased for new design applications
because of obsolescence in the near future. Samples are no longer available. Status date change November 1, 2010. Deadline for receipt of LAST
TIME BUY orders is April 30, 2011.
TÜV America
Fire and Electric Shock
Certificate Number:
EN60950-1:2001
U8V 04 11 54214 001
+5 V
IP+ VCC
Voltage
Regulator
To all subcircuits
Dynamic Offset
Cancellation
VIOUT
Filter
Temperature
Gain Offset
Coefficient
Trim Control
IP– GND
Pin-out Diagram
IP+ 4
3 VIOUT
2 GND
1 VCC
IP– 5
ELECTRICAL CHARACTERISTICS, over operating ambient temperature range unless otherwise stated
Characteristic Symbol Test Conditions Min. Typ. Max. Units
Primary Sampled Current IP 0 – 50 A
Supply Voltage VCC 4.5 5.0 5.5 V
Supply Current ICC VCC = 5.0 V, output open 6.5 8 10 mA
Output Resistance ROUT IOUT = 1.2 mA – 1 2 Ω
Output Capacitance Load CLOAD VOUT to GND – – 10 nF
Output Resistive Load RLOAD VOUT to GND 4.7 – – kΩ
Primary Conductor Resistance RPRIMARY IP = +100A; TA = 25°C – 100 – μΩ
Isolation Voltage VISO Pins 1-3 and 4-5; 60 Hz, 1 minute 3.0 – – kV
PERFORMANCE CHARACTERISTICS, -20°C to +85°C, VCC = 5 V unless otherwise specified
Propagation time tPROP IP = +50 A, TA = 25°C – 4 – μs
Response time tRESPONSE IP = +50 A, TA = 25°C – 20 – μs
Rise time tr IP = +50 A, TA = 25°C – 20 – μs
Frequency Bandwidth f –3 dB , TA = 25°C – 18 – kHz
Over full range of IP , TA = 25°C – 60 – mV/A
Sensitivity Sens
Over full range of IP 53 – 65 mV/A
Peak-to-peak, TA = 25°C,
Noise VNOISE – 85 – mV
no external filter
Linearity ELIN Over full range of IP – – ±2.8 %
Zero Current Output Voltage VOUT(Q) I = 0 A, TA = 25°C – 0.6 – V
Electrical Offset Voltage I = 0 A, TA = 25°C –15 – 15 mV
VOE
(Magnetic error not included) I=0A –25 – 25 mV
Magnetic Offset Error IERROM I = 0 A, after excursion of 100 A – ±0.1 ±0.30 A
Total Output Error Over full range of I P , TA = 25°C – ±1.0 – %
ETOT
(Including all offsets) Over full range of IP – – ±10.0 %
PERFORMANCE CHARACTERISTICS, -40°C to +150°C, VCC = 5 V unless otherwise specified
Propagation time tPROP IP = +50 A, TA = 25°C – 4 – μs
Response time tRESPONSE IP = +50 A, TA = 25°C – 20 – μs
Rise time tr IP = +50 A, TA = 25°C – 20 – μs
Frequency Bandwidth f –3 dB , TA = 25°C – 18 – kHz
Over full range of IP , TA = 25°C – 60 – mV/A
Sensitivity Sens
Over full range of IP 53 – 65 mV/A
Peak-to-peak, TA = 25°C,
Noise VNOISE – 85 – mV
no external filter
Linearity ELIN Over full range of IP – – ±2.8 %
Zero Current Output Voltage VOUT(Q) I = 0 A, TA = 25°C – 0.6 – V
Electrical Offset Voltage I = 0 A, TA = 25°C –15 – 15 mV
VOE
(Magnetic error not included) I=0A –50 – 50 mV
Magnetic Offset Error IERROM I = 0 A, after excursion of 100 A – ±0.1 ±0.30 A
Total Output Error Over full range of IP , TA = 25°C – ±1.0 – %
ETOT
(Including all offsets) Over full range of IP – – ±11.0 %
Sensitivity (Sens). The change in device output in response to a it nominally remains at 0.6. Variation in VIOUT(Q) can be attributed
1 A change through the primary conductor. The sensitivity is the to the resolution of the Allegro linear IC quiescent voltage trim
product of the magnetic circuit sensitivity (G / A) and the linear and thermal drift.
IC amplifier gain (mV/G). The linear IC amplifier gain is pro-
grammed at the factory to optimize the sensitivity (mV/A) for the Electrical offset voltage (VOE). The deviation of the device out-
full-scale current of the device. put from its ideal quiescent value due to nonmagnetic causes.
Noise (VNOISE). The product of the linear IC amplifier gain Magnetic offset error (IERROM). The magnetic offset is due to
(mV/G) and the noise floor for the Allegro Hall effect linear IC the residual magnetism (remnant field) of the core material. The
(≈1 G). The noise floor is derived from the thermal and shot magnetic offset error is highest when the magnetic circuit has
noise observed in Hall elements. Dividing the noise (mV) by the been saturated, usually when the device has been subjected to a
sensitivity (mV/A) provides the smallest current that the device is full-scale or high-current overload condition. The magnetic offset
able to resolve. is largely dependent on the material used as a flux concentrator.
The larger magnetic offsets are observed at the lower operating
Linearity (ELIN). The degree to which the voltage output from temperatures.
the IC varies in direct proportion to the primary current through
its full-scale amplitude. Nonlinearity in the output can be attrib- Accuracy (ETOT). The accuracy represents the maximum devia-
uted to the saturation of the flux concentrator approaching the tion of the actual output from its ideal value. This is also known
full-scale current. The following equation is used to derive the as the total output error. The accuracy is illustrated graphically in
linearity: the output voltage versus current chart on the following page.
VIOUT_3/4 full-scale IP – VIOUT(Q)
100 1 – Accuracy is divided into four areas:
3 VIOUT_1/4 full-scale IP – VIOUT(Q)
0 A at 25°C. Accuracy at the zero current flow at 25°C, with-
where out the effects of temperature.
VIOUT_¼ full-scale IP (V) is the output voltage when the sampled 0 A over Δ temperature. Accuracy at the zero current flow
current approximates 0.25 IP(max), and including temperature effects.
VIOUT_¾ full-scale IP (V) is the output voltage when the sampled Full-scale current at 25°C. Accuracy at the the full-scale current
current approximates 0.75 IP(max). at 25°C, without the effects of temperature.
Quiescent output voltage (VIOUT(Q)). The output of the device Full-scale current over Δ temperature. Accuracy at the full-
when the primary current is zero. For a unipolar supply voltage, scale current flow including temperature effects.
Accuracy
25°C Only
Average
VIOUT
Accuracy
Over $Temp erature
Accuracy
25°C Only
Full Scale
IP(max)
0A
Decreasing VIOUT(V)
Rise time (tr). The time interval between a) when the device I (%) Primary Current
reaches 10% of its full scale value, and b) when it reaches 90% 90
of its full scale value. The rise time to a step response is used to
derive the bandwidth of the device, in which ƒ(–3 dB) = 0.35 / tr.
Transducer Output
Both tr and tRESPONSE are detrimentally affected by eddy current 10
Step Response
50 A Excitation Signal, TA=25°C
x050 Device
Excitation
Signal Output (mV)
14.0±0.2 0.5 B
R2 4
1.50±0.10
3.0±0.2 4.0±0.2
5 4 1º±2° 3 21.4
A
3.5±0.2
0.8
1.5
17.5±0.2
13.00±0.10
1.91
2.9±0.2 NNNNNNN
5º±5° TTT - AAA
1 2 3 +0.060
0.381 –0.030
10.00±0.10
3.5±0.2
LLLLLLL
YYWW
1
7.00±0.10
C Standard Branding Reference View
N = Device part number
T = Temperature code
A = Amperage range
L = Lot number
0.51±0.10 Y = Last two digits of year of manufacture
W = Week of manufacture
1.9±0.2
= Supplier emblem
For Reference Only; not for tooling use (reference DWG-9111, DWG-9110)
Dimensions in millimeters
Dimensions exclusive of mold flash, gate burrs, and dambar protrusions
Exact case and lead configuration at supplier discretion within limits shown