EC6009 ADVANCED COMPUTER ARCHITECTURE LTPC

3 0 03
OBJECTIVES:
The student should be made to:
 Understand the micro-architectural design of processors
 Learn about the various techniques used to obtain performance improvement and power
savings in current processors

UNIT I FUNDAMENTALS OF COMPUTER DESIGN 9

Review of Fundamentals of CPU, Memory and IO – Trends in technology, power, energy and cost,
Dependability - Performance Evaluation

UNIT II INSTRUCTION LEVEL PARALLELISM 9

ILP concepts – Pipelining overview - Compiler Techniques for Exposing ILP – Dynamic Branch
Prediction – Dynamic Scheduling – Multiple instruction Issue – Hardware Based Speculation – Static
scheduling - Multi-threading - Limitations of ILP – Case Studies.

UNIT III DATA-LEVEL PARALLELISM

9
Vector architecture – SIMD extensions – Graphics Processing units – Loop level parallelism.

UNIT IV THREAD LEVEL PARALLELISM 9

Symmetric and Distributed Shared Memory Architectures – Performance Issues –Synchronization –
Models of Memory Consistency – Case studies: Intel i7 Processor, SMT & CMP Processors

UNIT V MEMORY AND I/O

9
Cache Performance – Reducing Cache Miss Penalty and Miss Rate – Reducing Hit Time – Main
Memory and Performance – Memory Technology. Types of Storage Devices – Buses – RAID –
Reliability, Availability and Dependability – I/O Performance Measures.
TOTAL: 45 PERIODS

OUTCOMES:
At the end of the course, the student should be able to:
 Evaluate performance of different architectures with respect to various parameters
 Analyze performance of different ILP techniques
 Identify cache and memory related issues in multi-processors

TEXT BOOK:
1. John L Hennessey and David A Patterson, “Computer Architecture A Quantitative Approach”,
Morgan Kaufmann/ Elsevier, Fifth Edition, 2012.

REFERENCES:
1. Kai Hwang and Faye Briggs, “Computer Architecture and Parallel Processing”, Mc Graw-Hill
International Edition, 2000.
1
2. Sima D, Fountain T and Kacsuk P, ”Advanced Computer Architectures: A Design Space
Approach”, Addison Wesley, 2000.
COURSE COURSE K-
EC6009 Advanced Computer Architecture SEM 7
CODE NAME LEVEL
On completion of the course, the students will be able to
Explain the performance of different architectures with respect to various
CO1 K2
parameters
CO2 Describe the performance of different ILP techniques K2
CO3 Discuss the performance of different architectures & exploiting DLP K2
CO4 Illustrate the concepts of Transport level protocol. K2
CO5 Distinguish cache and memory related issues in multiprocessor. K2

CO/PO PO1 PO2 PO3 PO4 PO5 PO6 PO7 PO8 PO9 PO10 PO11 PO12 PSO1 PSO2
CO1 3 2 1
CO2 3 2 1
CO3 3 2 1
CO4 3 2 1
CO5 3 2 2
C404 3 2 1 - - - - - - - -- - - -