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 Necessity for Active Safety

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Daimler Chrysler <R129> 1997
X-by-Wire Operated with a Side Stick


 

GM <Hy-Wire> 2002Fuel Cell Vehicle


Power-train Platform with 11” Thickness. Layout-Free Cabin

     
    
    
"#!ToyotaEstima-Hybrid 
ariable Gear RatioHonda/S8000

"#!Daimlar Chrysler/SL, E-class Variable Gear Ratio Toyota/Land Cruiser

   

    


   

With X-By-Wire, Cars become…


Low Emission, Human Centered
Architecture Free Layout
For Energy Saving
Environment Regenerative Brake
Dry
Safety Drivability


 
 



   

Conventional X-By-Wire System

Hydraulic Brake-By-Wire
Brake
Hydraulic Steering Wheel Controller
Steer-
Steering Brake Pedal By-Wire

Hydraulic Pipe High-Speed


Bus

Mechanically Connected among Integrated Control Connecting


Actuators and Mechanics Components
via High-Speed Bus


 
 


  
  
     

   

 

 

 
  
  


 Inexpensive Dependability

     

     


      
   
  
   



     


 
   

  



     

 Low-Cost Dependable Technology

Cost Reduction
Production Scale of Controllers
10 102 103 104 105 106 (units/yr)

Aerospace Steel Railroad Automobile

Mass Production of LSI

Low-Cost Dependability with LSI Technology


 Redundant CPUs in One Chip
 Self-Checking / Failsafe Technology
 Optimal Clock Diversity

and Autonomous Decentralized Concept




     

 Our Expertise in Dependability
  
   

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 Making Controllers Dependable : Dual CPUs

Dual CPU Controller


Compares outputs of two CPUs.
Takes fail-safe mode operation, if there is a difference.

Optimal Clock Diversity Self-Checking Comparator


 Operates CPUs out-of-phase  Self-checks its own operation
 Improves noise immunity  Compares output of two CPUs

Applications
CLK Digital ATC
Crossing Controller

CPU SC CPU
A CMP B
Fail-Safe I/O
 Executes fail-safe mode
operation on CPU failure
FS-I/O



     

 Self-Checking Comparator

Comparison of two outputs


an
Test Pattern Generator
CPU A a0 a1 a2
inputs cyclic error signals
CPU B b0 b1 b2 bn
intentionally

Test Pattern Generator


Exclusive-OR Normal
Exclusive-OR

a0 Error
c0 0 : Normal
b0 1 : Error Error

an cn
bn

Comparator



     

 Effects of Time Diversity

    

  

       



  

       



  
hold
Noise Sensitive Window

Clock in A
Distance Distance
set up

Clock in B
Phase Difference

  


     

 Effects of Time Diversity
Correlated Error Rate

Correlated Error Rate


d
1.0 2.0 3.0
(a) Macro Effect [clocks]
d
(c) Overall Effect
*
Correlated Error Rate

Correlated Error Rate


simultaneous error
0.4
coincident error
0.3

0.2

0.1

1.0 2.0 3.0 [clocks] 0 0.0 0.5 1.0 1.5 2.0


d optimal points
(b) Micro Effect    
 


     

      

MP(A) MP(B)

Self-Checking Comparator
MP(A) MP(B)
RAM RAM
RAM CPU RAM CPU

CPU CPU
Peripherals Peripherals
Peripherals Peripherals
Self-Checking Comparator
RAM RAM
External Bus

Process 0.35 m 5 Metal CMOS


Hard Macros PLL x 2, RAM(40KB)
Random Logic 740k gates
Chip Size 14.75 mm
Operating Frequency 60 MHz
Power Dissipation 2.6W @ 60MHz
Package 479pin BGA
     

 Autonomous Decentralized Systems

    

 
   

         

 
   
   
 
  
    

 




       
           
          
 



     
 Hitachi’s R&D on Automotive Systems
Gas Turbine
Nuclear Reactor Combustion Analysis
-Hydraulic Dynamics Sim.

Power IC

Automotive Systems

Environment Safety
Low Emission Drivability
Target
Motors, Generators RISC
Processors
Information
Service

Train Control Car Navigation




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