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Write a program using string instruction to accept a string from keyboard and
check for palindrome and accordingly display appropriate message.
05M Dec-17 June-18
Note: Function 0AH is used to read a string of characters from keyboard.
.MODEL SMALL
.DATA
STR DB 'MALAYALAM'
LEN EQU $-STR
HALFLEN DW LEN/2
Write an ALP to search a given character in the array of characters using string
instructions and also find the search position.
.MODEL SMALL
.DATA
ARRAY DB 11H, 22H, 43H, 55H, 89H, 09H, 78H, 66H, 77H, 59H
SER_NO DB 09H
SER_POS DB ?
.CODE
mov AX,@data
mov DS,AX
mov SI,0
mov DI,len
dec DI
mov CX,halflen
back: mov AL,str[SI]
xchg AL,str[DI]
mov str[SI],AL
inc SI
dec DI
loop back
mov AH,4CH
int 21H
end
PB0 – PB7 These 8-bit bi-directional I/O pins are used to send data to
(Port B) output device and to receive data from input device.
These 8-bit bi-directional I/O pins are divided into two groups PCL
(PC3-PC0) and PCU (PC7-PC0). These groups individually can
PC0 – PC7
transfer data in or out when programmed for simple I/O, and
(Port C)
used as handshake signals when programmed for handshake or
bi-directional modes.
When this pin is low, the CPU can read the data in the ports or
(Read)
the status word, through the data buffer.
When this pin is low, the CPU can write data on the ports or in
(Write)
the control register through the data bus buffer.
This is an active low input which can be enabled for data transfer
(Chip Select)
operation between the CPU and the 8255.
This is an active high input used to reset 8255. When RESET
Reset input is high, the control register is cleared and all the ports are
set to the input mode.
These input signals along with RD and WR inputs control the
A0 and A1 selection of the control/status word registers or one of the three
ports.
Port B: This has an 8-bit data I/O latch/buffer and an 8-bit data input buffer. It can be
programmed in mode 0 and mode 1.
Port C: This has one 8-bit unlatched input buffer and an 8-bit output latch/buffer. Port C
can be splitted into two parts and each can be used as control signals for port A and B in
the handshake mode. It can be programmed for bit set/ reset operation.
I/O Modes:
Mode 0 – Simple Input/ Output
In this mode, ports A, B are used as two simple 8-bit I/O ports, Port C as two 4-bit ports.
Each port can be programmed to function as simply an input port or an output port.
The input/output features in Mode 0 are as follows:
• Outputs are latched.
• Inputs are buffered, not latched.
• Ports do not have handshake or interrupt capability.
The eight possible combinations of the status of bits D3 – D1 (B2 B1 B0) in the Bit Set-Reset
format determine particular bit in PC0 – PC7 being set or reset as per the status of bit D0. A
BSR word is to be written for each bit that is to be set or reset.
For example, if bit PC3 is to be set and bit PC4 is to be reset, appropriate BSR words that
will have to be loaded into the control register will be, 0XXX0111 and 0XXX1000,
respectively, where X is don’t care.
Example-4:
(a) Find the control word if PA = Out, PB = in, PC0-PC3 = in and PC4-PC7 = out.
(b) Program the 8255 to get data from Port B and Send it to Port A. In addition, data
from PCL is sent out to the CPU. Use port address of 300H – 303H for the 8255 chip.
Solution:
a) Using the control word format of I/O mode we get the control word of 1000 0011 in
binary or 83H.
Example-5:
Example-6:
• In buffering, the data bus is accessed only for a specific address range, and access by
any address beyond the range is blocked.
• The following Fig shows how the I/O address range 300H-31FH is buffered with the
use of the 74LS245.
• The following Fig shows another example of 8255 interfacing using the 74LS138
decoder. As shown in the Fig., Y0 and Y1 are used for the 8255 and 8253,
respectively. The Table shows the 74LS 138 address assignment.
The following Fig shows the circuit for buffering all the buses. The 74LS244 is used to boost
the address and control signals.
Example 7:
Write an ALP to read PB and Check number of one’s in a given 8-bit data at PB
and display FFH on PA if it is even parity else 00H on PA if it is odd parity. 05M
Dec-17
.MODEL SMALL
.DATA
PA EQU 0300H
PB EQU 0301H
PC EQU 0302H
CWR EQU 0303H
.CODE
MOV AX, @DATA
MOV DS, AX
MOV DX, CWR
MOV AL, 82H ; PB is input and PA is output
OUT DX, AL
MOV CX, 08H
CLC
XOR BH, BH
MOV DX, PB
IN AL, DX ; Read the data from PB
L1: ROL AL, 01H
JNC SKIP
INC BH ; Count number of ones
SKIP: LOOP L1
MOV AL, BH
MOV BL, 02H
MOV AH, 00H
DIV BL
CMP AH, 00H ; check for remainder
JZ EVEN1 ; if remainder is zero then even number of ones
MOV AL, 00H
JMP DISP
With an example, explain how to identify overflow and underflow using flags in a
flag register for performing arithmetic operation on 16-bit number. 06M Dec-17
June-17 and June-18
MOV AX,74F5H
ADD AX,95EBH
Note that storing values that are too low in an integer variable (e.g. attempting to store
-1 in an unsigned integer) is properly referred to as integer overflow, or more broadly
"integer wraparound". The term underflow normally refers to floating point
numbers only.