DIGITAL SYSTEM DESIGN

MINIPROJECT REPORT

16-BIT COMPARATOR USING XILINX SOFTWARE

BY

Rahul Parab

Sanchit Patil

Vedant Pawar

Prasanna Shinde

Under the Guidance of:-

Prof. Sonam Kandalgaonkar

Atharva College of Engineering

Malad-Marve Road, Charkop Naka, Malad (W), Mumbai-95

Department of Electronics Engineering

University of Mumbai

Year 2018-2019

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 CONTENT

Serial No. Topic Pg. No.

1. Introduction 03

2. Working 05

3 Software Used 07

4. Assembly code and output 09

5. Advantages & Disadvantages 12

6. Applications 13

7. Conclusion 14

8. References 15

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 1. INTRODUCTION

Data comparison is needed in digital systems while performing arithmetic or logical

operations. This comparison determines whether one number is greater than, equal, or less than
the other number. A magnitude digital Comparator is a combinational circuit that compares two
digital or binary numbers in order to find out whether one binary number is equal, less than or
greater than the other binary number. We logically design a circuit for which we will have two
inputs one for A and other for B and have three output terminals, one for A > B condition, one
for A = B condition and one for A < B condition. Comparators are used in central processing
unit s (CPUs) and microcontrollers (MCUs).

Along with being able to add and subtract binary numbers we need to be able to compare them
and determine whether the value of input A is greater than, smaller than or equal to the value at
input B etc. The digital comparator accomplishes this using several logic gates that operate on
the principles of Boolean Algebra. There are two main types of Digital Comparator available and
these are.

 Identity Comparator – an Identity Comparator is a digital comparator with only one

output terminal for when A = B, either A = B = 1 (HIGH) or A = B = 0 (LOW)

 Magnitude Comparator – a Magnitude Comparator is a digital comparator which has

three output terminals, one each for equality, A = B greater than, A > B and less
than A < B

Fig. 1.1: Block diagram of 16-bit magnitude comparator

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The purpose of a Digital Comparator is to compare a set of variables or unknown numbers, for
example A (A1, A2, A3, …. An, etc) against that of a constant or unknown value such as B (B1,
B2, B3, …. Bn, etc.) and produce an output condition or flag depending upon the result of the
comparison. This is useful if we want to compare two variables and want to produce an output
when any of the above three conditions are achieved.

In this digital comparator we have chosen VHDL programing language to design the 16 bits
magnitude comparator. VHDL in short or (VHSIC Hardware Description Language) is a
hardware description language used in electronic design automation to describe digital and
mixed-signal systems such as field-programmable gate arrays and integrated circuits. VHDL can
also be used as a general purpose parallel programming language. The hardware in the
comparator can be reduced by implementing only two outputs, and the third output can be
obtained using these two outputs.

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 2. WORKING

The circuit for comparing two n-bit numbers has 22n entries in the truth table and
becomes too cumbersome, even with n= 3. On the other hand, as one may suspect. a
comparator circuit possesses a certain amount of regularity. Digital functions that possess an
inherent well-defined regularity can usually be designed by means of an algorithm—a
procedure which specifies a finite set of steps that, if followed, give the solution to a problem.
We illustrate this method here by deriving an algorithm for the design of a four-bit magnitude
comparator. The algorithm is a direct application of the procedure a person uses to compare the
relative magnitudes of two numbers.

Consider two numbers, A and B, with four digits each. Write the coefficients of the numbers in
descending order of significance:

A=A3 .A2 .A1 .A0

B=B3 .B2 .B1 .B0

Each subscripted letter represents one of the digits in the number. The two numbers are equal if
all pairs of significant digits are equal: A3 = B3, A2 = B2, A1 = B1 and A0 = B0. When the
numbers are binary, the digits are either 1 or 0, and the equality of each pair of bits can be
expressed logically with an exclusive-NOR function as

Xi=Ai.Bi+Ai’.Bi’

Where x = I only if the pair of bits in position i are equal (i.e., if both are 1 or both are 0).

The equality of the two numbers A and B is displayed in a combinational circuit by an output
binary variable that we designate by the symbol (A = B). This binary variable is equal to 1 if the
input numbers, A and B, are equal, and is equal to 0 otherwise. For equality to exist, all
xi variables must be equal to 1, a condition that dictates an AND operation of all variables:

(A = B) = x3x2x1x0

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The binary variable (A = B) is equal to I only if all pairs of digits of the two numbers are equal.
To determine whether A is greater or less than B, we inspect the relative magnitudes of pairs of
significant digits, starting from the most significant position. If the two digits of a pair are equal.
We compare the next lower significant pair of digits. The comparison continues until a pair of
unequal digits is reached. If the corresponding digit of A is 1 and that of B is 0, we conclude
that A > B. If the corresponding digit of A is 0 and that of B is 1, we have A < B.

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 3. SOFTWARE

VHDL is commonly used to write text models that describe a logic circuit. Such a model
is processed by a synthesis program, only if it is part of the logic design. A simulation program
is used to test the logic design using simulation models to represent the logic circuits that
interface to the design. This collection of simulation models is commonly called a test bench
VHDL simulator is typically an event-driven simulator.[11] This means that each transaction is
added to an event queue for a specific scheduled time. E.g. if a signal assignment should occur
after 1 nanosecond, the event is added to the queue for time +1ns. Zero delay is also allowed,
but still needs to be scheduled: for these cases Delta delay is used, which represent an infinitely
small time step. The simulation alters between two modes: statement execution, where triggered
statements are evaluated, and event processing, where events in the queue are processed.

VHDL has constructs to handle the parallelism inherent in hardware designs, but these
constructs (processes) differ in syntax from the parallel constructs in Ada (tasks). Like Ada,
VHDL is strongly typed and is not case sensitive. In order to directly represent operations which
are common in hardware, there are many features of VHDL which are not found in Ada, such as
an extended set of Boolean operators including nand and nor.VHDL has file input and output
capabilities, and can be used as a general-purpose language for text processing, but files are more
commonly used by a simulation test bench for stimulus or verification data. There are some
VHDL compilers which build executable binaries. In this case, it might be possible to use VHDL
to write a test bench to verify the functionality of the design using files on the host computer to
define stimuli, to interact with the user, and to compare results with those expected. However,
most designers leave this job to the simulator.

It is relatively easy for an inexperienced developer to produce code that simulates

successfully but that cannot be synthesized into a real device, or is too large to be practical. One
particular pitfall is the accidental production of transparent latches rather than D-type flip-
flops as storage elements. One can design hardware in a VHDL IDE (for FPGA implementation
such as Xilinx ISE, Alters Quart us, Synopsys Simplify or Mentor Graphics HDL Designer) to
produce the RTL schematic of the desired circuit. After that, the generated schematic can be
verified using simulation software which shows the waveforms of inputs and outputs of the
circuit after generating the appropriate test bench. To generate an appropriate test bench for a
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particular circuit or VHDL code, the inputs have to be defined correctly. For example, for clock
input, a loop process or an iterative statement is required. A final point is that when a VHDL
model is translated into the "gates and wires" that are mapped onto a programmable logic device
such as a CPLD or FPGA, and then it is the actual hardware being configured, rather than the
VHDL code being "executed" as if on some form of a processor chip.

Xilinx ISE (Integrated Synthesis Environment) is a software tool produced by Xilinx for
synthesis and analysis of HDL designs, enabling the developer to synthesize ("compile") their
designs, perform timing analysis, examine RTL diagrams, simulate a design's reaction to
different stimuli, and configure the target device with the programmer.

Xilinx ISE is a design environment for FPGA products from Xilinx, and is tightly-
coupled to the architecture of such chips, and cannot be used with FPGA products from other
vendors.[3] The Xilinx ISE is primarily used for circuit synthesis and design, while ISIM or
the ModelSim logic simulator is used for system-level testing. Other components shipped with
the Xilinx ISE include the Embedded Development Kit (EDK), a Software Development Kit
(SDK) and Chip Scope Pro.

The primary user interface of the ISE is the Project Navigator, which includes the design
hierarchy (Sources), a source code editor (Workplace), an output console (Transcript), and a
processes tree (Processes). The Design hierarchy consists of design files (modules), whose
dependencies are interpreted by the ISE and displayed as a tree structure. For single-chip designs
there may be one main module, with other modules included by the main module, similar to
the main () subroutine in C++ programs. Design constraints are specified in modules, which
include pin configuration and mapping.

The Processes hierarchy describes the operations that the ISE will perform on the
currently active module. The hierarchy includes compilation functions, their dependency
functions, and other utilities. The window also denotes issues or errors that arise with each
function. The Transcript window provides status of currently running operations, and informs
engineers on design issues. Such issues may be filtered to show Warnings, Errors, or both.

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 4. ASSEMBLY CODE AND OUTPUT

library IEEE;

use IEEE.STD_LOGIC_1164.ALL;

use IEEE.STD_LOGIC_ARITH.ALL;

use IEEE.STD_LOGIC_UNSIGNED.ALL;

---- Uncomment the following library declaration if instantiating

---- any Xilinx primitives in this code.

--library UNISIM;

--use UNISIM.VComponents.all;

entity comp is

generic (N:integer := 16);

Port ( x : in STD_LOGIC_VECTOR(N-1 downto 0);

y : in STD_LOGIC_VECTOR(N-1 downto 0);

g : out STD_LOGIC;

e : out STD_LOGIC;

l : out STD_LOGIC);

end comp;

architecture Behavioral of comp is

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begin

process(x, y)

begin

g <= '0';

e <= '0';

l <= '0';

if (x > y) then

g <= '1';

elsif (x = y) then

e <= '1';

elsif (x < y) then

l <= '1';

end if;

end process;

end Behavioral;

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OUTPUT

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 5. ADVANTAGES & DISADVANTAGES

Advantages of Comparator
 Many fundamental processes in communication and computing systems require data sorting.
compare of data are vital for sorting. Comparator handles this task with ease.
 Magnitude comparators allow comparing in purely digital domain.
 In conventional computer systems, instructions SUBTRACT and COMPARE often shares the
hardware. This can reduce time complexity and cost. At this time, a high-performance and compact
comparator is very important. This can speed up the overall processing speed.
 Due to VHDL, the complex comparator logic circuit becomes very simple and by doing small
changes in the existing code, we can design an n-bit comparator. For example, 8-bit, 32-bit etc.

Disadvantages of Comparator
 It needs to much logical gate to implement this circuit. So complexity is higher. As a result
processor needs too much time to execute it.
 The operation cannot be seen in normal FPGA board due to much terminal declaration.

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 6. APPLICATIONS

 Comparators are used in central processing units (CPUs) and microcontrollers (MCUs).
 These are used in the address decoding circuitry in computers and microprocessor based devices
to select a specific input/output device for the storage of data.
 These are used in control applications in which the binary numbers representing physical
variables such as temperature, position, etc. are compared with a reference value.
 Comparators are also used as process controllers and for Servo motor control.
 A They also can be employed to convert analog signals into digital patterns.
 Used in password verification and biometric applications.
 A digital comparator also can be used in conjunction with a number of other devices to act as a
monitor in an industrial setting to see accurate digital information about the state of a machine.
 Beyond computer processors, a digital comparator can be used in some devices that contrast
visual images with digital images, as can be the case in engineering that relies on computer-aided
drafting (CAD) programs to check if the physically manufactured products match specifications.

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 7. CONCLUSION

The comparator can only handle binary data, meaning that whatever the input mechanism
is, the signal coming into the circuit can only have two states, which commonly are referred to as
zero and one. The circuit can be designed to handle multiple bits at the same time, as is done on
the CPU of most computers. This is a multilevel implementation and has a regular pattern. The
procedure for obtaining magnitude comparator circuits for binary numbers with more than four
bits is obvious from this example.

Once the program has been compiled, the resulting machine code is saved separately, and
can be run on its own at any time. As with assembly-language programs, updating or correcting a
compiled program requires that the original (source) program be modified appropriately and then
recompiled to form a new machine-language (object) program. Typically, the compiled machine
code is less efficient than the code produced when using assembly language. This means that it
runs a bit more slowly and uses a bit more memory than the equivalent assembled program. To
offset this drawback, however, we also have the fact that it takes much less time to develop a
compiler-language program, so it can be ready to go sooner than the assembly-language
program. The result of the comparison is passed as output from the digital comparator to
whatever hardware it is interfaced with.

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 8. REFERENCES

[1] https://www.electronics-tutorials.ws/combination/comb_8.html

[2] https://www.electronicshub.org/digital-comparator-and-magnitude-comparator/

[3] https://www.geeksforgeeks.org/magnitude-comparator/

[4] https://project4sciencefair.wordpress.com/tag/design-of-16bit-magnitude-comparator-using-
vlsi/

[5] http://applegreenieesh.blogspot.com/2014/05/16-bits-magnitude-comparator-using-vhdl.html

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