2017 4th Experiment@ International Conference (exp.

at'17)
June 6th – 8th, 2017, University of Algarve, Faro, Portugal

The remote lab “Nexys 2 FPGA platform” aimed for

learning design of digital circuits
Vanja Luković, Radojka Krneta and Đorđe Damnjanović Aleksandar Peulić
Department of Computer Engineering, Faculty of Technical Department of Electrical Engineering, Faculty of
Sciences Čačak, University of Kragujevac Engineering, University of Kragujevac
Čačak, Serbia Kragujevac, Serbia
vanja.lukovic@ftn.kg.ac.rs, radojka.krneta@ftn.kg.ac.rs, aleksandar.peulic@kg.ac.rs
djordje.damnjanovic@ftn.kg.ac.rs

Abstract - The application of remote lab “Nexys 2 FPGA FPGA programming through Digilent Adept2 software [3],
platform” for learning digital circuits design is described in this which is installed on the remote lab PC. A student can see the
paper. The experiment requires installation of Xilinx ISE Design result of FPGA programming in real time via web camera
Suite software on students’ PCs for designing digital circuits and placed above Nexys 2 platform in the remote laboratory.
generating .bit file. There are three ways of designing digital
circuits in Xilinx ISE Design Suite software: by programming in
VHDL language, by programming in Verilog language or by
using schematic diagrams. Working environment of the remote
lab consists of Digilent Nexys 2 FPGA platform that is connected
with PC. Students connect with the remote lab PC through
CEyeClon viewer which also needs to be installed on their PCs
together with .Net Framework 4.5. Generated .bit file is loaded
through Digilent Adept2 software that is installed on the remote
lab PC and used for the FPGA programming. The usage of this
experiment enable engineering students to achieve practical
experiences and skills for designing and simulating digital Fig. 1. Schematic view of input/output devices (I/O) of Digilent Nexys 2
circuits using FPGA and to better understand and learn theory of platform
designing digital circuits. Digilent Nexys 2 platform is ready-to-use circuit
development board based on a Xilinx Spartan 3E FPGA
Keywords — designing; simulating; digital circuits; Nexys 2
platform; remote experiment; FPGA; Xilinx ISE Design Suite
integrated circuit. Students connect with working environment
of the remote lab through CEyeClon viewer, which needs to be
installed on their PCs together with .Net Framework 4.5 before
I. INTRODUCTION starting the experiment. CEyeClon platform is organized like
The remote experiment based on Nexys 2 FPGA platform, remote desktop platform with lots of possibilities like IP
described in this paper, is one of many experiments of Library camera integration or scheduling time for a user access.
of Remote Experiment (LiReX) [1], which can be easily
accessed through Web. Innovative teaching methods based on III. DESIGN, SIMULATION AND IMPLEMENTATION OF AN
usage of the remote lab as an teaching support system, enable EXAMPLE OF DIGITAL CIRCUIT IN XILINX ISE DESIGN SUITE
engineering students to better understand and learn theory SOFTWARE
through simulation of practical engineering tasks such as
design, design verification, and testing [2]. This is particularly A. Design of a digital circuit
useful in teaching introductory engineering courses because the
use of hands-on labs in the early years of the study suffers from
restricted laboratory capacity and requires student training on
the use of laboratory equipment. Based on the above, the use of
the remote lab provides significant advantages for teaching of
digital circuits design concepts within introductory courses
such as Foundations of Computer Techniques 1 and 2 at
Faculty of Technical Science Čačak, University of Kragujevac.

II. THE REMOTE LAB „NEXYS 2 FPGA PLATFORM“

The working environment of the remote lab „Nexys 2
FPGA platform“ is based on Digilent Nexys 2 platform [3]
connected with PC. For designing digital circuits and
generating .bit file, students need to install Xilinx ISE Design
Suite software on their PCs [4]. Generated .bit file is used for
Fig. 2. An example of digital circuit – priority encoder
There are three ways of designing digital circuits in Xilinx
ISE Design Suite software: by programming in VHDL

978-1-5386-0810-4/17/$31.00 ©2017 IEEE 101

2017 4th Experiment@ International Conference (exp.at'17)
June 6th – 8th, 2017, University of Algarve, Faro, Portugal
language, by programming in Verilog language or by using
schematic diagrams. The Fig. 2 represents schematic design of
an example of digital circuit with functionality of priority
encoder. The circuit is created in Schematic type of file.
B. Simulation of designed digital circuit
Fig. 3. Simulation result of created digital circuit in ISim simulator
Simulation of designed digital circuits involves viewing the
change of output signals depending on the input signals
change, over a time interval. The simulation can be performed
in several ways using ISim software [5], integrated in Xilinx
ISE Design Suite: using VHDL file, using Verilog file and
direct simulation (see description of the remote experiment [1]
for more details). The simulation result represented in Fig. 3 is
obtained using direct way of simulation.
C. Implementation of designed digital circuit
For implementation of designed digital circuit,
Implementation project view, instead of Simulation project
view needs to be selected. Also, locations of input/output
signals need to be defined using Implementation Constraints
File with .ucf extension, that should be added to the project
(Fig 4).
Fig. 4. Content of the Implementation Constraints File
Implementation of designed digital circuit is achieved by
running Generate Programming File process. As a result, the
binary file with extension .bit is created in the project folder.
This binary file is intended for remote FPGA programming.
For programming the FPGA, Digilent Adept 2 software
needs to be started on the remote lab PC, after logging and
connecting to the experiment [1], through CEyeClon Viewer
(Fig. 5). Created binary (.bit) file that is firstly copied in a
student’s personal folder on the remote PC should be loaded
through Digilent Adept 2 software and after then Program
button should be pressed.
Although that in the Implementation Constraints File, input
signals C1 and C3 are defined as SW0 and SW1 (which were
set on in the experiment), while input signals C0 and C2 are
defined as switches SW4 and SW5 (which was set off in the
experiment), from the Fig. 3 that represents simulation of
functionality of the digital circuit, it can be concluded that the
values of the output signals: z1, z2 and w should be 1.
102
Although that in the Implementation Constraints File
LEDs: LDO, LD1 and LD2 are defined as output signals: z1, z2
and w, the resulting effect of the experiment should be
lightening of these diodes, as it is presented in the Fig. 5.
Fig. 5. The resulting effect of the experiment – lightening of LD0
IV. CONCLUSION
The remote lab „Nexys 2 FPGA platform“ enables practical
application of theoretical knowledge of digital circuits through
designing process in Xilinx ISE Design Suite software,
verification of the design through simulation process in ISim
software and testing the results by programming the FPGA
integrated circuit in Digilent Adept 2 software and by viewing
the result using web camera placed above Nexys 2 platform in
the remote laboratory. As we have described, complete
experiment designing have to be performed on students’ PCs in
order to generate .bit file for FPGA programming. On a remote
side (lab PC) a student should only load generated binary file
and program FPGA.
ACKNOWLEDGMENT
This demo paper is a result of the activities carried out
within the project 543667-TEMPUS-1-2013-1-RS-TEMPUS-
JPHES “Building Network of Remote Labs for strengthening
university-secondary vocational schools collaboration”
supported by The Education, Audiovisual and Culture
Executive Agency (EACEA).
REFERENCES
[1] “NeReLa - LiReX.” [Online]. Available:
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Network of Remote Labs for strengthening university-secondary
vocational schools collaboration.’” [Online]. Available:
http://www.nerela.kg.ac.rs/.
[3] “Digilent Documentation [Reference.Digilentinc].” [Online].
Available: https://reference.digilentinc.com/. [Accessed: 09-Jan-
2017].
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https://www.xilinx.com/support/documentation/sw_manuals/xilinx1
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https://www.xilinx.com/support/documentation/sw_manuals/xilinx1
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