B 80 D 8805 B

A1120, A1121, A1122, A1123, and A1125
Chopper Stabilized Precision Hall Effect Switches
Features and Benefits Description

▪ Unipolar switchpoints The A1120, A1121, A1122, A1123, and A1125 Hall-effect,
▪ Resistant to physical stress unipolar switches are extremely temperature-stable and
▪ Superior temperature stability stress-resistant sensor ICs, especially suited for operation
▪ Output short-circuit protection over extended temperature ranges to 150°C. Superior high-
▪ Operation from unregulated supply temperature performance is made possible through dynamic
▪ Reverse battery protection offset cancellation, which reduces the residual offset voltage
▪ Solid-state reliability normally caused by device overmolding, temperature
▪ Small package sizes dependencies, and thermal stress.
Each device includes on a single silicon chip a voltage regulator,
Hall-voltage generator, small-signal amplifier, chopper
stabilization, Schmitt trigger, and a short-circuit protected
open-drain output to sink up to 25 mA.
Packages:
An on-board regulator permits operation with supply voltages
of 3 to 24 V. The advantage of operating down to 3 V is that
the device can be used in 3 V applications or with additional
external resistance in series with the supply pin for greater
protection against high voltage transient events.
3-pin SOT23W For the A1120, A1121, A1122, and A1123 a south pole of
(suffix LH) sufficient strength turns the output on. Removal of the magnetic
field turns the output off. The A1125 is complementary, in that
(A1120) (A1121, A1122,
A1123, and A1125) for these devices, a south pole turns the A1125 output off, and
removal of the magnetic field turns the output on.
3-pin SIP (suffix UA)
Not to scale Two package styles provide a magnetically optimized package
for most applications. Package type LH is a modified SOT23W,
surface mount package, while UA is a three-lead ultra-mini SIP
for through-hole mounting. Each package type is lead (Pb) free
(suffix, –T), with a 100% matte tin plated leadframe.
Functional Block Diagram
VCC
Regulator
To All Subcircuits
Low-Pass VOUT
Sample and Hold
Filter
Dynamic Offset
Cancellation
Amp Control
Current Limit
GND
A1120-DS, Rev. 15
A1120, A1121, A1122,
A1123, and A1125 Chopper Stabilized Precision Hall Effect Switches
Selection Guide
Switchpoints
(Typ.) Output In South (Positive)
Part Number Packing1 Mounting Ambient, TA
Magnetic Field
BOP BRP
A1120ELHLX-T 13-in. reel, 10000 pieces/reel 3-pin SOT23W surface mount
A1120ELHLT-T2 7-in. reel, 3000 pieces/reel 3-pin SOT23W surface mount –40ºC to 85ºC
A1120EUA-T Bulk, 500 pieces/bag 3-pin SIP through hole
35 25
A1120LLHLX-T 13-in. reel, 10000 pieces/reel 3-pin SOT23W surface mount
A1120LLHLT-T2 7-in. reel, 3000 pieces/reel 3-pin SOT23W surface mount –40ºC to 150ºC
A1120LUA-T Bulk, 500 pieces/bag 3-pin SIP through hole
95 70
A1121LLHLT-T2 7-in. reel, 3000 pieces/reel 3-pin SOT23W surface mount –40ºC to 150ºC On (logic low)
150 125
A1123LLHLT-T2 7-in. reel, 3000 pieces/reel 3-pin SOT23W surface mount –40ºC to 150ºC 280 225
35 25 Off (logic high)
1Contact Allegro for additional packing options.
2Available through authorized Allegro distributors only.
Allegro MicroSystems, LLC 2

115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
A1120, A1121, A1122,
Absolute Maximum Ratings

Characteristic Symbol Notes Rating Units
Forward Supply Voltage VCC 26.5 V
Reverse Supply Voltage VRCC –30 V
Output Off Voltage VOUT 26 V
Continuous Output Current IOUT 25 mA
Reverse Output Current IROUT –50 mA
Range E –40 to 85 ºC
Operating Ambient Temperature TA
Range L –40 to 150 ºC
Maximum Junction Temperature TJ(max) 165 ºC
Storage Temperature Tstg –65 to 170 ºC
Pin-out Diagrams
GND
Package LH Package UA
1 2 1 2 3
VCC
VOUT
GND
VCC
VOUT
Terminal List
Number
Name Description
Package LH Package UA
VCC Connects power supply to chip 1 1
VOUT Output from circuit 2 3
GND Ground 3 2

A1120, A1121, A1122,
ELECTRICAL CHARACTERISTICS Valid over full operating voltage and ambient temperature ranges; unless otherwise noted
Characteristics Symbol Test Conditions Min. Typ.1 Max. Unit2
Electrical Characteristics
Forward Supply Voltage VCC Operating, TJ < 165°C 3 – 24 V
A1120
A1121
VOUT = 24 V, B < BRP – – 10 μA
Output Leakage Current IOUTOFF A1122
A1123
A1125 VOUT = 24 V, B > BOP – – 10 μA
A1120
A1121
IOUT = 20 mA, B > BOP – 185 500 mV
Output Saturation Voltage VOUT(SAT) A1122
A1123
A1125 IOUT = 20 mA, B < BRP – 185 500 mV
A1120
A1121
B > BOP 30 – 60 mA
Output Current Limit IOM A1122
A1123
A1125 B < BRP 30 – 60 mA
VCC > 3.0 V, B < BRP(min) – 10 G,
Power-On Time3 tPO – – 25 μs
B > BOP(max) + 10 G
Chopping Frequency fC – 800 – kHz
Output Rise Time3,4 tr RL = 820 Ω, CS = 20 pF – 0.2 2 μs
Output Fall Time3,4 tf RL = 820 Ω, CS = 20 pF – 0.1 2 μs
A1120
A1121
VCC = 12 V, B > BOP – – 4 mA
ICC(ON) A1122
A1123
A1125 VCC = 12 V, B < BRP – – 4 mA
Supply Current
A1120
A1121
VCC = 12 V, B < BRP – – 4 mA
ICC(OFF) A1122
A1123
A1125 VCC = 12 V, B > BOP – – 4 mA
Reverse Supply Current IRCC VRCC = –30 V – – –5 mA
Supply Zener Clamp Voltage VZ ICC = 5 mA; TA = 25°C 28 – – V
Zener Impedance IZ ICC = 5 mA; TA = 25°C – 50 – Ω
Continued on the next page…

A1120, A1121, A1122,
ELECTRICAL CHARACTERISTICS (continued) Valid over full operating voltage and ambient temperature ranges; unless
otherwise noted
Characteristics Symbol Test Conditions Min. Typ.1 Max. Unit2
Magnetic Characteristics
A1120 – 35 50 G
A1121 50 95 135 G
Operate Point BOP A1122 120 150 200 G
A1123 205 280 355 G
A1125 – 35 50 G
A1120 5 25 – G
A1121 40 70 110 G
Release Point BRP A1122 110 125 190 G
A1123 150 225 300 G
A1125 5 25 – G
A1120 – 10 – G
A1121 10 25 42 G
Hysteresis BHYS A1122 (BOP – BRP) 10 25 42 G
A1123 30 55 80 G
A1125 – 10 – G
1Typicaldata are are at TA = 25°C and VCC = 12 V, and are for initial design estimations only.
21 G (gauss) = 0.1 mT (millitesla).
3Guaranteed by device design and characterization.
4C = oscilloscope probe capacitance.
S

A1120, A1121, A1122,
THERMAL CHARACTERISTICS may require derating at maximum conditions, see application information
Characteristic Symbol Test Conditions Value Units
Package LH, 1-layer PCB with copper limited to solder pads 228 ºC/W
Package LH, 2-layer PCB with 0.463 in.2 of copper area each
Package Thermal Resistance RθJA 110 ºC/W
side connected by thermal vias
Package UA, 1-layer PCB with copper limited to solder pads 165 ºC/W
Power Derating Curve

TJ(max) = 165ºC; ICC = ICC(max)
25
24 VCC(max)
23
22
Maximum Allowable VCC (V)
21
20
19
18
17
16
15
14
13
12
Package LH, 2-layer PCB
11 (RQJA = 110 ºC/W)
10
9 Package UA, 1-layer PCB
8 (RQJA = 165 ºC/W)
7
6 Package LH, 1-layer PCB
5 (RQJA = 228 ºC/W)
4
3 VCC(min)
2
20 40 60 80 100 120 140 160 180
Power Dissipation versus Ambient Temperature
1900
1800
1700
1600
1500
1400
1300
Power Dissipation, PD (mW)
1200 Pa
1100 (R cka
QJ ge
A = L
1000 11 H, 2
Pac 0 º -la
900 C/ ye
800 (R kage W
) r PC
QJA = UA B
165 , 1-la
700 ºC/ y
W) er PC
600 B
500 Pac
k
400 (R age LH
,
300 QJA =
228 1-laye
ºC/W r PC
200 ) B
100
0
20 40 60 80 100 120 140 160 180
Temperature (°C)

A1120, A1121, A1122,
Characteristic Performance
A1120, A1121, A1122, A1123, and A1125 Electrical Characteristics
Average Supply Current (On) versus Ambient Temperature Average Supply Current (On) versus Average Supply Voltage
6.0 6.0
5.5 5.5
5.0 5.0
4.5 4.5
VCC (V) 4.0 TA (°C)

ICC(av) (mA)
ICC(av) (mA)
4.0
3.5 3.5
3.0 –40
3.0 12 3.0
25
2.5 24 2.5 150
2.0 A112x* 2.0 A112x*
1.5 A1123 1.5 A1123
1.0 1.0 *A1120, A1121,
*A1120, A1121,
0.5 A1122, and A1125 0.5 A1122, and A1125
0 0
- 60 - 40 - 20 0 20 40 60 80 100 120 140 160 2 6 10 14 18 22 26
TA (°C) VCC (V)
Average Supply Current (Off) versus Ambient Temperature Average Supply Current (Off) versus Average Supply Voltage
6.0 6.0
5.5 5.5
5.0 5.0
4.5 4.5
4.0 VCC (V) 4.0 TA (°C)
ICC(av) (mA)
ICC(av) (mA)
3.5 3.5
3.0 –40
3.0 3.0
12 25
2.5 24 2.5 150
2.0 A112x* 2.0 A112x*
1.5 A1123 1.5 A1123
1.0 1.0
*A1120, A1121, *A1120, A1121,
0.5 A1122, and A1125 0.5 A1122, and A1125
0 0
- 60 - 40 - 20 0 20 40 60 80 100 120 140 160 2 6 10 14 18 22 26
TA (°C) VCC (V)
Average Output Saturation Voltage versus Ambient Temperature Average Output Saturation Voltage versus Supply Voltage
300 300
250 250
VCC (V)
200 3.0 200
VOUT(sat) (V)
VOUT(sat) (V)
3.8 TA (°C)
4.2 –40
150 150
12 25
24 150
100 100
A112x* A112x*
A1123 A1123
50 50
*A1120, A1121, *A1120, A1121,
A1122, and A1125 A1122, and A1125
0 0
- 60 - 40 - 20 0 20 40 60 80 100 120 140 160 2 6 10 14 18 22 26
TA (°C) VCC (V)

A1120, A1121, A1122,
A1120 and A1125 Magnetic Characteristics
Average Operate Point versus Ambient Temperature Average Operate Point versus Average Supply Voltage
50 50
45 45
40 40
35 35
VCC (V) TA (°C)
30 30
BOP (G)
BOP (G)
3.0 –40
25 25 25
20 24 20 150
15 15
10 10
5 5
0 0
-60 -40 -20 0 20 40 60 80 100 120 140 160 2 6 10 14 18 22 26
TA (°C) VCC (V)
Average Release Point versus Ambient Temperature Average Release Point versus Average Supply Voltage
50 50
45 45
40 40
35 35
BRP (G)
BRP (G)
30 VCC (V) 30 TA (°C)

25 3.0 25 –40
20 20 25
24 150
15 15
10 10
5 5
0 0
-60 -40 -20 0 20 40 60 80 100 120 140 160 2 6 10 14 18 22 26
TA (°C) VCC (V)
Average Switchpoint Hysteresis versus Ambient Temperature Average Switchpoint Hysteresis versus Supply Voltage
20 20
18 18
16 16
14 14
BHYS (G)
BHYS (G)
12 VCC (V) 12 TA (°C)

10 3.0 10 –40
25
8 24 8
150
6 6
4 4
2 2
0 0
-60 -40 -20 0 20 40 60 80 100 120 140 160 2 6 10 14 18 22 26
TA (°C) VCC (V)

A1120, A1121, A1122,
A1121 Magnetic Characteristics
140 140
130 130
120 120
110 VCC (V) 110 TA (°C)

BOP (G)
BOP (G)
100 3.0 100 –40
12 25
90 90
24 150
80 80
70 70
60 60
50 50
- 60 - 40 - 20 0 20 40 60 80 100 120 140 160 2 6 10 14 18 22 26
TA (°C) VCC (V)
110 110
100 100
90 90
BRP (G)
BRP (G)
VCC (V) TA (°C)

80 80
3.0 –40
70 12 70 25
24 150
60 60
50 50
40 40
- 60 - 40 - 20 0 20 40 60 80 100 120 140 160 2 6 10 14 18 22 26
TA (°C) VCC (V)
40 40
35 35
30 30
BHYS (G)
BHYS (G)
VCC (V) TA (°C)

3.0 –40
25 25
12 25
24 150
20 20
15 15
10 10
- 60 - 40 - 20 0 20 40 60 80 100 120 140 160 2 6 10 14 18 22 26
TA (°C) VCC (V)

A1120, A1121, A1122,
200 200
190 190
180 180
170 VCC (V) 170

TA (°C)
BOP (G)
BOP (G)
3.0 –40
160 160
12 25
150 24 150 150
140 140
130 130
120 120
- 60 - 40 - 20 0 20 40 60 80 100 120 140 160 2 6 10 14 18 22 26
TA (°C) VCC (V)
190 190
180 180
170 170
BRP (G)
BRP (G)
160 160 TA (°C)

VCC (V)
150 3.0
150 –40
12 25
140 140
24 150
130 130
120 120
110 110
- 60 - 40 - 20 0 20 40 60 80 100 120 140 160 2 6 10 14 18 22 26
TA (°C) VCC (V)
40 40
35 35
30 30
BHYS (G)
BHYS (G)
VCC (V) TA (°C)

3.0 –40
25 25
12 25
24 150
20 20
15 15
10 10
- 60 - 40 - 20 0 20 40 60 80 100 120 140 160 2 6 10 14 18 22 26
TA (°C) VCC (V)

A1120, A1121, A1122,
355 355
350 350
305 TA (°C) 305 TA (°C)

BOP (G)
BOP (G)
3 –40
280 12 280 25
24 150
255 255
230 230
205 205
-60 -40 -20 0 20 40 60 80 100 120 140 160 2 6 10 14 18 22 26
TA (°C) VCC (V)
300 300
275 275
250 250
BRP (G)
BRP (G)
TA (°C) TA (°C)
225 3 225 –40
12 25
200 24 200 150
175 175
150 150
-60 -40 -20 0 20 40 60 80 100 120 140 160 2 6 10 14 18 22 26
TA (°C) VCC (V)
80 80
75 75
70 70
65 65
BHYS (G)
BHYS (G)
60 TA (°C) 60 TA (°C)
55 3 55 –40
12 25
50 50
24 150
45 45
40 40
35 35
30 30
-60 -40 -20 0 20 40 60 80 100 120 140 160 2 6 10 14 18 22 26
TA (°C) VCC (V)

A1120, A1121, A1122,
Functional Description
Operation give an indeterminate output state. The correct state is attained

The output of the A1120, A1121, A1122, and A1123 devices after the first excursion beyond BOP or BRP .
switches low (turns on) when a magnetic field perpendicular to
Applications
the Hall element exceeds the operate point threshold, BOP (see
panel A of figure 1). When the magnetic field is reduced below It is strongly recommended that an external bypass capacitor be
the release point, BRP , the device output goes high (turns off). connected (in close proximity to the Hall element) between the
The output of the A1125 devices switches high (turns off) when supply and ground of the device to reduce external noise in the
a magnetic field perpendicular to the Hall element exceeds the application. As is shown in panel B of figure 1, a 0.1 μF capacitor
operate point threshold, BOP (see panel B of figure 1). When the is typical.
magnetic field is reduced below the release point, BRP , the device
output goes low (turns on). Extensive applications information for Hall effect devices is
available in:
After turn-on, the output voltage is VOUT(SAT) . The output tran-
sistor is capable of sinking current up to the short circuit current • Hall-Effect IC Applications Guide, Application Note 27701
limit, IOM, which is a minimum of 30 mA. • Guidelines for Designing Subassemblies Using Hall-Effect
The difference in the magnetic operate and release points is the Devices, Application Note 27703.1
hysteresis, BHYS , of the device. This built-in hysteresis allows
• Soldering Methods for Allegro’s Products – SMT and Through-
clean switching of the output even in the presence of external
Hole, Application Note 26009
mechanical vibration and electrical noise. Powering-on the device
in the hysteresis range (less than BOP and higher than BRP) will All are provided on the Allegro Web site, www.allegromicro.com.
VS
V+ V+
VCC VCC
Switch to High
Switch to High
Switch to Low
Switch to Low
VCC RL
VOUT
VOUT
A112x
VOUT
Output
CBYP
VOUT(SAT) VOUT(SAT) 0.1 μF GND
0 0
0 B+ 0 B+
BOP
BOP
BRP
BRP
BHYS BHYS
(A) (B) (C)
Figure 1. Device switching behavior. In panels A and B, on the horizontal axis, the B+ direction indicates increasing south polarity magnetic field strength.
This behavior can be exhibited when using an electrical circuit such as that shown in panel C.

A1120, A1121, A1122,
Chopper Stabilization Technique The chopper stabilization technique uses a 400 kHz high fre-
When using Hall effect technology, a limiting factor for quency clock. For demodulation process, a sample and hold
switchpoint accuracy is the small signal voltage developed across technique is used, where the sampling is performed at twice the
the Hall element. This voltage is disproportionally small relative chopper frequency (800 kHz). This high-frequency operation
to the offset that can be produced at the output of the Hall ele- allows a greater sampling rate, which results in higher accuracy
ment. This makes it difficult to process the signal while main- and faster signal-processing capability. This approach desensi-
taining an accurate, reliable output over the specified operating tizes the chip to the effects of thermal and mechanical stresses,
temperature and voltage ranges. and produces devices that have extremely stable quiescent Hall
output voltages and precise recoverability after temperature
Chopper stabilization is a unique approach used to minimize cycling. This technique is made possible through the use of a
Hall offset on the chip. The patented Allegro technique, namely BiCMOS process, which allows the use of low-offset, low-noise
Dynamic Quadrature Offset Cancellation, removes key sources amplifiers in combination with high-density logic integration and
of the output drift induced by thermal and mechanical stresses. sample-and-hold circuits.
This offset reduction technique is based on a signal modulation-
The repeatability of magnetic field-induced switching is affected
demodulation process. The undesired offset signal is separated slightly by a chopper technique. However, the Allegro high
from the magnetic field-induced signal in the frequency domain, frequency chopping approach minimizes the affect of jitter and
through modulation. The subsequent demodulation acts as a makes it imperceptible in most applications. Applications that are
modulation process for the offset, causing the magnetic field more likely to be sensitive to such degradation are those requiring
induced signal to recover its original spectrum at baseband, while precise sensing of alternating magnetic fields; for example, speed
the dc offset becomes a high-frequency signal. The magnetic sensing of ring-magnet targets. For such applications, Allegro
sourced signal then can pass through a low-pass filter, while the recommends its digital device families with lower sensitivity
modulated DC offset is suppressed. This configuration is illus- to jitter. For more information on those devices, contact your
trated in figure 2. Allegro sales representative.
Regulator
Clock/Logic
Low-Pass
Hall Element Filter
Sample and
Hold
Amp
Figure 2. Model of chopper stabilization technique

A1120, A1121, A1122,
Power Derating A worst-case estimate, PD(max), represents the maximum allow-

The device must be operated below the maximum junction able power level (VCC(max), ICC(max)), without exceeding TJ(max),
temperature of the device, TJ(max). Under certain combinations of at a selected RJA and TA.
peak conditions, reliable operation may require derating supplied
Example: Reliability for VCC at TA = 150°C, package LH, using a
power or improving the heat dissipation properties of the appli-
minimum-K PCB.
cation. This section presents a procedure for correlating factors
affecting operating TJ. (Thermal data is also available on the Observe the worst-case ratings for the device, specifically:
Allegro MicroSystems website.) RJA = 228°C/W, TJ(max) = 165°C, VCC(max) = 24 V, and
ICC(max) = 4 mA.
The Package Thermal Resistance, RJA, is a figure of merit sum-
marizing the ability of the application and the device to dissipate Calculate the maximum allowable power level, PD(max). First,
heat from the junction (die), through all paths to the ambient air. invert equation 3:
Its primary component is the Effective Thermal Conductivity, K,
Tmax = TJ(max) – TA = 165 °C – 150 °C = 15 °C
of the printed circuit board, including adjacent devices and traces.
Radiation from the die through the device case, RJC, is relatively This provides the allowable increase to TJ resulting from internal
small component of RJA. Ambient air temperature, TA, and air power dissipation. Then, invert equation 2:
motion are significant external factors, damped by overmolding.
PD(max) = Tmax ÷ RJA = 15°C ÷ 228 °C/W = 66 mW
The effect of varying power levels (Power Dissipation, PD), can
be estimated. The following formulas represent the fundamental Finally, invert equation 1 with respect to voltage:
relationships used to estimate TJ, at PD.
VCC(est) = PD(max) ÷ ICC(max) = 66 mW ÷ 4 mA = 16.5 V
PD = VIN × IIN (1) The result indicates that, at TA, the application and device can
dissipate adequate amounts of heat at voltages ≤VCC(est).
 T = PD × RJA (2)
Compare VCC(est) to VCC(max). If VCC(est) ≤ VCC(max), then reli-
able operation between VCC(est) and VCC(max) requires enhanced
TJ = TA + ΔT (3)
RJA. If VCC(est) ≥ VCC(max), then operation between VCC(est)
and VCC(max) is reliable under these conditions.
For example, given common conditions such as: TA= 25°C,
VCC = 12 V, ICC = 1.6 mA, and RJA = 165 °C/W, then:
PD = VCC × ICC = 12 V × 1.6 mA = 19 mW
 T = PD × RJA = 19 mW × 165 °C/W = 3°C
TJ = TA + T = 25°C + 3°C = 28°C

A1120, A1121, A1122,
Package LH, 3-Pin (SOT-23W)
+0.12
2.98 –0.08
1.49 D
4°±4°
3 A
+0.020
0.180–0.053
0.96 D
+0.10 +0.19 2.40

2.90 –0.20 1.91 –0.06
0.70
D
0.25 MIN
1.00
1 2
0.55 REF 0.25 BSC 0.95

Seating Plane
Gauge Plane B PCB Layout Reference View
8X 10° REF Branded Face
C Standard Branding Reference View

1.00 ±0.13
+0.10 NNT
0.05 –0.05
0.95 BSC
0.40 ±0.10
1
For Reference Only; not for tooling use (reference dwg. 802840) N = Last two digits of device part number
Dimensions in millimeters T = Temperature code (letter)
Dimensions exclusive of mold flash, gate burrs, and dambar protrusions
Exact case and lead configuration at supplier discretion within limits shown
A Active Area Depth, 0.28 mm REF
B Reference land pattern layout NNN
All pads a minimum of 0.20 mm from all adjacent pads; adjust as necessary
to meet application process requirements and PCB layout tolerances
C Branding scale and appearance at supplier discretion 1
N = Last three digits of device part number
D Hall element, not to scale

A1120, A1121, A1122,
Package UA, 3-Pin SIP

(A1120)
+0.08
4.09 –0.05
45°
B
C
E
2.04
1.52 ±0.05
1.44 E
Mold Ejector
+0.08 Pin Indent NNT
3.02 –0.05
E
Branded 45°
Face 1
2.16 D Standard Branding Reference View
MAX
= Supplier emblem
0.79 REF N = Last two digits of device part number
A T = Temperature code
0.51
REF
1 2 3
For Reference Only; not for tooling use (reference DWG-9049)

Dimensions in millimeters
+0.03 Exact case and lead configuration at supplier discretion within limits shown
0.41 –0.06
15.75 ±0.51
A Dambar removal protrusion (6X)

B Gate burr area
C Active Area Depth, 0.50 mm REF
D Branding scale and appearance at supplier discretion
E Hall element, not to scale
+0.05 1.27 NOM

0.43 –0.07

A1120, A1121, A1122,
Package UA, 3-Pin SIP

(A1121, A1122, A1123, and A1125)
+0.08
4.09 –0.05
45°
B
E C
2.04
1.52 ±0.05
10°
E 1.44 Mold Ejector
E
+0.08 Pin Indent
3.02 –0.05
Branded 45°
Face
0.79 REF
A NNN
1.02
MAX
1
1 2 3 D Standard Branding Reference View
= Supplier emblem
N = Last three digits of device part number
14.99 ±0.25 +0.03

0.41 –0.06
For Reference Only; not for tooling use (reference DWG-9065)
Dimensions in millimeters
Exact case and lead configuration at supplier discretion within limits shown
+0.05
0.43 –0.07
A Dambar removal protrusion (6X)
B Gate and tie bar burr area
C Active Area Depth, 0.50 mm REF
D Branding scale and appearance at supplier discretion
E Hall element (not to scale)
1.27 NOM

A1120, A1121, A1122,
Revision History
Revision Revision Date Description of Revision
Update product offerings
Rev. 15 September 3, 2013
Update UA package drawing
Copyright ©2009-2013, Allegro MicroSystems, LLC

Allegro MicroSystems, LLC reserves the right to make, from time to time, such departures from the detail specifications as may be required to
permit improvements in the performance, reliability, or manufacturability of its products. Before placing an order, the user is cautioned to verify that
the information being relied upon is current.
Allegro’s products are not to be used in any devices or systems, including but not limited to life support devices or systems, in which a failure of
Allegro’s product can reasonably be expected to cause bodily harm.
The information included herein is believed to be accurate and reliable. However, Allegro MicroSystems, LLC assumes no responsibility for its
use; nor for any infringement of patents or other rights of third parties which may result from its use.


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A1120, A1121, A1122, A1123, and A1125

Chopper Stabilized Precision Hall Effect Switches

Features and Benefits Description

Functional Block Diagram

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Absolute Maximum Ratings

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Continued on the next page…

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Power Derating Curve

Power Dissipation versus Ambient Temperature

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VCC (V) 4.0 TA (°C)

TA (°C) VCC (V)

TA (°C) VCC (V)

TA (°C) VCC (V)

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A1120 and A1125 Magnetic Characteristics

TA (°C) VCC (V)

30 VCC (V) 30 TA (°C)

12 VCC (V) 12 TA (°C)

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A1121 Magnetic Characteristics

110 VCC (V) 110 TA (°C)

TA (°C) VCC (V)

VCC (V) TA (°C)

VCC (V) TA (°C)

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A1122 Magnetic Characteristics

170 VCC (V) 170

TA (°C) VCC (V)

160 160 TA (°C)

VCC (V) TA (°C)

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A1123 Magnetic Characteristics

305 TA (°C) 305 TA (°C)

TA (°C) VCC (V)

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Operation give an indeterminate output state. The correct state is attained

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Figure 2. Model of chopper stabilization technique

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Power Derating A worst-case estimate, PD(max), represents the maximum allow-

PD = VCC × ICC = 12 V × 1.6 mA = 19 mW

 T = PD × RJA = 19 mW × 165 °C/W = 3°C

TJ = TA + T = 25°C + 3°C = 28°C

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Package LH, 3-Pin (SOT-23W)

+0.10 +0.19 2.40

0.55 REF 0.25 BSC 0.95

8X 10° REF Branded Face

C Standard Branding Reference View

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Package UA, 3-Pin SIP

For Reference Only; not for tooling use (reference DWG-9049)

A Dambar removal protrusion (6X)

+0.05 1.27 NOM

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Package UA, 3-Pin SIP

14.99 ±0.25 +0.03

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Copyright ©2009-2013, Allegro MicroSystems, LLC