Design flow (EDA)
Design flows are the explicit combination of electronic design automation tools to accomplish the design of an
integrated circuit. Moore's law has driven the entire IC implementation RTL to GDSII design flows from one
which uses primarily stand-alone synthesis, placement, and routing algorithms to an integrated construction
and analysis flows for design closure. The challenges of rising interconnect delay led to a new way of thinking
about and integrating design closure tools.
The RTL to GDSII flow underwent significant changes from 1980 through 2005. The continued scaling of
CMOS technologies significantly changed the objectives of the various design steps. The lack of good
predictors for delay has led to significant changes in recent design flows. New scaling challenges such as
leakage power, variability, and reliability will continue to require significant changes to the design closure
process in the future. Many factors describe what drove the design flow from a set of separate design steps to a
fully integrated approach, and what further changes are coming to address the latest challenges. In his keynote
at the 40th Design Automation Conference entitled The Tides of EDA (http://embedded.eecs.berkeley.edu/rese
arch/hsc/class/papers/d6sang.lo.pdf), Alberto Sangiovanni-Vincentelli distinguished three periods of EDA:
The Age of Invention: During the invention era, routing, placement, static timing analysis and
logic synthesis were invented.
The Age of Implementation: In the age of implementation, these steps were drastically
improved by designing sophisticated data structures and advanced algorithms. This allowed
the tools in each of these design steps to keep pace with the rapidly increasing design sizes.
However, due to the lack of good predictive cost functions, it became impossible to execute a
design flow by a set of discrete steps, no matter how efficiently each of the steps was
implemented.
The Age of Integration: This led to the age of integration where most of the design steps are
performed in an integrated environment, driven by a set of incremental cost analyzers.
There are differences between the steps and methods of the design flow for analog and digital integrated
circuits. Nonetheless, a typical VLSI design flow consists of various steps like design conceptualization, chip
optimization, logical/physical implementation, and design validation and verification.[1][2]
See also
Placement (EDA), an essential step in Electronic Design Automation (EDA)
Routing (EDA), a crucial step in the design of integrated circuits
Power optimization (EDA), the use of EDA tools to optimize (reduce) the power consumption of
a digital design, while preserving its functionality
Post-silicon validation, the final step in the EDA design flow
References
1. "ASIC Design Flow in VLSI Engineering Services – A Quick Guide" (https://www.einfochips.co
m/blog/asic-design-flow-in-vlsi-engineering-services-a-quick-guide/). 2019-06-04. Retrieved
2019-11-28.
2. Basu, Joydeep (2019-10-09). "From Design to Tape-out in SCL 180 nm CMOS Integrated
Circuit Fabrication Technology". IETE Journal of Education. 60 (2): 51–64. arXiv:1908.10674 (h
ttps://arxiv.org/abs/1908.10674). doi:10.1080/09747338.2019.1657787 (https://doi.org/10.108
0%2F09747338.2019.1657787). S2CID 201657819 (https://api.semanticscholar.org/CorpusID:
201657819).
Electronic Design Automation For Integrated Circuits Handbook, by Lavagno, Martin, and
Scheffer, ISBN 0-8493-3096-3 A survey of the field, from which this summary was derived, with
permission.
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