Dice Game control.

vhd
Cnta Cntb Chap 22
Rb
1-to-6 1-to-6 Roll
Cntr Cntr C
o Ra
Dpatha.vhd n
Adder t
dicesum r
D7 o
Dpathb.vhd Test win
D11 l
Logic
D2312
Point Comparator eq lose
Register
sp
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Dice Game Implementation

• Dice game implemented in three 22V10 PLDs

– control.vhd (Finite State Machine)
– dpatha.vhd (two 1-6 counters, adder)
– dpathb.vhd (point register, comparator, test logic)
• The Control FSM is implemented using one-hot
encoding.
– Outputs q0, q1, q5 are states S0, S1, S5. Output “win” is
state S2, output “lose” is state S3. Outputs q0,q1,q5 are
available just for debugging purposes.

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Finite State Machine Changes

Asynchronous Reset now use to exit states S2, S3. Resets
back to State S0.

S2 Win

S3 Lose

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1
 Finite State Machine Changes (cont).
Because we don’t have debounced switches, added extra “roll”
input called “Ra”. Changed States S1, S5 to use Ra, not Rb.

S1
This means that to
0 roll the dice, you
Ra Roll use flip switch Rb
1 up, then down.
This starts the
S5 dice rolling. To
stop the dice, Flip
0 Ra switch up then
Ra Roll
1 down.

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“dpatha” Details Counters count

1,2,3,4,5,6,1,2, etc
Cntr
Roll EN
(from control) Cntb
Clk Q
C 3
Reset A
R dicesum
d
d
Roll e 4
Ena EN
Logic Cnta r
3 Clk Q
C 3
Reset R

Ena = 1 when Cntb = 6 and Roll = 1

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“dpathb” Details D7 (1 if sum=7)

Test D7 (1 if sum=11)
Register Logic
Dicesum D2312
(from DIN (1 if sum=2,3 or 12)
dpatha) 4

sp LD
(from Point Compare Eq
control) (1 if point = sum)
4
Clk C

Reset R
“sp” (save point) loads value
of dicesum into register.
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