Loop Compensation Basics

Buck Converter CCM

More Details : AN76

Linear Technology Corp. Confidential 1

 Voltage-Mode Control

Linear Technology Corp. Confidential 2

 Voltage-Mode Controlled Buck Converter

L
rc
d R Vout slope
Vin
PWM C
VC

R2
d·Ts
d
VFB Ts
slope
Comp.
R1
d=k·Vc
Comparator vc
Vref
Power Stage Error Amp
Control-to-output Compensation A(s)

Linear Technology Corp. Confidential 3

 Control Block Diagram and Loop Gain

- Loop Gain: T(s) = GCV(s) · KREF · A(s)

- Bandwidth: crossover frequency fc @ loop gain |T(s)|=1
- Stability: Total phase > -360° at crossover frequency
Total Phase = (-180° + φ[A(s)] + φ[GCV(s)])f=fc > -360°

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 Control Block Diagram and Loop Gain

Design Targets:
-  Regulation accuracy, line rejection, ZOUT: |T(s)| >> 1 for f < fc
- Bandwidth: high bandwidth for fast transient response
- Stability: phase margin > 45°

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Buck Converter Power Stage Control-to-Output
L r

rc
Vin Cin d R Vout Output vo
PWM C

PWM Duty cycle d

Control-to-output transfer function: ESR Zero:

1 1
s f Z _ ESR = ⋅
Vin ⋅ (1 + ) 2π rC ⋅ C
vˆo ω z _ ESR
Gdv ( s ) = = Resonant double poles:
dˆ s s2
1+ + 2 1 1
ωo _ p ⋅ Q ω o_ p fo _ p ≈ ⋅
2π L⋅C
- 1 zero, 2 poles system.

Linear Technology Corp. Confidential 6

Power Stage Transfer Function With Voltage Mode Control

Gain (Gdv) Reference design

Double Poles 1 3X470uF Kemet Tantalum cap.
rC=30mΩ
Double Poles 2 Customer design
ESR Zero 2 X 220uF Panasonic SP cap.
rC=12mΩ
ESR Zero

Phase (Gdv)

Double Poles: -180o

ESR Zero: +90o
80o
30o

Phase delay is a strong function of output capacitor ESR

ESR variation : tolerance, temperature, aging, …
Linear Technology Corp. Confidential 7
Loop Compensation Design
Of Voltage Mode Control

Linear Technology Corp. Confidential 8

 Voltage Loop Compensation Design

1. Select desired crossover frequency fC

f SW
f C (min) > 3 ⋅ f 0 _ p ( LC ) f C (max) <
5

2. Loop compensation – type 3 compensation network

•  1 pole, low frequency integrator for high DC gain

•  2 zeros located around L-C resonant double poles
•  2 high-frequency poles:
•  to attenuate high frequency noise
•  to ensure the magnitude of the loop gain keeps
decreasing after the 0dB crossover

Linear Technology Corp. Confidential 9

 Type 3 Compensation Network
(Typical 3-Pole, 2-Zero system in Voltage Mode Control)

vˆc Zf
=−
vˆo Zi
⎛ 1 ⎞
Z i = R1 //⎜⎜ + R3 ⎟⎟
⎝ sC2 ⎠
1 ⎛ 1 ⎞
Zf = //⎜⎜ + R2 ⎟⎟
sC3 ⎝ 1 sC ⎠

vˆc ω I (1 + s ωZ 1 )(1 + s ωZ 2 )
=−
vˆo s (1 + s ω P1 )(1 + s ω P 2 )
where:
1 1 1
ωZ 1 = , ωZ 2 = ~ R1>>R3 C1>>C3
R2C1 (R1 + R3 )C2 R1C2
1 1 1 1 1
ωI = ~ ω P1 = , ωP 2 = ~
R1 (C1 + C3 ) R1C1 R3C2 CC R2C3
R2 ⋅ 1 3
C1 + C3
Linear Technology Corp. Confidential 10
 Type 3 Compensation Network
(Typical 3-Pole, 2-Zero system in Voltage Mode Control)

vˆc ω I (1 + s ωZ 1 )(1 + s ωZ 2 )
=−
vˆo s (1 + s ω P1 )(1 + s ω P 2 )

Quick recommendations :

•  fp1 = fz_ESR
•  fp2 ~ fc to 10 x fc
•  fz1 = fz2 = f0_LC
•  fI to get desired crossover frequency fc

Linear Technology Corp. Confidential 11

 Pros and Cons of Voltage Mode Regulators

u  Pros:
w  Don’t need dedicated current sensing R : high efficiency and
low cost solution
u  Cons:
w  Loop gain is a function of Vin
w  Solution: Vin feed-forward compensation
w  Loop gain is a function of output ESR
w  Need carefully loop compensation design
w  Need to compensate for double resonant pole
w  The current sensing / limit is slow and not accurate
w  Need external loop for current sharing if two supplies / phases
are in parallel

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 Current Mode Control

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Simplified Block Diagram of Current Mode IC
L Rsense

rc
d Ki R Vout vo
Vin PWM C

d
slope comp iL feedback R2 C2
Kref(s)
EAIN

igm gm veainR1 C1
Comparator ITH
vc
Rth
Ro
Cthp
Cth Error Vref
Op-Amp
Compensation
Network LTC1628/1629/3731

Linear Technology Corp. Confidential 14

Peak Current Mode Control

Slope comp VITH

~ Io

Inductor
current signal

Top FET Gate Signal

Linear Technology Corp. Confidential 15

LTC’s Current-Mode Controller Block Diagram

LTC1628/1629

CLK

1:1 Gain
Diff Op-Amp

Current sensing
and comparison loop ITH voltage loop
compensation

Linear Technology Corp. Confidential 16

 Power Stage Transfer Function With Current Mode Control
Gain (dB)

Reference design
1 3X470uF Kemet cap.
LF Pole rC=30mΩ
2 Customer design
ESR Zero
2 X 220uF Panasonic cap.
rC=12mΩ

Phase (deg)

1000

•  Reduce phase delay with different output capacitors

•  Stable system with reduced output capacitors / cost.

Linear Technology Corp. Confidential 17

Buck Converter Power Stage Control-to-Output

Simple small-signal model :

current source feeding the load

Slope comp to avoid subharmonic

oscillation not modeled

Control-to-output transfer function:

1 1
s fZ = ⋅
(1 + ) 2π RC ⋅ C
vˆo ωz
Gcv ( s ) = =K
vˆc s 1 1
(1 + ) fP = ⋅
ωp 2π R ⋅ C
- 1 zero, 1 pole system.

Linear Technology Corp. Confidential 18

 Pros and Cons of Current Mode Control
u  Pros:
w  Accurate / fast cycle-by-cycle current limit
w  True soft-start of inductor current
w  Easy to parallel phases / converters for high current
w  Accurate / fast current sharing
w  Very good line ripple rejection
w  Simple loop compensation with wide range of COUT, including
Ceramic
w  High reliability
u  Cons:
u  Need current sensing Rsense or RDSON or DCR, noise immunity
u  Subharmonic instability (ramp compensation needed)
u  Duty cycle limitation (tON, tOFF) due to current sensing delay
u  Higher output impedance at low frequency

Linear Technology Corp. Confidential 19

Loop Compensation Design
Of Current Mode Control

Linear Technology Corp. Confidential 20

 Voltage Loop Compensation Design

1. Select desired cross over frequency fC

f SW
f C (max) <
5
2. Choose desired loop phase margin:

Phase margin > 45o for buck converter

3. Choose optimum values of the resistor divider

network KREF(s) and ITH compensation network
A(s)

Linear Technology Corp. Confidential 21

 Feedback Voltage Divider and Phase Boost
vout

Gain
R2 C2
ΔGain
vEAIN Kref(s)
EAIN
gm R1 C1

VREF R1
K REF = =
Vref Vo R1 + R2

Phase
1+
2π ⋅ f z _ ref
ΔPhase
vEAIN ( s )
K REF ( s ) = = K REF ⋅
vo ( s ) s
1+
2π ⋅ f p _ ref
1 1 1
f z _ ref = f p _ ref = ⋅
2π ⋅ R2 ⋅ C2 K REF 2π ⋅ R2 ⋅ (C1 + C2 )
C1 and C2 provide phase boost around the crossover frequency.

Linear Technology Corp. Confidential 22

 ITH Compensation – High DC Gain
Compensator Gain A(s)
gm vEAIN EAIN
vith
igm fc
vITH

Gain (dB)
ITH
vEAIN

Cth Vref

Zith(s)

vITH ( s )
A( s ) = = − g m ⋅ ( Z ith ( s )) -90o
vEAIN ( s )

Phase
1. Simple Integrator:

1
A( s ) = − g m ⋅ 10 100 1kHz 10kHz 100kHz 1MHz

Cth ⋅ s Frequency

•  High low frequency gain for accurate DC Vout regulation

•  -90o phase delay @ expected cross-over frequency fC
Linear Technology Corp. Confidential 23
 ITH Compensation – LF Pole
Compensator Gain A(s) DC gain
determined
igm gm vEAIN EAIN
vith by gm·Ro
ITH vITH
vEAIN
Ro fc

Gain
Cth Vref

Zith(s)
spo LF pole
v (s) introduced by Ro
A( s ) = ITH = − g m ⋅ ( Z ith ( s ))
vEAIN ( s )
2. Simple Integrator with gm Op-Amp

Phase
-90o
Output Impedance Ro:
1 1
A( s ) = − g m ⋅ Ro ⋅ s po =
s Ro ⋅ Cth
(1 + )
s po 10 100 1kHz 10kHz 100kHz 1MHz

Frequency
•  gm Op-Amp adds a low frequency pole
•  Still -90o phase delay @ fC
Linear Technology Corp. Confidential 24
 ITH Compensation – Add Zero for Phase
Compensator Gain A(s)
igm gm vEAIN EAIN
ITH vITH vith fc

Gain
vEAIN
Rth fSW
Ro
Cth Vref
sthz boosts
Zith(s) phase margin

3. Add zero for Phase Compensation

Phase
-90o
at cross over frequency:
s
1+
sthz
A( s ) = − gm ⋅ Ro ⋅
s 10 100 1kHz 10kHz 100kHz 1MHz
(1 + )
1 s po Frequency
sthz =
Rth ⋅ Cth
•  Adds a zero before / around fC to boost up phase
•  Increased gain @ high frequency
Linear Technology Corp. Confidential 25
 ITH Compensation – HF Pole
Compensator Gain A(s)
igm gm vEAIN EAIN
ITH vITH vith
vEAIN fc

Gain
Rth fSW
Ro
Cthp
Cth Vref

Zith(s) HF Pole

4. Add a high frequency pole to

Phase
attenuate high frequency noise: -90o
s
1+
sthz
A( s ) = − g m ⋅ Ro ⋅
s s
(1 + ) ⋅ (1 + ) 10 100 1kHz 10kHz 100kHz
s po sthp Frequency
1 1
sthp = ≈ (Cth >> Cthp)
Cth ⋅ Cthp Rth ⋅ Cthp
Rth ⋅
Cth + Cthp
Linear Technology Corp. Confidential 26
 How much phase margin is necessary?
For a second-order system (good approximation near fc)

Closed-loop peaking factor Q vs. Unit-step response for various

loop-gain phase margin φm values of Q

Q<0.5 over-damping No overshoot => Q≤0.5 => φm≥76°

Q=0.5 critical damping
Q>0.5 under-damping

Linear Technology Corp. Confidential 27

 How much phase margin is necessary?

Changes in line, load and temperature tend to degrade phase margin from the nominal
value.

For commercial equipment, where the temperature variations are mild, a nominal phase
margin of 60° is usually enough to accommodate manufacturing tolerances.

If external factors such as use of remote sensing or variable amounts of filter capacitance
can affect phase margin then more than 60° of nominal phase margin may be desirable.

Military designs with their wide temperature swings should start with a higher nominal
value, such as 75 °, to try to maintain 20-30° of phase margin in the worst case.

The penalty for high phase margin is reduced gain at low frequency (reducing the line-
frequency ripple rejection) and slower transient response time.

The optimum choice of phase margin and bandwidth is determined by the application.

The important thing is to measure the bandwidth and margins rather than estimate them
or ignore them.
(Source : VENABLE technical paper # 2)

Linear Technology Corp. Confidential 28

 How to choose crossover frequency fc ?

ΔI OUT
In closed loop, |ZOUT| ~ |Z(COUT)|f=fc : ΔVOUT ~
2 ⋅ π ⋅ fc ⋅ COUT

1
Valid only for : ESR(COUT ) <
2 ⋅ π ⋅ fc ⋅ COUT

∆IOUT : output load step

∆VOUT : output voltage undershoot

Linear Technology Corp. Confidential 29

 Compensators type 1, 2, 3

Type 1:
•  DC pole only (integrator)
•  No phase boost
•  Used for power stage with small phase shift

Type 2:
•  DC pole + 1 pole + 1 zero
•  Phase boost < 90° (<75° in practice)
•  Used for CCM current-mode and voltage-mode converters in DCM

Type 3:
•  DC pole + 2 pole + 2 zero
•  Phase boost < 180° (<160° in practice)
•  Used for CCM voltage-mode buck or boost-derived types of converters

Linear Technology Corp. Confidential 30

 How to define compensation network

Simulation :

•  Use LTspice to generate Bode plot

•  Check:
•  crossover frequency (fc)
•  phase margin (φm)
•  Adjust compensation values manualy or use
Venable K-Factor method

Linear Technology Corp. Confidential 31

Extract from datasheet

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LTspice to generate Bode plot

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 LTspice to generate Bode plot
V(out) / V(pert)

Gain

Phase

φm=98°

Fc=67kHz

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 Input Filter & Cascaded DC/DC

--- no input filter with input filter

•  Filter can seriously degrade converter control system behavior

•  Check that converter dynamics is not affected by input filter
•  Not affected if |Zo(s)| < |Zi(s)| at all frequencies

•  Also check stability of cascaded DC/DC

•  2 stable converters can make an unstable system when cascaded

Linear Technology Corp. Confidential 35

 Practical Tests

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 Measure the Voltage Loop Gain
FREQUENCY
ANALYZER

Channel 2

10 Ω Output
d Ki Vout
PWM Channel 1

Loopgain=Ch2/Ch1
R2 C2

EAIN

igm gm vfb R1 C1
ITH

Rth
Ro
Cthp Vref
Cth

LTC Current Mode Controller

Linear Technology Corp. Confidential 37

Typical Loop Gain and Phase Margin
LTC3729 Current Mode Buck Converter

Gain Crossover
frequency fc

Phase Margin
Phase

φm

Frequency (Hz)
Linear Technology Corp. Confidential 38
Frequency Analyser - Bode 100 by Omicron Lab

1Hz to 40MHz frequency range

Linear Technology Corp. Confidential 39