EECS222: Embedded System Modeling Lecture 4

EECS 222:
Embedded System Modeling
Lecture 4

Rainer Dömer

doemer@uci.edu

The Henry Samueli School of Engineering

Electrical Engineering and Computer Science
University of California, Irvine

Lecture 4: Overview
• Review
– Behavioral hierarchy
• Introduction to the SpecC Language (Part 2)
– Communication and synchronization
– Timing
– Library support
– Persistent annotation
• Homework Assignment 2
– Setup the SpecC compiler and simulator
– Run simple examples
– Create producer-consumer example

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The SpecC Language

• Behavioral hierarchy
Sequential FSM Concurrent Pipelined
execution execution execution execution
B_seq B_fsm B_par B_pipe
b1 b1 b2 b1 b1

b2 b3 b4 b2 b2

b3 b5 b6 b3 b3

Exception handling, Exception handling,

abortion interrupt
e1 B1 e2 e1 B2 e2

b b
e1 e2 e1 e2

a1 a2 i1 i2

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The SpecC Language

• Communication and synchronization
– via shared variable

v1
B v2
v3

S R

Shared memory

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The SpecC Language

• Communication and synchronization
– via shared variable
– via channel with interfaces

C
v1 v1
B v2 B v2
v3 v3

S R S R

Shared memory Message passing

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The SpecC Language

• Communication and synchronization
– via shared variable
– via channel with interfaces
– via hierarchical channels

C C1
v1 v1
B v2 B v2 B C2
v3 v3

S R S R S R

Shared memory Message passing Protocol stack

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The SpecC Language

• Synchronization behavior S(out event Req,
out float Data,
– Event type in event Ack)
{
• event <event_List>; float X;
– Synchronization primitives void main(void)
{ ...
• wait <event_list>; Data = X;
notify Req;
• notify <event_list>; wait Ack;
...
• notifyone <event_list>; }
};
behavior R(in event Req,
Req in float Data,
B Data out event Ack)
{
Ack float Y;
void main(void)
{ ...
wait Req;
Y = Data;
S R notify Ack;
...
}
};
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The SpecC Language

interface IS
{
• Communication void Send(float);
};
– Interface class interface IR
{
• interface <name> float Receive(void);
{ <declarations> }; };
channel C
– Channel class behavior S(IS Port) implements IS, IR
• channel <name> { {
event Req;
float X;
implements <interfaces> void main(void) float Data;
{ <implementations> }; { ... event Ack;
Port.Send(X);
void Send(float X)
C ...
{ Data = X;
Req }
}; notify Req;
B IS Data IR wait Ack;
behavior R(IR Port) }
Ack { float Receive(void)
float Y; { float Y;
void main(void) wait Req;
{... Y = Data;
Y=Port.Receive(); notify Ack;
S R return Y;
...
} }
}; };
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The SpecC Language

interface IS
{
• Hierarchical channel interface PCI_IF
{ };
void Send(float);

– Virtual channel void Transfer(

enum Mode,
interface IR
{
implemented by int NumBytes, float Receive(void);
int Address);
standard bus protocol };
};
channel PCI
• Example: behavior S(IS Port) implements PCI_IF;
simplified PCI bus {
float X; channel C2
void main(void) implements IS, IR
{ ... {
Port.Send(X); PCI Bus;
... void Send(float X)
C2 } { Bus.Transfer(
}; PCI_WRITE,
B PCI sizeof(X),&X);
behavior R(IR Port) }
{ float Receive(void)
float Y; { float Y;
void main(void) Bus.Transfer(
{... PCI_READ,
Y=Port.Receive(); sizeof(Y),&Y);
S R ... return Y;
} }
}; };
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The SpecC Language

• Timing behavior Stimulus
(inout int a,
– Exact timing inout bit[4]
out event
b,
e1,
• waitfor <delay>; out event e2)
{
void main(void)
{
waitfor 5;
a = 42;
notify e1;

Example: Stimulus for a test bench waitfor 5;

b = 1010b;
notify e2;
ain ABus 0 42 a 43
waitfor 10;
in RMode a++;
b 0000b 1010b 1111b 0000b
b |= 0101b;
in WMode
e1 notify e1, e2;
inout DBus d
e2 waitfor 10;
0/ 10/20 0/ 0/ 5/10 b = 0;
10/20 10/20 notify e2;
0 5 t1 10 t2 15t3 20
t4 t525 t6 30 t7 35 }
};

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The SpecC Language

Specification
• Timing
bit[7:0] Read_SRAM(bit[15:0] a)
– Exact timing {
bit[7:0] d;
• waitfor <delay>;
– Timing constraints do { t1: {ABus = a; }
t2: {RMode = 1;
• do { <actions> } WMode = 0; }
t3: { }
timing {<constraints>} t4: {d = Dbus; }
t5: {ABus = 0; }
Example: SRAM read protocol t6: {RMode = 0;
WMode = 0; }
t7: { }
}
in ABus a
timing { range(t1; t2; 0; );
in RMode range(t1; t3; 10; 20);
range(t2; t3; 10; 20);
in WMode range(t3; t4; 0; );
range(t4; t5; 0; );
inout DBus d range(t5; t7; 10; 20);
0/ 10/20 0/ 0/ 5/10
range(t6; t7; 5; 10);
10/20 10/20 }
return(d);
t1 t2 t3 t4 t5 t6 t7
}

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The SpecC Language

Implementation 1
• Timing
bit[7:0] Read_SRAM(bit[15:0] a)
– Exact timing {
bit[7:0] d;
• waitfor <delay>;
– Timing constraints do { t1: {ABus = a; waitfor( 2);}
t2: {RMode = 1;
• do { <actions> } WMode = 0; waitfor(12);}
t3: { waitfor( 5);}
timing {<constraints>} t4: {d = Dbus; waitfor( 5);}
t5: {ABus = 0; waitfor( 2);}
Example: SRAM read protocol t6: {RMode = 0;
WMode = 0; waitfor(10);}
t7: { }
}
in ABus a
timing { range(t1; t2; 0; );
in RMode range(t1; t3; 10; 20);
range(t2; t3; 10; 20);
in WMode range(t3; t4; 0; );
range(t4; t5; 0; );
inout DBus d range(t5; t7; 10; 20);
0/ 10/20 0/ 0/ 5/10
range(t6; t7; 5; 10);
10/20 10/20 }
return(d);
t1 t2 t3 t4 t5 t6 t7
}

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The SpecC Language

Implementation 2
• Timing
bit[7:0] Read_SRAM(bit[15:0] a)
– Exact timing {
bit[7:0] d; // ASAP Schedule
• waitfor <delay>;
– Timing constraints do { t1: {ABus = a; }
t2: {RMode = 1;
• do { <actions> } WMode = 0; waitfor(10);}
t3: { }
timing {<constraints>} t4: {d = Dbus; }
t5: {ABus = 0; }
Example: SRAM read protocol t6: {RMode = 0;
WMode = 0; waitfor(10);}
t7: { }
}
in ABus a
timing { range(t1; t2; 0; );
in RMode range(t1; t3; 10; 20);
range(t2; t3; 10; 20);
in WMode range(t3; t4; 0; );
range(t4; t5; 0; );
inout DBus d range(t5; t7; 10; 20);
0/ 10/20 0/ 0/ 5/10
range(t6; t7; 5; 10);
10/20 10/20 }
return(d);
t1 t2 t3 t4 t5 t6 t7
}

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The SpecC Language

• Library support
– Import of precompiled SpecC code
• import <component_name>;
– Automatic handling of multiple inclusions
• no need to use #ifdef - #endif around included files
– Visible to the compiler and synthesis tools
• not inline-expanded by preprocessor
• simplifies reuse of IP components
// MyDesign.sc

#include <stdio.h>
#include <stdlib.h>

import “Interfaces/I1”;
import “Channels/PCI_Bus”;
import “Components/MPEG-2”;

...

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The SpecC Language

• Persistent annotation
– Attachment of a key-value pair
• globally to the design, i.e. note <key> = <value>;
• locally to any symbol, i.e. note <symbol>.<key> = <value>;
– Visible to the compiler and synthesis tools
• eliminates need for pragmas or pseudo comments
• allows easy data exchange among tools

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The SpecC Language

• Persistent annotation
– Attachment of a key-value pair
• globally to the design, i.e. note <key> = <value>;
• locally to any symbol, i.e. note <symbol>.<key> = <value>;
– Visible to the compiler and synthesis tools
• eliminates need for pragmas or pseudo comments
• allows easy data exchange among tools
SpecC 2.0:
/* comment, not persistent */ <value> can be a
// global annotations composite constant
note Author = “Rainer Doemer”; (just like complex
note Date = “Fri Feb 23 23:59:59 PST 2001”; variable initializers)

behavior CPU(in event CLK, in event RST, ...)

{
// local annotations
MinMaxClockFreq = ={750*1e6,
note MaxClockFrequency 800*1e6 };
800 * 1e6;
note CLK.IsSystemClock = true;
note RST.IsSystemReset = true;
...
};
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Homework Assignment 2
• Task: Introduction to SpecC Compiler and Simulator
• Steps
– Setup the SpecC compiler scc
• source /opt/sce/bin/setup.csh
– Use scc to compile and simulate some simple examples
• scc HelloWorld -vv
• See man scc for the compiler manual page
– Build and simulate a Producer-Consumer example
• See slide 8 for reference
• Producer Prod should send string “Beans and Potatoes”
character by character to the consumer Cons
• Both print the sent/received characters to the screen
• Deliverables
– Source and log file: ProdCons.sc, ProdCons.log
• Due
– January 15, 2019, 6pm

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