IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 56, NO.
5, MAY 2009
Control and Resonance Damping of Voltage-Source
and Current-Source Converters With LC Filters
Yun Wei Li, Member, IEEE
Abstract—In this paper, the closed-loop control of both voltage-
source converter (VSC) and current-source converter (CSC) sys-
tems with LC filters is investigated, with a focus being put on the
damping of LC resonance. First, both single-loop and multiloop
control schemes for a voltage-source inverter (VSI) with output
LC filter are analyzed, where the design and tuning procedure
can also be applied to a current-source inverter (CSI) with output
CL filter. It is shown that both VSI and CSI systems are subject to
LC resonance, even with multiloop control, while the CSI system
is also subject to LC resonant frequency variations. On the other
hand, the LC resonant frequencies in both current-source rectifier
(CSR) and voltage-source rectifier (VSR) systems with input LC
filter circuits are relatively fixed due to the small variation range
of source impedance. To further dampen the LC resonance in
these converter systems, active damping techniques such as virtual
harmonic damper and control-signal-shaping methods are inves-
tigated, and their implementation into the converter systems is
discussed in detail. Experimental results from both a VSC system
and a CSC system are obtained.
Index Terms—Active damping, closed-loop control, current-
source converters (CSCs), LC resonance, Posicast controller,
three-step compensator, virtual resistor, voltage-source converters
(VSCs).
I. I NTRODUCTION
V OLTAGE-SOURCE converters (VSCs) and current-
source converters (CSCs) are two topologies that are
widely used in power conversion applications such as uninter-
ruptible power supplies (UPSs) [1]–[8], active filters [9]–[11],
distributed generation (DG) systems [12]–[16], electric drives,
custom power devices [17]–[24], etc. Most of these con-
verter systems consist of both active switching devices such
as insulated-gate bipolar transistors (IGBTs), integrated gate-
commutated thyristors (IGCTs), and gate turn-off thyristors
with pulsewidth modulation (PWM) and passive components
such as inductors and capacitors to assist in device commu-
tations and switching harmonic filtering. Among these appli-
cations, the VSCs are generally used with effective switching
frequencies of a few thousand hertz for relatively low power
applications or for high-power application with multilevel
topologies. CSC systems, on the other hand, are mostly used
at high power level with switching frequencies in a range of a
Manuscript received June 7, 2008; revised August 8, 2008. First published
November 18, 2008; current version published April 29, 2009.
The author is with the Department of Electrical and Computer Engineering,
University of Alberta, Edmonton, AB T6G 2V4, Canada (e-mail: yunwei.
li@ece.ualberta.ca).
Color versions of one or more of the figures in this paper are available online
at http://ieeexplore.ieee.org.
Digital Object Identifier 10.1109/TIE.2008.2009562
0278-0046/$25.00 © 2009 IEEE
1511
few hundred hertz [15], [30], [31], [45] to reduce the switching
losses.
An important area of study on the converter systems is the
high-performance control to ensure that the converter system
output voltage and/or current closely tracks the desired refer-
ences with both good transient and steady-state performances.
Numerous control methods have been reported in the literature,
including deadbeat control [6], adaptive control [7], repetitive
control [8], robust H-infinity control [4], [21], sliding-mode
control [5], and classical control with PI or P + resonant con-
trollers [1]–[3], [14], [25]–[28]. For a converter system with
input or output LC filter circuit, another issue is the damping
of LC resonance, which, if not carefully addressed, will in-
troduce transient distortions and steady-state harmonics around
the LC resonant frequency or even affect the overall system
stability. As passive damping using physical resistors involves
excessive energy losses, a preferred approach is therefore to
dampen the LC resonance through a properly designed control
scheme.
In this paper, some commonly employed closed-loop control
strategies for VSC and CSC systems are investigated. The
design and analysis of these closed-loop control schemes are
presented, with a focus being put on their effects on the damp-
ing of LC resonance introduced by the LC filters. Specifically,
for a voltage-source inverter (VSI) with output LC filter, both
single-loop and multiloop control schemes are discussed. It is
shown that both control schemes are subject to LC resonance
due to the limited control loop gains for high-/low-frequency
disturbance attenuation. With a duality to a VSI system, the
current-source inverter (CSI) system is also subject to LC
resonance. However, the resonant frequency in a CSI system
would vary widely, depending on the loads connected. In the
contrary, the LC resonant frequencies in both current source
rectifier (CSR) and voltage source rectifier (VSR) systems with
input LC filter circuits are relatively fixed due to the small
variation range of source impedance.
To further dampen the LC resonance in a converter sys-
tem, virtual harmonic resistive damper and control-signal-
shaping techniques can be employed. The virtual harmonic
damper functions by mimicking a physical resistor at only
the harmonic frequencies without power losses. However, the
filtering process in the virtual harmonic damper is subject
to degraded dynamic performance. The control-signal-shaping
method, functioning by shaping the PWM signal to cancel
the oscillatory effect through a sequence of step responses,
is therefore sensitive to LC resonant frequency variations.
For a converter system with a relatively fixed LC resonant
frequency, the signal-shaping controller such as the two-step
1512
Fig. 1. Three-phase VSI system with output LC filter.
Posicast controller or the three-step compensator can be used
within the closed-loop control path. For a converter system
with a variable resonant frequency, the virtual harmonic damper
is an effective method. It is also shown in this paper that
the combination of the virtual harmonic damper and control
signal shaping can further improve the damping performance.
This combination approach is particularly attractive for a grid-
interfacing converter system. Experimental results from both a
VSC system and a CSC system are obtained.
II. C LOSED -L OOP C ONTROL OF VSI W ITH
O UTPUT LC F ILTER C IRCUIT
A VSI with output LC filter is shown in Fig. 1. This VSI
can be connected as a shunt inverter system such as a UPS or
power-electronic-interfaced DG systems. It can also be in the
form of a series-connected inverter system such as a dynamic
voltage restorer (DVR) [17]–[22]. In a more complex system
like a unified power quality compensator or a grid-interfacing
compensator [14], [23], [24], both shunt- and series-connected
VSIs will present. Irrespective of how such a VSI system is
connected, the output LC filter tends to introduce the LC
resonance into a system.
A. Single Voltage Loop
Fig. 2(a) shows the single-voltage-loop control of a VSI
system. This control scheme is commonly used to save cost (on
current sensors) while still maintaining the ability of good ref-
erence voltage tracking. However, the tradeoff between steady-
state response, transient response, and stability is severe, as
large control gains are generally required for good steady-
state and transient performances, but they generally deteriorate
the system stability. If smaller gains are used for an adequate
stability margin, the system will be subject to sluggish response
and significant steady-state error. A possible solution for the
conflicting requirements is to implement a voltage feedfor-
ward loop from the voltage reference V ∗ to the modulator
∗
input VInv [see Fig. 2(a)]. The voltage controller can be a PI
controller in the synchronous d−q frame (where fundamental
components are dc signals) or a P + resonant controller in the
stationary frame, as shown in Fig. 2(a). In effect, the P +
resonant controller is derived by transforming a synchronous
frame PI controller to the stationary frame [25]–[27] and can
practically be implemented using the form GPR (s) = kP +
2kI ωcut s/(s2 + 2ωcut s + ω02 ), where kP is the proportional
gain, kI is the integral term at the fundamental frequency
(ω0 ), and ωcut is the cutoff bandwidth which determines the
controller’s performance under frequency variations [25]. This
single-loop feedback scheme, however, is subject to serious LC
IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 56, NO. 5, MAY 2009
resonance (see Fig. 8 for a Bode plot), which is mainly caused
by the reference feedforward loop [21].
B. Multiloop Control
To have a system with improved transient and steady-state
performances, multiloop control can be used, where an inner
current loop functions by improving the overall system stability
and attenuating the LC resonance introduced by the filter.
The design of the multiloop control is an interactive process,
where the outer voltage loop controller is designed with spec-
ified bandwidth and error-tracking requirements based on a
given plant including inner current loop, while the inner current
regulator is tuned with consideration of its influences on the
generated new plant (for the outer loop) and its relations to
disturbance rejection capability. It is worth mentioning that
either filter inductor current (If ) or filter capacitor current (IC )
can be used as the inner loop control variable. While the filter
capacitor current feedback is usually used for better rejection of
load current disturbance, the filter inductor current feedback is
considered here due to its better performance for LC resonance
damping and the ability of overcurrent protection. The damping
performance difference with different feedback alternatives
is caused by the different overall current loop gains (with
consideration of the output load) when the same controller
gain kC is used. The relatively larger gain associated with the
filter inductor current feedback loop introduces better damping
performance [29].
With an inner current loop, the new plant (with the reference
current I ∗ as input and the capacitor voltage VC as output) is
shown in
kC
GV (IN ) = (1)
Cf Lf s2 + (Cf Rf + Cf kC )s + 1
where kC is the current loop controller gain. From (1),
the natural
 frequency and damping ratio can beobtained as
ωn = 1/(Cf Lf ) and ζ = (Cf Rf + Cf kC )/(2 Cf Lf ), re-
spectively. Obviously, the natural frequency is only determined
by the output LC filter. However, the current controller gain
kC can change the system damping ratio, with a higher kC
leading to a better damped system. To illustrate this, the new
plants with different current regulator gains are shown in Fig. 3.
As expected, a larger kC results in a larger damping ratio and
therefore introduces more effective damping. However, it can
also be seen from Fig. 3 that a larger kC will introduce larger
phase shift at the operating frequency. This phase shift should
be compensated by the outer voltage loop in order to minimize
the voltage-control steady-state error.
With an interactive multiloop controller tuning process, the
gains of outer voltage loop controller change with the variation
of inner current regulator gain at a specified final control loop
bandwidth and steady-state error. To further illustrate these
effects, the final control loop bandwidth of 5000 rad/s and
a steady-state error of 1% at the fundamental frequency are
defined first. The final open-loop system (with the voltage
error as input and the capacitor voltage as output) and voltage
controller can then be obtained. Considering a P + resonant
LI: CONTROL AND RESONANCE DAMPING OF VSCs AND CSCs WITH LC FILTERS 1513

Fig. 2. Control schemes for the VSI system in stationary frame using (a) single-loop feedforward + feedback and (b) double-loop control.

Fig. 3. Plants with closed current loop under different current regulator gains.

controller (GPR ) for the voltage loop, the final open-loop

transfer function can be obtained as
Fig. 4. Effects of different current regulator gains on (a) voltage controller
GV (OL) = GPR · GV (IN ) and (b) final open-loop system (at fixed bandwidth and steady state error).

kC kP s2 + 2ωcut kC (kP + kI )s + kC kP ω02

= (2) With (2), the voltage controller parameters can be obtained
a4 s4 + a3 s3 + a2 s2 + a1 s + a0
by solving two equations: one at the fundamental frequency to
where meet the steady-state-error requirement, and the other one at
the bandwidth frequency to meet the bandwidth requirement.
a4 = Cf Lf With a selected ωcut (8 rad/s), the proportional gain kP and the
a3 = Cf Rf + Cf kC + 2ωcut Cf Lf integral gain kI for the voltage controller can be determined.
The effects of current controller gains on the obtained voltage
a2 = Cf Lf ω02 + 2ωcut (Cf Rf + Cf kC ) + 1 controller and final open-loop system are shown in Fig. 4. It
can be seen that with the increase of kC , voltage controller gain
a1 = 2ωcut + ω02 (Cf Rf + Cf kC )
needs to be decreased (except at the fundamental frequency)
a0 = ω02 . to maintain the same control bandwidth. While with the same
1514
Fig. 5. Frequency response of filter inductor feedback current to inverter
output (at fixed bandwidth and steady-state error).
bandwidth maintained, different kC values will change the
shape of the final open-loop system, as shown in Fig. 4(b),
where a larger kC produces higher gains at low frequencies.
These high gains will amplify the low-frequency noises such as
the subharmonics or the measurement dc offsets and therefore
affect the system stability. To avoid it, either more complex
voltage compensator [22] or lower current regulator gain will
be required.
Similar effects can also be observed from Fig. 5, where
it can be seen that a larger kC will amplify the low-/high-
frequency inductor current disturbances. An analysis of the
load current disturbance has also been done with similar plot
as in Fig. 5 obtained, meaning that a larger kC results in a
system that is sensitive to both low- and high-frequency current
disturbances. The value of kC is therefore always limited due
to practical considerations such as amplification of current har-
monic noise or dc offset in current and voltage measurements.
Finally, with considerations of all these factors, the criterion
of tuning kC is to choose a kC as large as possible, provided
that the stability of the system from the voltage and current
feedback disturbances is adequately maintained. It can be seen
from Fig. 4(b) that with a selected kC = 0.9, the resultant
system will still have a slight resonant peak at the LC cutoff
frequency.
C. Further LC Resonance Damping Methods
Other than the control schemes, the loads connected to a VSI
system may slightly affect the LC resonance by providing some
damping. The load effects on the resonance can be explained
from the energy point of view. Assuming a fixed load voltage
magnitude, a smaller load resistance will generally dissipate the
resonance energy more quickly and therefore provide relatively
more damping than a larger load resistance. With the presence
of a series load inductance (in an inductive load), the voltage
drop across the load resistance is reduced, thus reducing the
resonance energy absorption by the load and reducing the
IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 56, NO. 5, MAY 2009
Fig. 6. Different locations of virtual resistor in an LC circuit.
damping effect. It is worth mentioning that the load effects on
the resonance (both overshoot and resonant frequency) in a VSI
system are very limited [21].
To further dampen the LC resonance, one method is to
employ the virtual resistor, which is realized by control and
functions by emulating a physical resistor but without the asso-
ciated losses [31], [34]–[36]. There are four possible locations
for the virtual resistor in an LC filter circuit, as shown in Fig. 6:
in parallel/series with the inductor or in parallel/series with the
capacitor. For a virtual resistor in parallel with the inductor or
capacitor (realized by dividing the inductor or capacitor voltage
by the desired virtual resistance), differentiators are required to
convert the current signal from the virtual resistor loop output
to the voltage signal that can be applied to the PWM modulator
in the VSI [35]. The differentiators can be avoided with the
multiloop control scheme, where the current signal can be
applied to the reference current for the inner current loop [see
Fig. 2(b)]. However, as the inner loop usually employs a limited
gain, as discussed earlier, the virtual resistor control accuracy
will suffer in this case. In the contrary, a virtual resistor in series
with the filter inductor or capacitor (realized by multiplying the
inductor or capacitor current with the desired virtual resistance)
can be directly applied to the PWM modulator. Considering that
the inductor current is already measured in the VSI multiloop
control scheme, a virtual resistor in series with the filter induc-
tor is a better option.
Designed to ideally dampen the LC resonance, the virtual
resistors, however, can interfere with the fundamental current/
voltage control performance or cause modulation index satura-
tion or overmodulation problems [31], [34], [45]. To avoid this,
the fundamental components in the virtual harmonic control
loop should be filtered out, and the resultant virtual resistor
only takes effect at all the harmonic frequencies as a virtual
harmonic damper (Rh ). However, this fundamental component
filtering will affect the control scheme transient performance,
as will be discussed in the next section.
Alternative methods to eliminate the LC resonance include
feedforward control signal compensation using the LC filter
model [32] and control signal shaping using compensators
[21], [33], [38]–[41]. Among them, the two-step (or half-cycle)
Posicast controller has recently been identified as a simple
and effective approach for resonance elimination while with
the same tracking performance attained [39]–[41]. As shown
in Fig. 7, the Posicast controller functions by splitting a step
input command into two intermediate steps. By properly timing
the interval (Td ) of the two steps, the system response pro-
duced by the second step can cancel the oscillatory response
excited by the first step, resulting in an oscillation-free step
LI: CONTROL AND RESONANCE DAMPING OF VSCs AND CSCs WITH LC FILTERS
Fig. 7. Compensation principle of the two-step Posicast controller.
Fig. 8. Bode plots of the single-voltage-loop control with reference feedfor-
ward and Posicast controllers.
response. The transfer function of the Posicast controller is ex-
pressed in
1 σ −sTd
Gtsp = + e (3)
1+σ 1+σ
where σ is the step response overshoot of the lightly damped
system and Td should be selected as half of the resonance
period (Tr ) for complete LC resonance elimination. To reduce
its sensitivity to LC resonant frequency variations, the Posicast
controller can be inserted within a feedback control loop (to
shape the modulation signal) as a more robust option [39]–
[41]. For digital implementation, the two-step Posicast transfer
function in (3) must first be discretized as
1 σ
GZtsp = + z −int(Td /Ts ) (4)
1+σ 1+σ
where Ts is the system sampling period and int( ) denotes the
integer number of the delayed samples. This discrete form im-
plies that if Td /Ts is not an integer, the fractional part of it could
result in delay time error in the Posicast compensation. A higher
sampling frequency will therefore give finer delayed samples
for timing the second step command. Usually, for a high-
switching VSI, this delay error is quite small, e.g., with a 5-kHz
switching frequency and a same system sampling frequency,
the maximum delay time error introduced by discretization is
Δt = 0.1 ms. This error can be further eliminated by the three-
step compensator, as will be discussed in Section IV.
The performance of Posicast controller in a single-loop
scheme is shown in Fig. 8. Compared to the control scheme
without Posicast, the LC resonance is almost completely elim-
inated, and the digitization process introduces only very slight
1515
Fig. 9. Three-phase CSI system with output CL filter.
distortion to resonance compensation. Furthermore, the high-
frequency attenuation characteristics of the original control
scheme are not affected by the Posicast control, except for the
notches at (Tr /Td )n ± 1 (n is an integer) times the resonant
frequency.
III. C LOSED -L OOP C ONTROL OF CSI W ITH
O UTPUT CL F ILTER C IRCUIT
CSCs are mainly used at high-power applications [15], [30],
[31], [45] with a low switching frequency of a few hundred
hertz due to the concerns of losses at high power level. Majority
of CSCs are used in drive applications [30], while some other
applications have also been seen in static synchronous com-
pensator (STATCOM) [42], active filters [43], etc. As a CSC
system requires capacitors to assist device commutations, it is
also subject to LC resonance. The attenuation of LC resonance
is more challenging in a CSC system due to the low switching
frequencies.
A CSI circuit with CL output filter is shown in Fig. 9, where
the filter inductor can be either an intentionally added inductor
[42] or the load or line inductance as in most drive applications.
The block diagram representation of the multiloop control
scheme of this CSI system is shown in Fig. 10. As shown, it
consists of an inner capacitor or inductor voltage loop and an
outer inductor current loop. The duality of the multiloop control
of a CSI with CL filter and a VSI with LC filter was reported
in [28], with the matched variables being IL(CSI ) → VC(VSI) ,
VC(CSI) → If (VSI) , and VL(CSI) → IC(VSI) . The alternatives
of using inductor current or capacitor current feedback in a
VSI inner current loop are therefore transformed to capacitor
voltage or inductor voltage feedback in the CSI inner voltage
loop. As the inductor voltage might not be accessible (when Lf
is the load/line inductance) and considering the LC resonance
attenuation, the capacitor voltage is preferred to be used for
the inner loop. With similar control and system schemes, the
multiloop controller design of a CSI system can be conducted
in a similar approach, as discussed in Section II.
Considering an inner voltage loop with proportional con-
troller (kV ) and an outer current loop with P + resonant con-
troller (see Fig. 10), the new plant with inner voltage loop can
be obtained as
kV
GC(IN ) = .
Cf Lf s2 + (Cf Rf + Lf kV )s + (1 + Rf kV )
(5)
With (5), the natural
 frequency and damping ratio can
be obtained as ωn = (1+Rf kV )/(Cf Lf ) and ζ = (Cf Rf +

Lf kV )/(2 Cf Lf (Rf kV +1)). Unlike a VSI system, where
only the damping ratio is related to the inner controller gain,
1516
Fig. 10. Multiloop control of the CSI system in stationary frame.
Fig. 11. CSI control scheme with virtual harmonic damper.
both the resonant frequency and the damping ratio of a CSI
system are affected by the inner voltage regulator. Note that,
by assuming Rf = 0, the resonant frequency in a CSI system is
also constant. However, this resonant frequency will vary due to
the series connection of the CSI system to the “outer system,”
which are mainly inductive due to the inductive load and line
impedance. The series-connected inductance will add to the
filter inductance and seriously affect the resonance frequency.
As the LC resonant frequency for a CSI system will vary in
a wide range, depending on the load, it is difficult to use the
control-signal-shaping techniques discussed in Section II-C.
As a damping method immune to resonant frequency varia-
tions, the virtual harmonic damper is particularly suitable for
such a CSI system. A close examination of the four possible
locations of the virtual resistor in Fig. 6 reveals that, by emu-
lating a physical damping resistor (Rh ) in parallel with the CSI
output capacitor, the virtual harmonic control scheme can be
easily realized with the capacitor voltage feedback (this also
represents a duality with the VSI, where a virtual damping
resistor in series with the filter inductor is preferred). The
CSI control scheme with virtual harmonic damper is shown
in Fig. 11, where the damping current (current flowing into
the damping resistor) is obtained as IDamp = VC /Rh , which
∗ system is interfaced to the grid, any disturbance in the grid will
is then subtracted from Iinv before being fed to the CSI PWM
modulator.
As mentioned earlier, in order to avoid interference with the
fundamental current control loop and to prevent overmodula-
tion caused by the relatively large amplitude, the fundamental
component should be filtered out to ensure that the damping
current IDamp only contains harmonic current components.
This can be done by using a high-pass filter (HPF) in the syn-
chronous frame or a digital notch filter in the stationary frame.
With good steady-state performance, the HPF and digital notch
filter, however, will degrade the transient damping performance
for the virtual harmonic damper, particularly when this is a
disturbance from the filter capacitor feedback voltage. This is
caused by the tradeoff between the dynamic response and high-
IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 56, NO. 5, MAY 2009
frequency signal distortion in both the HPF and the digital
notch filter (e.g., a smaller cutoff frequency in an HPF gives
slow response, while a larger cutoff frequency leads to high-
frequency signal distortions).
To ensure the proper damping of LC resonance and con-
sidering the low LC resonant frequency for a low-switching
CSC, the retrieval of undistorted harmonic signal is the pre-
vailing factor, and this gives rise to the undesirable transient
IDamp overshoot [45]. To reduce this overshoot, a larger virtual
resistance Rh is required (see Fig. 11), which might lead to
an incomplete resonance damping. A possible solution to avoid
the undesirable transient caused by the filtering process is to
let the virtual resistor loop respond to only the disturbance
signals [36]. To realize this, a compensation control block needs
to be designed to ensure that the reference to output transfer
function is unchanged with the addition of virtual resistor
loop. However, with an unchanged reference to output transfer
function, the virtual resistor loop might not properly respond to
the LC resonance excited by a sudden reference change.
Finally, it is commented that in a low-switching high-power
CSC system, multisampling needs to be implemented for
the virtual resistor control loop to ensure a high-sampling-
frequency-to-harmonic-frequency ratio and, therefore, a stable
and effective control loop at harmonic frequencies.
IV. C LOSED -L OOP C ONTROL OF R ECTIFIERS
W ITH I NPUT LC F ILTER
LC filter circuits are also commonly used in VSR and CSR
to improve the input-line-current waveforms. For the rectifier
control, either a single-loop or a multiloop control scheme can
be used, with the outer loop being the dc current for a CSR
system and the dc voltage for a VSR system. As a rectifier
also excite the LC resonance.
A. Closed-Loop Control of CSR
A CSR system with input LC filter circuit is shown in
Fig. 12. Similar to that in a CSI system, the filter inductor in
a CSR system is in series connection to the “outer system.”
However, as the “outer system” in a CSR is the line impedance,
which will only vary in a small range [44], the LC resonance
in a CSR system is relatively fixed. As a result, the control-
signal-shaping method could be implemented. On the other
hand, the virtual harmonic damper can also be employed for
a CSR system to emulate physical resistors in parallel with the
LI: CONTROL AND RESONANCE DAMPING OF VSCs AND CSCs WITH LC FILTERS 1517

Fig. 12. Three-phase CSR system with input LC filter.

Fig. 14. Control scheme for the CSR with both virtual harmonic damper and
three-step compensator.

Fig. 13. Compensation principle of the three-step compensator.

input filter capacitor (similar to the implementation to a CSI

system).
However, the implementation of these control techniques
on a CSR system is subject to two complications. First, unlike
a high-switching VSC system, the ratio of Td /Ts is low for
a low-switching CSC system, which will lead to significant
delay time error during digital implementation if the two-step
Posicast controller is used. The second complication is the
transient damping performance degradation caused by the HPF
or notch filter, as mentioned earlier for the CSI system, which
is particularly important here as a rectifier is subject to frequent
grid voltage transients/disturbances. Fig. 15. Bode plots of the CSR input current (Iw ) disturbance to the line
To achieve accurate waveform-shaping compensation, one current (Is ).
method is to change the sampling frequency and switching fre-
and delay time (determined by the three-step compensator).
quency according to the system resonant frequency, as reported
Once the third segment step is added, the compensator reaches
in [38]. Considering the application complexity, a better way is
its steady state, resulting in a smooth summation response.
to use the accurate three-step compensator [45] by separating
Similar to the two-step Posicast controller, the three-step com-
the step response into three steps with magnitudes of A1 A2 A3
pensator can be implemented conveniently without changing
and delay times of Td and 2Td for the second and third steps,
the existing switching and sampling frequencies. Note that this
respectively, as shown in Fig. 13. The transfer function of such
method is still sensitive to line-impedance variations, which
a three-step compensator is shown as
result in incomplete LC resonance compensation. Furthermore,
GTh = A1 + A2 e−Td s + A3 e−2Td s . (6) the modulation-signal-shaping techniques cannot compensate
for disturbances outside of the dc-current control loop, such as
To avoid the delay time error, the delay time Td for the the grid voltage disturbance.
three-step compensator can be first selected according to the On the other hand, the virtual harmonic damper can be
system switching and sampling frequencies to ensure an integer realized in a similar way as in a CSI system by measuring the
Td /Ts . The magnitudes of the three segment steps can then be filter capacitor voltage and applying an HPF or a notch filter.
calculated as follows for accurate implementation This damping method is immune to resonant frequency varia-
⎧ tions. However, its dynamic response is degraded, as discussed
⎪ A1 = 1−2 cos δ·e−ζωn1 Td +e−2ζωn Td earlier. To improve the dynamics of harmonic damper control
⎪
⎨
cos δ·e−ζωn Td loop, a larger virtual resistor value has to be selected to reduce
A2 = 1−2 cos−2 −ζωn Td
+e−2ζωn Td (7)
⎪
⎪
δ·e the overshoot but at the expense of longer resonance settling
⎩ −2ζωn Td
A3 = 1−2 cos δ·ee−ζωn Td +e−2ζωn Td time. In order to complement each other’s functionalities, a
combination of both methods would be a better solution [45].
where ωn and ζ are the plant natural frequency and damping Fig. 14 shows the control scheme of a CSR system with
ratio and δ = (Td /Tr )2π is the angle delay corresponding to Td both the control-signal-shaping compensator and the virtual
in time domain, with Tr being the resonance period. By separat- harmonic damper. A single dc-current feedback loop is imple-
ing a single-step response into three segment steps with (6) and mented here, while more control loops can also be used for
(7), each segment response has the same oscillatory term (deter- reactive power control or power factor regulation [32]. The
mined by the lightly damped plant) but with its own magnitude system damping performance is shown in Fig. 15, where it
1518
Fig. 16. Three-phase VSR system with input LC filter.
can be seen that the three-step compensator can accurately
eliminate the resonant peak, while the virtual resistor alone
cannot completely dampen the resonance due to the large resis-
tance required for transient overshoot reduction. By using the
combination damping method, the CSR system has a negative
notch at the resonant frequency. This negative notch provides an
additional margin for the three-step compensator to withstand
system parameter variations. As shown in Fig. 15, with a
50% increase of filter inductance, the three-step compensator
alone leads to a residual resonant peak. This residual resonant
peak can be effectively reduced by the virtual resistor if both
damping methods are employed. Finally, similar to the two-step
Posicast controller, the three-step compensator also exhibits
multiple-notch-filter like characteristic.
B. Closed-Loop Control of VSR
A three-phase VSR with input LC filter circuit is shown
in Fig. 16. A multiloop control scheme is usually used for
such a system, with an outer dc voltage control loop and an
inner converter input current (Iin ) control loop. The inner loop
functions to provide more control flexibilities by regulating the
reactive power or power factor. Although the multiloop tuning
considerations discussed in Section II-B are also applicable
here, further tuning of the dc voltage controller (usually a PI
controller) using the zero-pole placement technique is a more
common practice for a rectifier system [33], [45].
Similar to a CSR system, both the virtual harmonic damper
and control-signal-shaping techniques can be used for a VSR
system to the dampen resonance from different sources. For the
virtual harmonic damper loop, a virtual resistor in parallel with
the filter inductor (Lf ) or capacitor can be easily implemented
in a VSR system with inner current (Iin ) control loop [36], and
the implementation of Rh in parallel with the filter capacitor
is preferred here because the capacitor voltage is normally
measured for the purpose of grid synchronization.
Although similar control strategy can be implemented, the
presence of an additional inductor (Lin ) at the VSR input,
which is required to assist in device commutations in a VSC,
actually makes the filter circuit an LCL filter. Since this paper
focuses on the converter system with LC filter circuit, the VSR
system is not further discussed. More discussions of the control
issues related to an LCL filter can be found in [33] and [37].
V. E XPERIMENTAL I NVESTIGATIONS
Experimental investigation results from both a high-
switching IGBT-based VSC system and a low-switching IGCT-
based CSC system are obtained to illustrate the LC resonance
IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 56, NO. 5, MAY 2009
TABLE I
PARAMETERS OF THE VSC SYSTEM
Fig. 17. Experimental DVR system based on VSI.
damping performance. For the VSC system, a 200-kVA DVR
system is employed (Table I). Fig. 17 shows the experimen-
tal DVR system, which consists of series-connected injection
transformers, a three-phase VSI, inverter output LC filters, and
a dc-link capacitor. The power system upstream to the DVR
is emulated by a programmable voltage source and a step-up
transformer, which steps up the voltage source output from
380-V to 10-kV level. A step-down transformer is used to trans-
form the 10-kV voltage back to 380 V before connecting the
load. The basic operational principle of the DVR is to inject an
appropriate voltage in series and protect the downstream loads
during upstream voltage sags. In this experiment, both linear
and nonlinear loads are employed. The single-loop control with
reference feedforward scheme [Fig. 2(a)] is implemented. For
further resonance damping, the two-step Posicast controller is
inserted within the control loop.
Fig. 18 shows the transient waveforms when the DVR is
started upon the detection of an upstream voltage sag (source
voltage drops from 1 to 0.8 p.u.). A linear load is employed
at the downstream side. It can be seen that with the single-
loop control, the start-up transient is subject to serious LC
resonance, and the two-step Posicast controller can effectively
eliminate this resonance, even with a small digital implementa-
tion error, as discussed in Section II-C.
Fig. 19 shows the VSI system’s start-up transient under a
nonlinear load (diode rectifier with a capacitor and a resistor
connected in parallel). As shown, with the nonlinear load at
downstream, the high-frequency harmonic currents continu-
ously excite the LC resonance, and therefore, slight oscillations
are added to the DVR output voltage, even during steady state.
This steady-state resonance can also be compensated by the
two-step Posicast controller, as shown in Fig. 19(b). Fig. 20
shows the frequency spectrum analysis of the waveforms in
Fig. 19. It can be seen that the high-frequency harmonics (11th,
LI: CONTROL AND RESONANCE DAMPING OF VSCs AND CSCs WITH LC FILTERS
Fig. 18. Start-up transient of DVR voltages. (a) Without Posicast control.
(b) With Posicast control (with linear load).
Fig. 19. Start-up transient of DVR voltages. (a) Without Posicast control.
(b) With Posicast control (with nonlinear load).
Fig. 20. Frequency spectra of DVR voltage. (a) Without Posicast control.
(b) With Posicast control (with nonlinear load).
13th, and 17th) around the DVR LC resonant frequency are
effectively reduced by using the Posicast control, resulting in a
decreased total harmonic distortion.
1519
TABLE II
PARAMETERS OF THE CSC SYSTEM
Fig. 21. DC current under grid voltage drop. (a) Without damping. (b) With
virtual resistor Rh = 1.5 p.u. (c) With virtual resistor Rh = 4 p.u.
Experimental results obtained from a CSC system are also
obtained. A 10-kVA CSR prototype setup, as shown in Fig. 12,
is employed with the parameters shown in Table II. For the
experimental system, the source voltage is emulated by a pro-
grammable source at 208 V. The IGCT-based CSR system is
operated with a low switching frequency of 540 Hz. The com-
bination of the control-signal-shaping method (with three-step
compensator) and the virtual harmonic damper is implemented
in the CSR system (as shown in Fig. 14) to dampen the LC
resonance from different sources. Triple sampling is used for
the virtual harmonic resistor realization to ensure a stable and
effective control loop (with an effective-sampling-frequency-
to-resonant-frequency ratio of about 14 : 1). The experimental
results are shown in Figs. 21–23.
Fig. 21 shows the results from a grid voltage disturbance (a
voltage drop from 1.0 to 0.8 p.u.). The dc-link currents with
virtual resistors Rh = 1.5 p.u. and Rh = 4 p.u. are shown in
Fig. 21(b) and (c), respectively. Compared to the dc current
without damping [Fig. 21(a)], it is obvious that the HPF in the
virtual harmonic resistor gives rise to the degraded transient of
the dc current. However, this dc-current transient overshoot can
be effectively reduced with a larger virtual resistor.
Fig. 22 shows the CSR system performance under a dc-
current reference change. As can be seen in Fig. 22(a), with
a dc-current reference change from 15 to 5 A, an obvious
LC resonance is present in the line current if no damping
1520
Fig. 22. Line current under dc-current reference change. (a) Without damping.
(b) With virtual resistor. (c) With both damping methods.
Fig. 23. Line current under dc-current reference change. (a) Accurate three-
step damping. (b) Inaccurate three-step damping. (c) Combination damping
method (with inaccurate three-step damping).
is implemented. As shown in Fig. 22(b), the virtual resistor
cannot completely suppress this resonance due to the large
virtual resistor value (4 p.u.). Finally, with a combination of the
three-step compensator and the virtual resistor, the line-current
transient is well dampened, as shown in Fig. 22(c).
The sensitivity of the combination damping approach under
system parameter variations is shown in Fig. 23. Fig. 23(a)
shows the performance of the three-step compensator de-
signed based on the accurate filter parameters. As expected,
the transient response under the dc reference change is very
smooth. To emulate the line-impedance variation, the three-
step compensator is intentionally designed with the wrong filter
inductance of 0.12 p.u. (meaning a 0.1-p.u. line-impedance
variation, which is far beyond the normal range). As can be seen
from Fig. 23(b), the line-current transient has slight oscillations
due to the inaccurate three-step compensation. Finally, with the
combination damping method, the residual oscillations caused
by the inaccurate three-step compensation can be effectively
dampened, as shown in Fig. 23(c).
IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 56, NO. 5, MAY 2009
VI. C ONCLUSION
In this paper, the control and damping of both VSC and CSC
systems with LC filters have been investigated. It is shown that
the LC resonance will appear in both VSC and CSC systems,
even with a multiloop control scheme. This LC resonance can
be effectively dampened by employing control-signal-shaping
techniques. For converter systems with a variable LC reso-
nance, the virtual harmonic resistive damper can be imple-
mented. It was also shown that the combination of the virtual
harmonic damper and control signal shaping can be used to
address the transient issue associated with the virtual harmonic
damper and the parameter sensitivity of control-signal-shaping
methods. This combination approach is particularly suitable for
a grid-interfacing converter system considering the grid voltage
disturbances and limited variation range of grid impedance. Ex-
perimental investigations have been conducted on both a high-
switching VSI system and a low-switching CSR system. It has
been shown that with proper damping techniques implemented,
both transient performance and steady-state waveforms can be
improved.
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Yun Wei Li (S’04–M’06) received the B.Sc. in
Engineering degree from Tianjin University, Tianjin,
China, in 2002, and the Ph.D. degree from Nanyang
Technological University, Singapore, in 2006.
In 2005, he was a Visiting Scholar with the
Institute of Energy Technology, Aalborg Univer-
sity, Aalborg East, Denmark. From 2006 to 2007,
he was a Postdoctoral Research Fellow with the
Department of Electrical and Computer Engineering,
Ryerson University, Toronto, ON, Canada. Since
leaving Rockwell Automation Canada in 2007, he
has been an Assistant Professor with the Department of Electrical and
Computer Engineering, University of Alberta, Edmonton, AB, Canada. His
research interests include distributed generation, microgrid, power quality,
power converters, and electric motor drives.