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S : SOP-8 2 3
2 3
F : MSOP-8
QW : WDFN-8L 3x3 (W-Type) VOUT GND FLG VOUT GND NC
Lead Plating System SOT-23-5 SOT-23-5 (G-Type)
G : Green (Halogen Free and Pb Free) VOUT VIN
Output Current/EN Function
A : 2A/Active High 5 4 GND 8 VOUT
VIN 2 7 VOUT
B : 2A/Active Low 2 3 VIN 3 6 VOUT
C : 1.5A/Active High 4
EN/EN 5 FLG
D : 1.5A/Active Low FLG GND EN/EN
E : 1.1A/Active High SOP-8/MSOP-8
SOT-23-5 (R-Type)
F : 1.1A/Active Low
G : 0.7A/Active High
H : 0.7A/Active Low GND 1 8 VOUT
Note : VIN VOUT
GND
2 7
VIN 3 6 VOUT
Richtek products are : 9
EN/EN 4 5 FLG
` RoHS compliant and compatible with the current require-
WDFN-8L 3x3
ments of IPC/JEDEC J-STD-020.
` Suitable for use in SnPb or Pb-free soldering processes.
Marking Information
For marking information, contact our sales representative
directly or through a Richtek distributor located in your
area.
DS9715-03 April 2011 www.richtek.com
1
RT9715
Typical Application Circuit
Pull-Up Resistor (10K to 100K)
USB Controller
+
COUT D+
GND 10uF 150uF D-
RT9715B/D/F/H GND
Chip Enable
Ferrite
Beads Data
Note : A low-ESR 150uF aluminum electrolytic or tantalum between VOUT and GND is strongly recommended to meet
the 330mV maximum droop requirement in the hub VBUS. (see Application Information Section for further details)
Gate
Charge
Oscillator Control
Pump
Output Voltage
Detection VOUT
Thermal
Protection Auto Discharge
FLG
Delay
GND
Electrical Characteristics
(VIN = 5V, CIN = 1uF, COUT = 10uF, TA = 25°C, unless otherwise specified)
Parameter Symbol Test Conditions Min Typ Max Unit
Input Quiescent Current IQ Switch On, V OUT = Open -- 50 70
uA
Input Shutdown Current ISHDN Switch Off, V OUT = Open -- 0.1 1
RT9715A/B VIN = 5V, IOUT = 1.5A -- 90 110
Switch On RT9715C/D VIN = 5V, IOUT =1.3A -- 90 110
R DS(ON) mΩ
Resistance RT9715E/F VIN = 5V, IOUT = 1A -- 90 110
RT9715G/H VIN = 5V, IOUT = 0.6A -- 90 110
RT9715A/B 2 2.5 3.2
Current RT9715C/D 1.5 2 2.8
ILIM VOUT = 4V A
Limit RT9715E/F 1.1 1.5 2.1
RT9715G/H 0.7 1 1.4
RT9715A/B -- 1.7 --
Short RT9715C/D VOUT = 0V, Measured Prior to -- 1.4 --
ISC_FB A
Current RT9715E/F Thermal Shutdown -- 1 --
RT9715G/H -- 0.7 --
To be continued
DS9715-03 April 2011 www.richtek.com
3
RT9715
Parameter Symbol Test Conditions Min Typ Max Unit
Note 1. Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device.
These are stress ratings only, and functional operation of the device at these or any other conditions beyond those
indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
Note 2. θJA is measured in the natural convection at TA = 25°C on a low effective single layer thermal conductivity test board of
JEDEC 51-3 thermal measurement standard.
Note 3. Devices are ESD sensitive. Handling precaution is recommended.
Note 4. The device is not guaranteed to function outside its operating conditions.
On Resistance (mΩ)
110
102
105
SOP-8
100 100
98 95
SOT-23-5
96 90
SOT-23-5
85
94
80
92 75
90 70
2.7 3.1 3.5 3.9 4.3 4.7 5.1 5.5 -40 -25 -10 5 20 35 50 65 80
Input Voltage (V) Temperature (°C)
54 57
52 56
50 55
48 54
46 53
44 52
42 51
40 50
2.7 3.1 3.5 3.9 4.3 4.7 5.1 5.5 -40 -25 -10 5 20 35 50 65 80 95 110
Input Voltage (V) Temperature (°C)
0.7 0.7
0.6 0.6
0.5 0.5
0.4 0.4
0.3 0.3
0.2 0.2
0.1 0.1
0.0 0.0
2.7 3.1 3.5 3.9 4.3 4.7 5.1 5.5 -40 -25 -10 5 20 35 50 65 80 95 110
Input Voltage (V) Temperature (°C)
4.0 1.8
VIN = 3.3V Rising
3.5
3.0 1.6
2.5 Falling
2.0 1.4
1.5
1.0 1.2
0.5
0.0 1.0
0 0.25 0.5 0.75 1 1.25 1.5 1.75 2 2.25 2.5 -40 -25 -10 5 20 35 50 65 80 95 110
Output Current (A) Temperature (°C)
2.2 2.30
Current Limit (A)
2.1 2.25
2.0 2.20
1.9 2.15
1.8 2.10
1.7 2.05
1.6 2.00
2.7 3.1 3.5 3.9 4.3 4.7 5.1 5.5 -40 -25 -10 5 20 35 50 65 80 95 110
Input Voltage (V) Temperature (°C)
1.6 1.60
1.5 1.50
1.4 1.40
1.3 1.30
1.2 1.20
1.1 1.10
1.0 1.00
2.7 3.1 3.5 3.9 4.3 4.7 5.1 5.5 -40 -25 -10 5 20 35 50 65 80 95 110
Input Voltage (V) Temperature (°C)
FLG Delay Time vs. Input Voltage FLG Delay Time vs. Temperature
12 12.0
VIN = 5V
11 11.5
10 11.0
9 10.5
8 10.0
7 9.5
6 9.0
5 8.5
4 8.0
2.7 3.1 3.5 3.9 4.3 4.7 5.1 5.5 -40 -25 -10 5 20 35 50 65 80 95 110
Input Voltage (V) Temperature (°C)
VIN VIN
(2V/Div) (2V/Div)
VOUT VOUT
(2V/Div) (2V/Div)
VOUT I IN
(2V/Div) (1A/Div)
EN EN
(5V/Div) (5V/Div)
I IN FLG
(1A/Div) (5V/Div)
VIN = 5V, RLOAD = 0.5Ω
A 1uF low-ESR ceramic capacitor from VIN to GND, located RCABLE = Resistance of upstream cable wires
at the device is strongly recommended to prevent the input (one 5V and one GND)
voltage drooping during hot-plug events. However, higher
RSWITCH = Resistance of power switch
capacitor values will further reduce the voltage droop on
the input. Furthermore, without the bypass capacitor, an (90mΩ typical for RT9715)
output short may cause sufficient ringing on the input (from VPCB = PCB voltage drop
source lead inductance) to destroy the internal control
The USB specification defines the maximum resistance
circuitry. The input transient must not exceed 6V of the
per contact (RCONN) of the USB connector to be 30mΩ and
absolute maximum supply voltage even for a short duration.
the drop across the PCB and switch to be 100mV. This
Output Filter Capacitor basically leaves two variables in the equation: the
resistance of the switch and the resistance of the cable.
A low-ESR 150uF aluminum electrolytic or tantalum
between VOUT and GND is strongly recommended to meet If the hub consumes the maximum current (II) of 500mA,
the 330mV maximum droop requirement in the hub VBUS the maximum resistance of the cable is 90mΩ.
(Per USB 2.0, output ports must have a minimum 120uF The resistance of the switch is defined as follows :
of low-ESR bulk capacitance per hub). Standard bypass
RSWITCH = { 4.75V − 4.4V − [ 0.5A x ( 4 x 30mΩ + 2 x
methods should be used to minimize inductance and
resistance between the bypass capacitor and the 90mΩ) ] − VPCB } ÷ ( 0.1A x NPORTS )
downstream connector to reduce EMI and decouple voltage = (200mV − VPCB ) ÷ ( 0.1A x NPORTS )
droop caused when downstream cables are hot-insertion
If the voltage drop across the PCB is limited to 100mV,
transients. Ferrite beads in series with VBUS, the ground
the maximum resistance for the switch is 250mΩ for four
line and the 0.1uF bypass capacitors at the power connector
ports ganged together. The RT9715, with its maximum
pins are recommended for EMI and ESD protection. The
100mΩ on-resistance over temperature, can fit the demand
bypass capacitor itself should have a low dissipation factor
of this requirement.
to allow decoupling at higher frequencies.
Thermal Considerations
Voltage Drop
For continuous operation, do not exceed absolute
The USB specification states a minimum port-output voltage maximum operation junction temperature. The maximum
in two locations on the bus, 4.75V out of a Self-Powered power dissipation depends on the thermal resistance of IC
Hub port and 4.40V out of a Bus-Powered Hub port. As package, PCB layout, the rate of surroundings airflow and
with the Self-Powered Hub, all resistive voltage drops for temperature difference between junction to ambient. The
For recommended operating conditions specification of ` Place a ground plane under all circuitry to lower both
RT9715, where T J(MAX) is the maximum junction resistance and inductance and improve DC and transient
temperature of the die (100°C) and TA is the maximum performance (Use a separate ground and power plans if
ambient temperature. The junction to ambient thermal possible).
resistance θ JA is layout dependent. For SOT-23-5 ` Keep all VBUS traces as short as possible and use at
packages, the thermal resistance θJA is 250°C/W on the least 50-mil, 2 ounce copper for all VBUS traces.
standard JEDEC 51-3 single-layer thermal test board. And
` Avoid vias as much as possible. If vias are necessary,
for SOP-8 and MSOP-8 packages, the thermal resistance
make them as large as feasible.
θJA is 160°C/W. The maximum power dissipation at TA =
25°C can be calculated by following formula : ` Place cuts in the ground plane between ports to help
reduce the coupling of transients between ports.
P D(MAX) = (100°C - 25°C) / (250°C/W) = 0.3W for
SOT-23-5 packages ` Locate the output capacitor and ferrite beads as close to
the USB connectors as possible to lower impedance
PD(MAX) = (100°C - 25°C) / (160°C/W) = 0.469W for
(mainly inductance) between the port and the capacitor
SOP-8/MSOP-8 packages
and improve transient load performance.
PD(MAX) = (100°C - 25°C) / (108°C/W) = 0.694W for
` Locate the RT9715 as close as possible to the output
WDFN-8L 3x3 packages
port to limit switching noise.
The maximum power dissipation depends on operating
The input capacitor should
ambient temperature for fixed TJ(MAX) and thermal resistance be placed as close as
θJA. For RT9715 packages, the Figure 2 of derating curves possible to the IC.
V BUS V OUT V IN
allows the designer to see the effect of rising ambient
temperature on the maximum power allowed.
0.8
Single Layer PCB
WDFN-8L 3x3
Maximum Power Dissipation (W)
0.7 GND
0.6
0.5 SOP-8/MSOP-8
GND_BUS FLG EN
0.4
SOT-23-5 V IN
0.3
0.2 Figure 3
0.1
0
0 10 20 30 40 50 60 70 80 90 100
Ambient Temperature (°C)
H
D
L
C B
A
A1
e
H
A
J B
C
I
D
D
L
E E1
A A2
A1
b
D2
D
E E2
SEE DETAIL A
1
e
b 2 1 2 1
A
A3
A1 DETAIL A
Pin #1 ID and Tie Bar Mark Options
Information that is provided by Richtek Technology Corporation is believed to be accurate and reliable. Richtek reserves the right to make any change in circuit design,
specification or other related things if necessary without notice at any time. No third party intellectual property infringement of the applications should be guaranteed
by users when integrating Richtek products into any application. No legal responsibility for any said applications is assumed by Richtek.