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Fabrication of PN-Junction Diode

Silicon wafers are used worldwide for the production of

microchips, semiconductors and transistors.Because Silicon
has desirable properties and that to Si wafer should be single
crystalline. And the Silicon wafer brittle in nature and dark
grey colour in appearance.

Processing steps for p-n junction diode:

1.Silicon Wafer:
There are two types of varieties available in silicon wafer
such as doped and undoped. An undoped type is pure form of
Silicon. Where the doped is non-pure.
Take the substrate from the Silicon wafer (Single
crystalline, by CZ method we can get the Single crystalline).
And the substrate is doped with p-type because p-substrate
has less impurities.

Fig_1: Substrate
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2.Oxidation: (Layering)
To grow an Oxide layer on Silicon we can use the
oxidation. We know that Silicon is very easy to oxidise you
just have to raise the temperature.
Oxidation processes are two types:

1.Dry oxidation: – Si reacts with O2 to form SiO2.

Si (s) + O2 (g) → SiO2 (s) @900-1100 0C

2. Wet oxidation: – Si reacts with water (steam) to form

SiO2.
Si (s) + 2H2O (g) → SiO2 (s) + 2H2(g) @900-1100 0C
Here SiO2 act as insulating and dielectric material. And SiO2
also has good masking properties (In order to dope the
P-Substrate selectively). Silicon will mask against the dopants
to penetrate through this layer.

Fig_2 : Substrate with grown oxide layer

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3.Photolithography: (Layering+Pattering)
Photolithography is a process of micro-fabrication to
selectively remove the parts of a thin film or the bulk of the
substrate.
In order to dope the substrate selectively you have to keep
oxide layer in some regions and you have to remove oxide
layer in some other regions. For the selective removal of
oxide-layer you can deposit the PR (Photo-resist) on oxide
layer. Here the photo-resist is sensible to UV rays.

Fig_3 : Deposited Photo-resist layer

After the layering of PR on oxide layer you have to

pattern PR selectively.
When the UV rays exposed on photo-resist through
the glass window the PR becomes soft and easy to remove
from those portions.
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Fig_4 : Mask to pattern Photo-resist layer

After development, you can remove the PR layer

selectively from those portions. You can see in below figure

Fig_5 :Patterend Photo-resist layer using UV rays

And the rest of PR layer protects the oxide layer.

4.Etching:
After removal of a particular material we need to
pattern one more layer i.e., Oxide layer.
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Here the selective regions of oxide will remove

which is not covered by PR. By using Hydrofluoric acid, we
can etch the Oxide layer while not attacking the Substrate.
Remaining PR layer will remove by burning it.
(Etching agents: HNO3 , HF, CH3COOH, KOH)

Fig_6 : Patterend grown oxide layer using etching

5.Doping:
Adding specific amount of electrically active
impurities to Silicon.
Doping can be done by two methods:
1. Thermal Diffusion :Dopants are delivered to surface of the
wafer at high temperature.
2. Ion- Implantation:At room temperature dopant atoms
are ionised and these ions are accelerated and impinch on the
wafer surface and then get embedded.
Here you can see Diffusion process only.
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Thermal Diffusion:
Diffusion can be proceeded by two steps:
1.Pre-deposition:
From the phosphorous source the P-atoms will
diffuse in top the substrate. Where it is not covered by Oxide
layer.
2.Drive-in:
P-source will shut-off and the p-atoms starting from
the surface diffuse deeper into the Substrate. Drive-in carry
diffusion at higher temperature.

Fig_7: n-type dopant doping using diffusion process

From the surface to junction doping is non-uniform. We can
see maximum doping at the surface and less doping at the
junction.
The distance between surface and junction is called
“Junction Depth”.
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Fig_8: After doping process

6.Metallization: (Layering+Pattering)
Metallization is a process of forming metal layer
which is used to make interconnections between the
components. The metallization which is directly in contact
with semiconductor is called “Contact Metallization”.
In order to fabricate the PN junction diode we are
forming the metal contact (anode and cathode). In most of the
IC’s, Aluminium is the widely used metal for metallization
because

 It is a good conductor.
 It can form mechanical bonds with silicon.
 It can form low Resistance, Ohmic contacts with
heavily doped n-type and p-type silicon.
Deposit the Aluminium metal on top and bottom of the
surface.
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Fig_9: Metal layer deposition using PVD

You didn’t want metal on oxide layer so the top of the

metal on oxide layer will be removed by Etching process.

As you can know the concentration levels of

P-Substrate and metal (Al) are different. If the concentrations
are different then there will be Diffusion occurs. Here the
metal and the P-substrate forms a junction it is called
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Schottky barrier. Schottky barrier is a depletion layer formed

at the junction of a metal and the substrate. In simple words,
Schottky barrier is the potential energy barrier formed at the
metal-semiconductor junction.
In order to reduce effect of Al on semiconductor we are
using “Epitaxial Growth” method. Epitaxial Growth is a
process used to grow a thin crystalline layer on crystalline
surface(substrate).

Fig_11: Epitaxial layer (sample image)

Here you will form the p+ layer so it does not allow the
electrons from the metal.
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Scrub (Cut) the material into two identical parts.

Then you will get two diodes.

Fig_13: PN junction diode is fabricated.

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Fig_14: PN - junction fabrication seminar.

Presented by:
K. Durga,
S160861,
ECE dept,
IIIT Srikakulam.
S160861@rguktsklm.ac.in