Unit: FABRICAION OF MOSFET

Integrated Circuits (IC) Technology:

An integrated circuit is a miniaturized low-cost electronic circuit consisting of

active and passive components fabricated together on a substrate.
Why we need this integrated circuit?

 miniaturization,
 Batch Processing Results in cost reduction
 Improved system reliability due to avoid of soldering
 Better functional density
 Matched devices
 Increased operation speed
 Significant reduction in the power consumption

Basically integrated circuits can be divided into two classes:

 Linear integrated circuits: IP/OP characteristics are linear Eg. OP-

Amp

 Digital integrated circuits: The circuit is either in ON state or

OFF state and not in between the 2; that means that either it can be 1 or
it can be 0.

 Hybrid or Multi chip Integrated Circuit:

Monolithic integrated circuits

“Mono” meaning a single one and “lithic” comes from the Lithos meaning
stone. Monolithic comes from the Greek words one is mono and second is
lithos; that means, single and stone; that means, that if you carve a single stone
to a sculpture, it is monolithic.

The monolithic ICs refer to a single stone or a single crystal: ingle crystal in
this monolithic integrated circuit is nothing but a silicon chip as a
semiconductor material and on top of this semiconductor material, we are
using all the passive and active components which are interconnected.

Monolithic ICs are treated as best mode of manufacturing:

 It can be made identical

 Higher reliability
 Low cost
 Manufactured in bulk
Limitations:

 Low power rating

 Isolation on IC is poor
 Inductor can’t be fabricated
 Passive components within IC will have lower values and external
connection is required from the IC PIN to acquire higher values

Thin and thick film integrated circuits:

Thin film technology refers fabrication by depositing thin films of conducting

or semiconducting materials on the surface of glass or ceramic base.

 Larger than monolithic ICs but smaller than discrete circuits.

 It can be used in higher power applications.
 It cannot be integrated with diodes and transistors
 But resistors and capacitors can be integrated.

Processes Flow:

 Oxidation
 Thermal oxidation (physical vapour deposition)
 Plasma Enhanced chemical vapour deposition.
 Deposition
 PVD
 Thermal
 E beam evaporation
 Sputtering
 CVD
 LPCVD
 PECVD
 Photolithography
 Diffusion/Ion Implantation
 Ion Implantation
 Diffusion
Credit Rajesh Kumar Sharma
CMOS Processes Flow:

1.

2. Oxidation

Grow SiO2 on top of Si wafer

– 900℃ - 1200℃ with H2O or O2 in an oxidation furnace

3. Photoresist

Spin on photoresist

– Photoresist is a light-sensitive organic polymer

– Softens where exposed to light

4. Lithography

Expose photoresist through n-well mask Strip off exposed photoresist

5. Etch
Etch oxide with hydrofluoric acid (HF)
Seeps through skin and eats bone; nasty stuff!!!
Only attacks oxide where resist has been exposed

6. Strip Photoresist Strip off remaining photoresist

– Old days we used a mixture of nitric and sulphuric acids called

piranah etch

– Now we use a plasma etch which is much safer (and greener).

Necessary so resist doesn’t melt in the next step
7. n-Well
n-Well formed with diffusion or ion implant Diffusion

– Place wafer in furnace with Arsine (AsH3) gas

– Heat until As atoms diffuse into exposed Si

8. Ion Implantation

–Blast wafer with beam of As ions

– Ions blocked by SiO2, only enter exposed Si

9. Strip Oxide
- Strip off the remaining oxide using HF Back to bare wafer with n-
well Subsequent steps involve similar series of steps
10. Polysilicon
-Grow/deposit very thin layer of gate oxide
– < 20 Å (6-7 atomic layers) Chemical Vapor Deposition (CVD) of Si
layer
– Place wafer in furnace with Silane gas (SiH4)
– Forms many small crystals called polysilicon
– Heavily doped to be good conductor

11. Polysilicon Cont…

- Patterning
Use same lithography process to pattern polysilicon
12. Self-Aligned Process
- Use oxide and masking to expose where n+ dopants should be
diffused or implanted
- N-diffusion forms nMOS source, drain, and n-well contact

13. N-diffusion
- Pattern oxide and form n+ regions
- Self-aligned process - gate blocks diffusion
- Polysilicon is better than metal for self-aligned gates because it
doesn’t melt during later processing
 14. Strip off oxide to complete patterning step

15. P-Diffusion
- Similar set of steps form p+ diffusion regions for pMOS source
and drain and substrate contact

Contacts….
- Now we need to wire together the devices Cover chip with thick field
oxide
- Etch oxide where contact cuts are needed
16. Metallization
- Sputter on Aluminium over whole wafer
- Pattern to remove excess metal, leaving wires