B.E. (Electronics Engineering / Elect. Telecommunication / Elect.

Communication Engineering)
Fourth Semester (C.B.S.)
Digital Circuits & Fundamental of Microprocessor
P. Pages : 2 NIR/KW/18/3356/3361
Time : Three Hours *1301* Max. Marks : 80
_____________________________________________________________________
Notes : 1. All questions carry marks as indicated.
2. Solve Question 1 OR Questions No. 2.
3. Solve Question 3 OR Questions No. 4.
4. Solve Question 5 OR Questions No. 6.
5. Solve Question 7 OR Questions No. 8.
6. Solve Question 9 OR Questions No. 10.
7. Solve Question 11 OR Questions No. 12.
8. Due credit will be given to neatness and adequate dimensions.
9. Assume suitable data whenever necessary.
10. Illustrate your answers whenever necessary with the help of neat sketches.
11. Use of non programmable calculator is permitted.

1. a) Simplify the following functions using K-map. 8

i) f (A, B,C, D) = m(0,1,3,5,11,15) + d (10,13)
ii) f (W, X, Y, Z) = M(1, 2,3,8,9,14) + d (7,15)

b) Find the reduced SOP form of the following equation using K-map : 6
f (A, B,C, D) = m(1,3,7,11,15) + d (0, 2,5)
Implement by using NAND Gates.
OR
2. a) Design BCD to Excess – 3 code converter circuit and explain it. 8

b) Explain and prove De-Morgan’s Theorem. 6

3. a) Implement the given function using 3 : 8 decoder circuit. 8

f1 (A, B, C) = m (0,1, 2,3)
f 2 (A, B, C) = m (4,5, 6, 7)

b) What is an ALU? Explain in detail with its logic functions. 5

OR
4. a) Explain static as well as dynamic hazards for combinational circuits. 6

b) Design 1 : 32 demultiplexer by using 1 : 8 demultiplexers. 7

5. a) Draw a logic diagram of JK flip-flop by using NAND Gates. Explain race around 6
condition.

b) Convert the following. 8

i) JK flip-flop to D flip-flop.
ii) T flip-flop to JK flip-flop.
OR
NIR/KW/18/3356/3361 1 P.T.O
6. a) Explain how latch can be used as one-bit memory cell. 4

b) Describe the difference between edge triggered and level triggered flip-flop. 4

c) Draw the logic diagram of T flip-flop and explain it. 6

7. a) Design Mod – 5 synchronous counter using J-K flip-flop. 7

b) Write a short note on Twisted Ring Counter. 6

OR

8. a) Draw and explain bidirectional shift register. 6

b) Design and draw a 3 bit synchronous counter which goes through the following states. 7
1→ 3 → 5 → 7 →1

9. a) Give the classification of logic families. Explain each family in brief. 5

b) Define following terms for logic family devices. 8

i) Fan in ii) Figure of merit
iii) Power dissipation iv) Speed of operation

OR

10. a) Write a short note on programmable logic devices. 5

b) Explain the following in detail any two. 8

i) Synchronous SRAM.

ii) Content Addressable Memory.

iii) EEPROM.

iv) DRAM.

11. a) Draw and explain the architecture of microprocessor 8085. 8

b) Explain the addressing modes of 8085 in detail. 5

OR

12. a) Write an ALP to find the no. of one’s in a given 8 – bit data. 5

b) Draw and explain the interrupt structure of microprocessor 8085. 8

************

NIR/KW/18/3356/3361 2
 B.E. (Electronics Engineering / Electronics Telecommunication /
Electronics Communication Engineering) Fourth Semester (C.B.S.)
Digital Circuits & Fundamental of Microprocessor Paper – IV

P. Pages : 2 TKN/KS/16/7359/7364
Time : Three Hours *0475* Max. Marks : 80
_____________________________________________________________________
Notes : 1. All questions carry marks as indicated.

rg
2. Solve Question 1 OR Questions No.2.
3. Solve Question 3 OR Questions No.4.
4. Solve Question 5 OR Questions No.6.
5. Solve Question 7 OR Questions No.8.

.O
6. Solve Question 9 OR Questions No.10.
7. Solve Question 11 OR Questions No.12.
8. Assume suitable data whenever necessary.

ts
9. Illustrate your answers whenever necessary with the help of neat sketches.

1. a) Simplify the following function using K-map. 8

i)

n
F A, B, C, D  m 0,2,5,9,15 
d 6,7,8,10,12,13
de
ii ) F W, X, Y, Z  m1,4,5,6,11,12,13,14,15

b) Express the function in standard SOP form 3

F  A  A.B  B.C
tu

c) Express the function in standard POS form. 3

F   A  B A  C B  C 
S

OR
ur

2. a) Design a BCD to seven segment decoder for common cathod configuration. 8

b) How will you implement full subtractor using two half subtractors and one or gate? 6
Explain?
gp

3. a) Draw and explain ALU- 6

b) Design a ckt which detects even parity of a 4 bit binary no. 7

Na

OR

4. a) Implement the following function using 4:1 multiplexer. 7

F(A, B, C, D) =  m(0, 1, 2, 4, 6, 9, 12, 14)

b) Design the 3 bit priority encoder and implement it. 6

5. a) What is master slave flip-flop? Give logic diagram of JK master- slave flip-flop using 9
NAND gates. Explain its working.

TKN/KS/16/7359/7364 1 P.T.O
 b) Explain the use of preset and clear terminals in Flip-Flops. 4

OR

6. a) Convert the following Flip-Flop: 8

i) S-R to J-K flip-flop.
ii) S-R to T flip-flop.

b) Explain the difference between truth table and excitation table of flip-flop. 3

rg
c) Draw the logic diagram of D flip-flop using NAND gate. 2

7. a) Explain the difference between synchronous and asynchronous counter. 5

.O
b) Design a 3-bit up-down synchronous counter with a direction control M using T flip-flop. 8

OR

ts
8. a) Draw and explain bidirectional shift register. 7

b) Design a synchronous counter for 6

46 7 3 1 4

n
Avoid lockout condition. Use J-K flip-flop for design.
de
9. a) Explain the following. 6
i) RAM ii) ROM
iii) EPROM iv) EEPROM.
tu

b) Explain the characteristics of Digital IC's. 7

OR
S

10. a) Explain the operation of TTL as a NAND gate. 7

ur

b) Write a note on Programmable Logic Array (PLA). 6

11. a) Draw the architecture of 8085 microprocessor and explain. 9

gp

b) Explain the classification of instruction set of 8085 microprocessor with example. 5

OR

12. a) What do you mean by addressing modes of 8085. Explain with examples. 7
Na

b) Write a program to arrange 10 bytes of data in ascending order. 7

**********

TKN/KS/16/7359/7364 2
B.E. (Electronics Engineering / Elect. Telecommunication / Elect. Communication Engineering)
Fourth Semester (C.B.S.)
Digital Circuits & Fundamental of Microprocessor
P. Pages : 2 NRJ/KW/17/4411/4416
Time : Three Hours *0192* Max. Marks : 80
_____________________________________________________________________
Notes : 1. All questions carry marks as indicated.

rg
2. Solve Question 1 OR Questions No. 2.
3. Solve Question 3 OR Questions No. 4.
4. Solve Question 5 OR Questions No. 6.
5. Solve Question 7 OR Questions No. 8.
6. Solve Question 9 OR Questions No. 10.

s.O
7. Solve Question 11 OR Questions No. 12.
8. Due credit will be given to neatness and adequate dimensions.
9. Assume suitable data whenever necessary.
10. Illustrate your answers whenever necessary with the help of neat sketches.
11. Use of non programmable calculator is permitted.

t
1. a) Simplify using K-map and realize using gates. 10
en
i) f (A, B, C, D) =  m (0, 1, 4, 5, 9, 11, 14, 15) +   (10,13).
ii) f (w, x, y, z) =  M (1, 3, 9, 10, 11, 14, 15)

b) Convert the following expression into standard pos form. 4

ud
f (A, B, C) = AB  BC  AC .

OR

2. a) Design binary to gray code converter (3 bit binary). 7

St

b) Design full adder using two half adders and OR-gate and explain it. 7

3. a) Write a short note on ALU. 6

ur

b) Design a 3 bit odd parity generator and implement with NAND gates. 7

OR
gp

4. a) Implement 16:1 multiplexer using 4: 1 multiplexers. 6

b) Implement the following function using 8: 1 multiplexer. 7

F =  m (0, 1, 2, 3, 11, 12, 14, 15).
Na

5. a) What do you mean by Race around condition in JK flip flop? How this condition can be 7
overcome?

b) Convert. 6
i) D flip flop to T flip flop. ii) T flip flop to JK flip flop.

OR

NRJ/KW/17/4411/4416 1 P.T.O
6. a) Draw the logic diagram of JK flip flop using NAND gate and explain its working. Give 7
the characteristics equation of JK flip flop?

b) Convert. 6

i) SR to JK flip flop.
ii) JK flip flop to T flip flop.

7. a) Explain the operation of Johnson's counter with waveforms. 7

rg
b) Explain the working of 4 bit left-shift register with neat sketch and explain. 6

OR

s.O
8. a) Design a synchronous lock free counter using D flip flop that passes through. 9

S0 S2 S4 S5 S6

t
9.
b)

a)
en
Explain the difference between asynchronous and synchronous counters.

Explain the operation of TTL as a NAND gate.

4

7
ud
b) Explain the following. 6
i) Speed of operation ii) Fan out
iii) Figure of merit.

OR
St

10. a) Write a short note on Programmable Logic Array (PLA). 6

b) Explain the classification and characteristics of semiconductor memory. 7

ur

11. a) Explain Architecture of microprocessor 8085 in detail. 10

b) Explain addressing modes of microprocessor 8085. 4

gp

OR

12. a) Explain interrupt structure of microprocessor 8085 in detail. 10

Na

b) Explain the following. 4

i) LDA 16 bit Addr. ii) DAA.

************

NRJ/KW/17/4411/4416 2
 B.E.Fourth Semester (Electronics / Electronics Telecommunication /
Electronics Communication Engineering) (C.B.S.)
Digital Circuits & Fundamentals of Microprocessors

P. Pages : 2 NKT/KS/17/7271/7276
Time : Three Hours *0307* Max. Marks : 80
_______________________________________ ______________________________
Notes : 1. All questions carry marks as indicated.
2. Solve Question 1 OR Questions No. 2.

g
3. Solve Question 3 OR Questions No. 4.
4. Solve Question 5 OR Questions No. 6.

.Or
5. Solve Question 7 OR Questions No. 8.
6. Solve Question 9 OR Questions No. 10.
7. Solve Question 11 OR Questions No. 12.
8. Due credit will be given to neatness and adequate dimensions.
9. Assume suitable data whenever necessary.
10. Illustrate your answers whenever necessary with the help of neat sketches.

ts
11. Use of non programmable calculator is permitted.

1. a)
en
Minimize the function and implement using NAND logic
f (A, B, C, D)  ABCD  A B C D  A B C D  A B C D  A B C D
6

b) Use K-MAP to solve the following. Also implement the result using universal gate logic 8
only.
d
i) f(A, B, C, D) =  m (0, 1, 4, 6, 7, 11, 12, 13, 15) + d(3, 10)
ii) F(P, Q, R, S) =  M(1, 4, 8, 10, 12, 13, 15)  D(2, 11)
tu

OR

2. a) Design a code converter which will convert 3 bit binary number applied at the input into 7
rS

equivalent gray code.

b) Design and implement full adder from two half adders and one OR gate. Draw the logic 7
circuit and give its truth table.
pu

3. a) Design a BCD to seven segment decoder for common cathode configuration. 8

b) Design 1:32 demultiplexer using 1:8 demultiplexers & 1:4 DEMUX. 5

Na

OR

4. a) Implement the following function using 8:1 multiplexer 6

F(A, B, C, D) =  (0, 2, 4, 5, 7, 9, 12, 15)

b) Design a decimal to BCD encoder and explain. 7

5. a) What is master slave J-K flip flop ? Explain with neat diagram. Also show it NAND logic 9
implementation.

NKT/KS/17/72717276 1 P.T.O
 b) Explain the use of preset and clear terminals in Flip-Flop. 4

OR

6. a) Convert the following Flip-Flop. 8

i) S-R to J-K flip-flop.
ii) J-K to T flip-flop.

b) Explain how latch can be used as a 1-bit memory cell. 5

7. a) Design and draw a 3-bit synchronous counter which passes through the following states. 7

g
1 3  4  6 1

.Or
b) Draw and explain 4-bit Ripple counter with waveforms. 6
OR
8. a) Draw the logic diagram of 4 bit bidirectional shift register and explain its working. 8

ts
b) Explain twisted Ring counter with neat block diagram.

9. a) Define the following terms with respect to logic families. 8

i) Speed of operation ii) Noise margin
iii) Power dissipation
en iv) Fan in

b) Compare TTL and CMOS logic families with at least five points. 5
d
OR

10. Write short notes on any three. 13

tu

i) PAL device.

ii) SRAM memory.

rS

iii) Types of Integrations.

iv) EPROM memory.

pu

11. a) Draw and explain the architecture of 8085 microprocessor. 9

b) Explain the flag register of 8085 microprocessor. 5

Na

OR

12. a) Explain various addressing modes of 8085 microprocessor. Also give one example for 7
each one.

b) Explain the following instructions of 8085 microprocessor. 7

i) MOVA, M ii) DAA
iii) CALL 1000H iv) XCHG

************

NKT/KS/17/7271/7276 2