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FINALTERM EXAMINATION
FALL 2006 Marks: 75
CS501 - ADVANCE COMPUTER ARCHITECTURE Time: 120min
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The _____________ RTN describes the overall effect of instructions on the programmer visible
registers.
► Abstract
► Concrete
► Absolute
► Basic
The instruction set is of _____________ importance in governing the structure and function of the
pipeline.
► Least
► Primary
► Secondary
► No
____________ is the most general and least useful performance metrics for RISC machines.
► MIPS
► Instruction Count
► Number of registers
► Clock Speed
► ALU
► Bus
► Register
► Memory Cell
We can classify or partition the SRC instructions by their overall ______________ behavior.
► Register transfer
► Memory transfer
► Execution
► Logical
The ____________ RTN describes detailed register transfer steps in the data path that produce the
overall effect.
► Abstract
► Concrete
► Absolute
► Basic
► 32-bit
► 16-bit
► 64-bit
► 8-bit
_________________ operations refers to a processor that can issue more than one instruction
simultaneously.
► Macro
► Micro
► Scalar
► Superscalar
Exception which are _______________ occur in response to events that are paced by the internal
processor clock.
► Asynchronous
► Synchronous
► Internal
► External
In the hazard detection by hardware, resolved by pipeline stalls, if the instructions are in the
adjoining stages, then the hazard must be detected in stage __________.
► 4
► 2
► 3
► 1
a) What are the approaches used to design a Control unit? Briefly compare them. [5]
b) Evaluate the instruction z = 16(a -b) + 32(c+58) with the 3 address machine.[5]
c) What is the difference between “branch” and “branch link” instructions of SRC? [5]
Question No: 12 ( Marks: 10 )
A hard disk with 5 platters has 1024 tracks per platter, 512 sectors per track and 512 bytes/sector.
a) What is the total capacity of the disk? [8]
b) How many platters are required for a 80GB disk if there are 1024 bytes/sector, 2048 sectors per
track and 4096 tracks per platter. [2]
Consider a memory system having the following specifications. Find its total cost and cost per byte
of memory. [10]
Give comparison of advantages and disadvantages of serial and parallel transfer of data between
the CPU and an I/O device. [10]
What are different I/O techniques? Briefly describe the comparison of Interrupt driven I/O and
Polling. [3+7]
Assume a network with a bandwidth of 2500Mbits/sec. It has a sending overhead of 200μsec and a
receiving overhead of 160μsec. Assume two machines connected together. It is required to send a
15,000 byte message from one machine to the other (including header), and the message format
allows 15, 00 bytes in a single message. Calculate the total latency to send the message from one
machine to another assuming they are 25m apart (as in a SAN). Next, perform the same calculation
but assume the machines are 750m apart (as in a LAN).Finally, assume they are 1500Km apart (as
in a WAN). Assume that signals propagate at 1/3 of the speed of light in a conductor, and that the
speed of light is 300,000Km/sec.