Applications of Diodes

• Load Line Analysis

• Series Diode Configurations
• Parallel & Series Configurations
• Half-wave Rectifier
• Full-wave Rectifier
• Clippers
• Clampers
• Zener Diode Configurations
 Analysis of Diode Circuit

Series diode configuration shown here
is used to describe the analysis of a
diode circuit using its actual
characteristics.

Diode characteristics placed along with a
Load line is called Load-Line Analysis.

Load line is determined solely from
the network, which is superimposed on
the characteristic curve of the chosen
diode.

Intersection of the load line on the
characteristics curve is determined by
applying Kirchhoff’s voltage law in the
clockwise direction, which results in
+ E - VD - VR = 0 where VR =ID .R

or E = VD + ID .R
 Analysis of Diode Circuit
Procedure to draw load line is determined by the equation E = VD + ID .R
Step-1: Calculate ID by taking VD=0 V (to get a point on Y-axis)
E = VD + ID .R
E = 0 V + ID R ID = E / R for VD=0 V
Step-2: Calculate VD by taking ID= 0 A (to get a point on X-axis)
E = VD + ID .R
E = VD + (0).R VD = E for ID=0 A


Joining the points on X & Y Axis,
obtained above, gives the load line
that intersects the diode curve at
point “Q” called the Operating point.


If the load R is changed, slope of
the load line changes which causes
the point of intersection on the device
characteristics to change.
 Analysis of Diode Circuit

Point of intersection of the load line and the characteristic curve is the point of
operation for the circuit and is called Quiescent Point (“ Q – point”).

By drawing a perpendicular on horizontal and vertical axis from Q-point, diode
operating voltage VDQ, and operating current IDQ are obtained.

Solution obtained through Load Line Analysis (by intersect diode curve with
load line) is the same as obtained from following equations

E = VD + ID .R ID = E / R - VD / R (1)

ID = Is(eVD / nVT – 1) ; Using Shockley's Equation (2)

E/R

VDQ E
Example
For the series diode configuration (shown in the
Figure), determine following using diode
characteristics:
(a) VDQ and IDQ (b) VR

E = VD + ID .R
+
ID = E / R for VD=0 V VR
= 10 V / 0.5 k = 20 mA -

VD = E for ID=0 A
= 10 V
Resulting load line is shown in the
figure with the intersection with
characteristic curve at the Q -point:
VDQ = 0.78 V IDQ = 18.5 mA
VR = E - VD
= 10 V - 0.78 V = 9.22 V
Operating voltage and operating current obtained from the load-line chart
can be used to calculate the dc resistance of the device:
VDQ = 0.78 V IDQ = 18.5 mA
dc Q-point has been
Rdc = VDQ / IDQ = 0.78 / 18.5 = 42.16 Ω determined the diode
can be replaced by its dc
resistance
equivalent. This concept
of replacing a
characteristic by an
equivalent model is
important for circuit
analysis.

+
VR
-
 Series Diode Configuration

Series Diode circuit shown below(Fig-A) is considered for analysis here:

Step-1: Determine the state of the diode by replacing it with a resistive
element (refer Fig B).

Step-2: Determine the direction of current I, if it matches the arrow (Fig-B)
in the diode symbol, and E > VK , then the diode is in the “ON” state.

Step-3: Redraw the network (Fig-C) with the appropriate equivalent
model for the forward-biased silicon diode. Polarity of VD is the same as
would result if in fact the diode were a resistive element. The resulting
voltage and current levels are the following: VD = VK
VR = E – VK Network Current ID = IR = VR / R

Fig: A Fig: B Fig: C

 Series Diode Configuration

In Fig-A below, the diode has been reversed.

Step-1: Replacing the diode with a resistive element (Fig-B).

Step-2: Determine the resulting current direction (Fig-B), which does not
match the arrow in the diode symbol. Thus the diode is in the “off” state.

Step-3: Redraw the network diagram with the equivalent circuit (Fig-C). Due
to the open circuit, the diode current is 0 A and the voltage across the
resistor R is the following: VR = IR . R = ID .R = (0 A).R = 0 V

Voltage across resistor R is VR =0V and E volts is established across the
open circuit as defined by Kirchhoff’s voltage law (this law must be satisfied).

Fig: A Fig: B Fig: C

Example: For the series diode configuration of shown below,
determine VD , VR , and ID .
Since the applied voltage establishes a current in the clockwise direction to
match the arrow of the symbol, the diode is in the “on” state,
VD = 0.7 V
VR = E - VD = 8 V - 0.7 V = 7.3 V
ID = IR = VR / R = 7.3 V / 2.2 kΩ = 3.32 mA
Example: For the example in previous slide, series diode in
reverse biased configuration, determine VD , VR , and ID .

Step-1: Determine the direction of current I, which is in opposite direction to
that of arrow in the diode symbol.

Step-2: This implies that the diode equivalent is the open circuit. The
resulting network will have open circuit as shown in the diagram belowt.

Since VR = IR . R = (0).R = 0 V.

Applying Kirchhoff’s voltage law around the closed loop yields
E - VD - VR =0
VD = E - VR =E-0 = E=8V
EXAMPLE: Determine Vo and ID for the series circuit shown below.
(Assume barrier voltage of 1.8V for the Light emitting diode)

Step-1: Determine the direction of the current, if it matches with arrow
symbol of the diode, then select an appropriate equivalent model (Forward
biased – Conduction state) subject to E =12 V > (0.7 V + 1.8 V) condition.

Step-2: Redraw the network as shown in Fig-B with supply of 12 V and the
polarity of Vo across the 680 Ω resistor. The resulting voltage is
Vo = E - VK1 - VK2 = 12 V - 2.5 V = 9.5 V
ID = IR = VR / R = Vo / R = 9.5 V / 680 Ω
= 13.97 mA

Fig-A
Fig-B
 Parallel and Series-Parallel Configuration
Determine Vo , I1 , ID1, and ID2 for the parallel diode configuration below.
Applied voltage source (10V) establishes a current through each diode in the
same direction that matches the arrow symbol of the diode and the applied
voltage is greater than 0.7 V, indicating that both diodes are in “on” state.
Thus, the voltage across parallel elements (diodes) is Vo = 0.7 V
Current I1 = VR / R = (E – VD) / R = (10 V - 0.7 V) / 0.33k = 28.18 mA
Assuming diodes of similar characteristics, we have
ID1 = ID2 = I1 / 2 = 28.18 mA / 2 = 14.09 mA
EXAMPLE: Determine currents I1, I2, and ID2 for the following network:
Applied voltage (20V) turns “on” both diodes, as indicated by the resulting
current directions in the network below.
Current through resistor R1 is I1 = VK2 / R1 = 0.7 V / 3.3 k = 0.212 mA
Apply Kirchhoff’s voltage law around the indicated loop yields:
E - VK1 - VK2 - V2 = 0
and V2 = E - VK1 – VK2 = 20 V - 0.7 V - 0.7 V = 18.6 V
with I 2 = V 2 / R2 = 18.6 V / 5.6 k = 3.32 mA
At the bottom node a , ID2 + I1 = I2
ID2 = I2 - I1 = 3.32 mA - 0.212 mA = 3.11 mA
Diode As Rectifier
 Half Wave Rectifier

Half-wave rectifier, shown below, uses a single diode network for ac-to-dc
rectification process. Diodes used for rectification have power and current
ratings much higher than the diodes employed in other applications, such as
computers and communication systems.

For the half-wave rectifier, shown below, the polarity of the applied voltage
vi is such as to forward bias the diode during the interval t = 0 to T/2.

During the positive swing of the applied voltage, the diode can be replaced
with a short-circuit equivalent for the ideal diode. Thus will result in an output
signal which is an exact replica of the +ve half wave of the applied signal.
 Half Wave Rectifier

During the +ve half of the input voltage, the positive half of the voltage
will appear at the output as the diode will behave like a closed switch.


During the negative half of the input voltage (T/2 to T), the diode will be
reverse biased and appear as open circuit and output voltage will be zero.
 Half Wave Rectifier (Ideal Diode)

Adjacent figure shows input vi and the
output vo. The output signal vo has a
net positive area above the axis over
full period and an average value is
determined by
Vdc = 0.318 Vm half-wave

Process of removing one-half the input
signal to establish a dc level is called
halfwave rectification.

Effect of using a silicon diode with
VK=0.7 V is noticed during the forward-
bias region of the diode. Applied
voltage must exceed VK =0.7 V for the
diode to turn “on.”
 Half Wave Rectifier (Real Diode)
Effect of using a silicon diode with VK =0.7 V is
noticed during the forward-bias region of the
diode. Applied voltage must exceed VK =0.7 V
for the diode to turn “on.”
For v i < 0.7 V, the diode will be in open-circuit
state and vo= 0 V.
For v i > 0.7 V, diode will be conducting and the
difference between vo and vi is a fixed level of
VK=0.7V i.e. vo = vi – VK
Net effect is a reduction in area above the axis,
which reduces the resulting dc voltage level will
be:
Vdc = 0.318(Vm - VK)
For situations where Vm >> VK, an
approximation can be applied by ignoring VK
to calculate Vdc .
EXAMPLE:
(a) Show the output vo and determine its dc level of for the network shown
below.
(b) What would be the output vo is ideal diode is replaced by a silicon diode.
(c) Repeat parts (a) and (b) if Vm is increased to 200 V, and compare results
using Eqs Vdc=0.318Vm and Vdc=0.318 (Vm-Vk).

(a) The diode, in the configuration shown in the figure above, will conduct
during the negative part of the input waveform. The output waveform vo
appearing across resistance R will be corresponding to the negative half of
the input waveform.
Contd from previous slide...
Output vo is shown below. For the time period T, the dc level is given as :
Vdc = -0.318Vm = -0.318 (20 V) = -6.36 V Negative sign indicates that the polarity.

(b)For a silicon diode, the output is shown here

Vdc ≈ -0.318(Vm - 0.7 V) = -0.318(19.3 V) = -6.14 V
Resulting drop in dc level is 0.22 V, or about 3.5%.

(c) Vdc = -0.318 Vm = -0.318(200 V) = 63.6 V

Vdc = -0.318(Vm - VK) = -0.318 (200 V - 0.7 V)
= -(0.318)(199.3 V) = 63.38 V
Difference in 63.6 and 63.38 is small and can be ignored. Thus the offset and drop in
 Peak Inverse Voltage for Diode in HW Rectifier

Peak inverse voltage (PIV) [or PRV (peak reverse voltage)] rating of the
diode is of primary importance in the design of rectification systems.

It is the voltage rating that must not be exceeded in the reverse-bias region
or the diode will enter the Zener avalanche region.

PIV rating for a half-wave rectifier can be determined from the figure given
below, which displays the reverse-biased diode with maximum applied
voltage.

Applying Kirchhoff’s voltage law, the PIV rating of the diode must equal or
exceed the peak value of the applied voltage. Therefore,
PIV rating ≥ Vm for halfwave rectifier
 Full Wave Rectifier
Full-wave rectifier uses four diodes in a bridge
configuration (Fig-B). Fig-A
During the period t =0 to T/2, the polarity of the
input voltage is shown in Fig-A. Resulting
polarities across the ideal diodes (Fig-C) reveal
that D2 and D3 are conducting, whereas D1 and
D4 are in the “off” state.
Net result during the positive half of input voltage
is given in Fig-D with current through resistor R
and voltage across R . Since the diodes are Fig-B
ideal, the load voltage is vo = vi, as shown in the
same figure.

Fig-C
Fig-D
Contd...

D1

D4

For the negative region of the input (for t= T/2 to T), D1 and D4 are the
conducting diodes. This results in flow of current through R which has the
same direction as the current flowing during positive half of input voltage. In
addition, polarity of voltage across the load resistor remains unchanged.
Over one full cycle the input and output voltages will appear as shown
below.
Contd...
Since the area above the axis for one full cycle is now
twice that obtained for a half-wave system, the dc level for
full wave rectifier is given as:
Vdc = 2 times dc value of Half Wave Rectifier
= 2 X 0.318Vm = 0.636 Vm
If silicon rather than ideal diodes are employed in
the rectifier(refer Fig below), the application of Kirchhoff’s
voltage law around the conduction path results in
vi - VK - vo - VK = 0
vo = vi – 2VK
Peak value of the output voltage vo is:
Vomax = Vm - 2VK
Vdc = 0.636 Vomax
Vdc = 0.636 (Vm - 2VK )
If Vm >> 2VK , then Vdc =0.636 Vm is
applied as a first approximation for Vdc .
 PIV of Diodes for Full Wave Rectifier

PIV: The required PIV of each diode

(ideal) can be determined from the
adjacent figure is obtained at the peak of
the positive region of the input signal.
For the indicated loop the maximum
voltage across R is Vm and the PIV rating
is defined by

PIV ≥ Vm
 Rectifier with Center Tapped Transformer
A full-wave rectifier with two diodes uses a
centre-tapped (CT) transformer (Fig-A) to
establish the input signal across each section
of the secondary of the transformer.
During the positive half of input voltage vi
applied to the transformer, induced voltage
across the two sections of the Secondary
winding will appear as shown Fig-B.
This makes diode D1 to be forward biased
and D2 to be in reverse biased state. As
determined by the secondary voltages,
resulting current direction and output voltage
across load resistor R are also shown below.

Fig-B
 Rectifier with Center Tapped Transformer
During the negative portion of the input, the network appears as shown
below, reversing the roles of the diodes but maintaining the same polarity
for the voltage across the load resistor R.
The net effect of output voltage is same as that obtained for the full wave
bridge rectifier with the same dc levels
Vdc = 0.636 Vm (for ideal diode)
Vdc = 0.636 ( Vm – Vk ) (for Realistic diode)
If Vm >>Vk , then Vk can be ignored
Summary of Rectifiers
 PIV of Diode for Center Tapped
Transformer based Rectifier
The network figure shown here helps in
determining the net PIV for each diode
used in a center-tapped transformer
based full-wave rectifier.
Sum of maximum secondary voltage Vm
and voltage VR developed across the load
resistor is the peak inverse voltage across
the diode that would be in reverse biased
diode:
PIV = Vsecondary + VR
= Vm + Vm and

PIV = 2Vm
EXAMPLE: Determine the
output waveform for the network D1 D2
of in Fig-A and calculate the
output dc level and the required
PIV of each diode. R1

For the positive region of the

input voltage, the network appears
as shown in FIG-B.
FIG-A

Diode D1 reverse biased and

Diode D2 forward biased.

R1

FIG-B
 Contd...
For the negative part of the input voltage,
the roles of the diodes are interchanged.
Redrawing the network results in the
configuration of FIG-C, where R1
vo = (1/2) vi or
Vomax = (1/2).Vimax
= (1/2). (10 V) = 5 V,
FIG-D shows the waveform of the output
voltage vo. FIG-C
Impact of removing two diodes from the
bridge configuration (4 diodes) is reduction
of available dc level to the following:
Vdc = 0.636(5 V) = 3.18 V - which is
equal to Vdc available from a half-wave
rectifier with the same input.
• PIV for the diode is equal to the FIG-D
maximum voltage across R1, which is 5 V,
or half of PIV for a half-wave rectifier with
the same input.
END