Module 3 – Gate-Level Minimization

By

Prof. C. Prayline Rajabai

Assistant Professor

School of Electronics Engineering

VIT University

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 Introduction
• Gate level minimization is the task of finding an optimal gate level implementation of the
Boolean functions describing the digital circuit.
• Map method provides a simple straightforward procedure for minimizing Boolean functions.
• This method is the pictorial form of the truth table.
• Map method is also known as the Karnaugh map or K-map method.
• Karnaugh maps provide an alternative way of simplifying logic circuits. Instead of using Boolean
algebra simplification techniques, you can transfer logic values from a Boolean statement or a
truth table into a Karnaugh map.
• The arrangement of 0's and 1's within the map helps you to visualise the logic relationships
between the variables and leads directly to a simplified Boolean statement.

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K- Map
• K-Map is a diagram made up of squares where each square represent one
minterm/maxterm.
• The simplified expressions produced by the map are always in one of the two standard
forms : SOP or POS
• Simpler the expression, the circuit diagram will be with minimum number of gates and
minimum number of inputs
• Note : simplest expression is not unique. It is sometimes possible to find two or more
expression that satisfy the minimization criteria.
• Karnaugh maps, or K-maps, are often used to simplify logic problems with 2, 3 or 4
variables.
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Two-variable Map

Cell = 2n ,where n is a number of variables

For the case of 2 variables, we form a map consisting of 22=4 cells

as shown in Figure
A A A
0 1 0 1 0 1
B B B
0 A B A  B 0 00 10 0 AB AB
0 2

A B A  B 01 11
1 1
1 3
1
A B AB
Maxterm Minterm

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Three Variable Map

Cell = 23=8

AB
C 00 01 11 10
0 2 6 4
0
A B C A BC ABC AB C
1 3 7 5
1 A B C A BC ABC AB C

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Four Variable Map
AB
CD 00 01 11 10
0 4 12 8
00
1 5 13 9
01
3 7 15 11
11

2 6 14 10
10

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Example
• The Karnaugh map is completed by entering a '1‘(or ‘0’) in each of the appropriate cells.
• Within the map, adjacent cells containing 1's (or 0’s) are grouped together in twos, fours, or eights.
• The map for a 2-input OR gate looks like this:

A
0 1
B
A
Y 0 1
B
A
1 1 1
A B Y
0 0 0
B
0 1 1
1 0 1
A+B
1 1 1
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Example : Y = Σm(0,1,4,5,6)
AC
A B C Y
0 0 0 1 AB
C 00 01 11 10
0 0 1 1
0 1 0 0 0 1 1 1
0 1 1 0
1 0 0 1 1 1 1
1 0 1 1
1 1 0 1
1 1 1 0 B
B  AC

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K –Map Contd.,
• Number of adjacent squares that may be combined must always represent a 0/1
in powers of 2(i.e., 1, 2, 4, 8, 16)

• More adjacent squares are combined, we obtain a term with fewer literals.

• For a 3 variable function, one square represent a term with three literals

• Two adjacent square represent a term with two literals

• Four adjacent square represent a term with one literal

• Eight adjacent square encompass the entire map and produce a function that is
always equal to 1.
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K –Map Contd.,
• When Boolean function is defined in terms of minterms, 1’s are entered in the k-
map corresponding to the minterms. The cells that do not contain 1’s are
assumed to be 0’s.

• When Boolean function is defined in terms of maxterms, 0’s are entered in the k-
map corresponding to the maxterms. The cells that do not contain 0’s are
assumed to be 1’s.

• The simplified SOP expression is obtained by grouping adjacent 1’s.

• The simplified POS expression is obtained by grouping adjacent 0’s.

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Exercise
• Use Karnaugh map to simplify the following functions.

F1 = m0+m2+m3+m4+m5+m6+m7

F2 = m0+m1+m2+m5+m7

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Exercise
Given the truth table, find the simplified SOP and POS form.

A B C Y
0 0 0 0
0 0 1 0
0 1 0 0
0 1 1 1
1 0 0 1
1 0 1 1
1 1 0 1
1 1 1 1

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 Don’t care term
• In some logic circuits, certain input conditions never occur or we don’t bother about the

output for those input conditions.

• We call these conditions as Don’t care conditions and denote it as X

AB
CD 00 01 11 10

X
00

01
X 1

11 X X

10 X X

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AD
 Exercise
• Design logic circuit that convert a 4-bits binary code to Excess-3 code

A B C D W X Y Z
0 0 0 0 0 0 1 1
0 0 0 1 0 1 0 0
0 0 1 0 0 1 0 1
0 0 1 1 0 1 1 0
0 1 0 0 0 1 1 1
0 1 0 1 1 0 0 0
0 1 1 0 1 0 0 1
0 1 1 1 1 0 1 0
1 0 0 0 1 0 1 1
1 0 0 1 1 1 0 0
1 0 1 0 x x x x
1 0 1 1 x x x x
1 1 0 0 x x x x
1 1 0 1 x x x x
1 1 1 0 x X X X
1 1 1 1 X X x x
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 Thank you

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