Constructing A Binary Calculator

Digital logic design final project

Student #1: 2017368 - Omer Shaikh

Student #2: 2017402 - Saif Ul Islam

Siddiqui

Instructor: Mr. Adil Muhummad

Lab timing: Tuesday Mornings

 Constructing a Binary Calculator using Only Logic Gates
1. Introduction
A calculator is any machine that
performs arithmetic operations using
pre-programmed logic. This project
involves assembling one such machine,
although simplistic in comparison to
many modern calculators. By limiting
this project to logic gates, the full
knowledge of the digital logic design
course has been harnessed in order to
assemble this project. Techniques that
have been taught in the course, such as
simplification through karnaugh maps,
reducing expressions through
demorgan's law, and implementing
boolean expressions have all been used
in tandem so that this project may
become a possibility. Had more
advanced means been applied, such as
using programmable logic through an
arduino for example, this project would
become a far easier task and no
knowledge of the digital logic design
course would be required. As such, this
project is based solely on design and
implementation through logic gates.
2. Abstract
In summation, the machine consists of
four main modules: An adder circuit, a
subtractor circuit, a multiplier circuit, and
a divider circuit. However, there are
add-ons to these modules which serve
to improve the functionality of these
respective circuits. These involve a 5 bit
binary to BCD converter as well as a
circuit which takes the two’s compliment
of any 5 bit code. The prior is intended
so that the output of the subtracter,
adder, and divider which both output in
5 bits or less, can be converted into
BCD for output on a seven segment
display screen. The latter is designed so
that the subtracter’s output, which is in
two’s complement form, can be
converted back into binary for the
convenience of the user.
3. Objective
Initially, the objective of this project as
assigned by the instructor, was to only
assemble circuits which could take up to
1
8 bits of input in every circuit. However,
due to the complexity of such a machine
as well as the restrictions discussed in
the introduction, it was later decided that
the adder and subtractor would be
limited to 4 bit inputs, while the multiplier
and divider would receive 2 bit inputs.
Nevertheless, due to a unique design
that was implemented in this project, it
was possible to construct a multiplier
that would accept 3 bit inputs. In regards
to this, as well as the additional efforts
that were made in developing and
implementing the decoder as well as the
two’s complement circuit, the objective
of this project has been more than
accomplished.
1. The 4 bit adder:
The design of the 4 bit adder involves
multiple full adder modules attached in
series.1 The full adder logic circuit uses
two AND gates as well as two XOR
gates in order to generate one sum and
one carry. Multiple sums and carries
must be generated in order to add 2
digits together.2 Hence, multiple full
1 4
See page 6 for logic diagram of a full adder
2
See page 6 for logic circuit of a 4 bit adder
adder circuits must be used in tandem in
order to generate a valid output. The
logic diagram for the adder has been
included in the report.
2. The 4 bit modified
subtractor:
The subtractor is built on a borrow in /
borrow out logic and this loop repeats
on for all the four bits. The difference (
equivalent to sum in adder) is the same
as for adder circuit by applying XOR to
the LSB’s and then to the carry.3
However the carry/borrow is generated
by inverting one of the inputs and then
sending it to the AND gate. The circuit
gives correct binary answer when a
large number is subtracted from a
smaller one, nevertheless a 2’s
complimented answer is obtained in the
case if a negative output is generated.
To fix this, the designers performed
another 2’s complement on the answer
to ensure that output is achieved in
binary from even if the initial output is
negative.4
3
See page 7 for logic diagram of full subtractor
See page 7 for logic circuit 4 bit modified
subtractor
2
 3. The 3 bit multiplier:
The unique design of the 3 bit multiplier
was discovered by applying arithmetic
multiplication between two seperate 3
bit digits. The corresponding products
were implemented using AND gates, the
corresponding sums were implemented
using XOR gates, and carries were
generated using AND gates. In essence,
the design made use of full adder
circuits with a twist in order to implement
the boolean expressions derived for
each output bit. Because this is a 3 bit
multiplier, it outputs in six bits, meaning
that the 5 bit decoder will not be able to
work should the six bit be functional.
While implementing the arithmetic
multiplication, there is an instance
where three digits need to be added
together along with one carry. Finding
the sum of 4 digits is simple because it
may only be a 1 or a 0, and a series of
xor gates will be able to produce the
sum. In order to produce the carry for
the operation, a series of AND gates
can be used to form a basic comparator
in order to detect the amount of 1’s
being inputted. If there are one or more
ones, the carry will be taken to be a 1.
However, in the case of all four digits
being 1, the carry would need to be 10,
or decimal 2. It is not possible to detect
a carry which consists of more than one
digit, because a logic gate may only
output one digit. As such, in the special
case of every input being a 1, which
represents the max output case of
7x7=49, a special solution has been
implemented through detecting this
special case scenario and triggering a
specific set of LEDS to turn on or off.
This has been done through using AND
gates to detect when all inputs are 1,
and using this result to turn on certain
LEDS. Also, through performing a XOR
operation upon this result and the LED
inputs, an LED may be turned off.5
4. The 2 bit divider:
Logic for 2 bit divider was quite simple,
as we took 2 inputs and drew a truth
table for the outputs and later got the
simplified through plotting Karnaugh
maps for the outputs which was easily
implemented without much issues.6
5
See page 8 for logic circuit of multiplier
6
See page 8 for logic circuit of divider
3
 5. The 5 bit binary to BCD
decoder:

We needed this circuit to be able

display our 5 bit binary output on
a seven segment display so that
our user interface has some sort
of decimal number to become
user friendly. This could have
been achieved efficiently by a
74185 Binary to BCD converter
however this IC did not seemed
to work flawlessly therefore we
designed our own 5 bit binary to
BCD convertor which turned out
to be a massive and complex
circuit. ( which can be viewed on
the next page ). The inputs of this
circuit will be the answers of each
circuit separately that is the
adder, subtractor, multiplier and
the divider. Once completed the
outputs of this binary to BCD we
connected to 7447 IC’s which are
used to display answer on a
seven segment display.7

7
See page 5 for logic circuit of decoder

4
The 5 bit binary to BCD decoder:

5
Adder Logic Circuit:

6
Modified subtractor logic circuit:

7
Multiplier Logic Circuit:

Divider Logic Circuit:

8
Conclusion: References/Works Cited:

In summation, the calculator was ● (n.d.). Retrieved from

implemented successfully and is 100%
http://www.johnloomis.org/ece314/n
functional with respect to the objectives
aforementioned. With more time, this otes/devices/binary_to_BCD/bin_to_

project could be expanded so that bcd.html

binary to BCD decoder accept a larger
● Administrator. (2017, December 24).
amount of binary inputs. However, due
to the tedious amount of logic gates Binary Multiplication Methods.

required for even a 5 bit input Retrieved from

conversion, this would prove an arduous
https://www.electronicshub.org/binar
task. In addition to this, the multiplier
and divider circuits could be expanded y-multiplication/

to allow inputs of up to 4 bits. This was a ● Binary Subtractor used for Binary
possibility that had been discussed
Subtraction. (2018, September 20).
within the span of this project. However,
Retrieved from
this would require a full adder integrated
circuit(74LS83A), which was not https://www.electronics-tutorials.ws/
available at the time. Also, using this combination/binary-subtractor.html
integrated circuit would mean that the
● Floyd, T. L. (2015). ​Digital
limitation of only using logic gates to
compute outputs would be violated. fundamentals.​ Harlow: Pearson

Education.