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IEEE Power Electronics Magazine

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0% found this document useful (0 votes)
1K views96 pages

IEEE Power Electronics Magazine

Chill !

Uploaded by

hamood
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd

Power Electronics Control Design

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Vol. 7, No. 1 www.pels.org
March 2020

For your engineering success

64 Features

16 Electric Vehicle Batteries Eye Solid-State


Technology
Prototypes promise lower cost, faster charging,
and greater safety
Ashok Bindra

20 A Novel Current-Balancing Method for Paralleled MOSFETs


in High-Current Solid-State Switch Applications
Paralleling a large number of semiconductor devices
by adding inductances in series
Alinaghi Marzoughi and Khaled Bahei-Eldin

Departments
28 Generate and Analyze Standard Testing
for Power Supply Quality
& Columns Determining how equipment is affected enables better
protection and greater customer satisfaction
4 From the Editor Brian Hsu and Jorge Velazquez
Electric Vehicle Batteries Enter
a New Era 35 Modeling the Magnetic Behavior
Ashok Bindra of N-Winding Components
Approaches for unshackling switching superheroes
8 President’s Message Alex J. Hanson and David J. Perreault
The IEEE PELS Footprint Is
Expanding Across the Globe
Frede Blaabjerg
46 The Increasing Role of Design Automation
in Power Electronics
Gathering what is needed
12 Happenings Kevin Hermanns, Yarui Peng, and Alan Mantooth
Power Electronics-Enabled Operation
of Power Systems
Qing-Chang Zhong

52 Patent Reviews
What Does Copyright Protect
About Software?
Art MacCord On the cover
To commercialize solid-state battery
56 Expert View technology, key automotive original
Gallium Nitride Integration: Breaking equipment manufacturers have made
Down Technical Barriers Quickly significant investments and
partnerships with companies
Alex Lidow developing electric vehicle batteries.

64 Society News HOUSE— ©ISTOCKPHOTO.COM/SL-F,


CAR & CHARGING STATION—©ISTOCKPHOTO.COM/
CHESKY_W

88 Event Calendar

92 White Hot
You Need More Than Cookbooks
Robert V. White

Digital Object Identifier 10.1109/MPEL.2019.2959110

March 2020 z IEEE POWER ELECTRONICS MAGAZINE 1


IEEE Power Electronics Magazine
Editor-in-Chief IEEE Power Electronics 2021 Members-at-Large Alireza Khaligh
Ashok Bindra Society Officers Vladimir Blasko Vehicle and Transportation Systems
12 Magnolia Ave. Frede Blaabjerg United Technology Research khaligh@ece.umd.edu
Nesconset, NY 11767 USA President Center, United States
+1 631 471 5895 fbl@iet.aau.dk Antonio Cardoso Advertising Sales
bindra1@verizon.net Liuchen Chang University of Beira Interior, Portugal Walter Chalupa
President Elect National Sales Manager
Udaya K. Madawala
VP Conferences University of Auckland, Kerstin Chalupa
Deputy Editors-in-Chief lchang@unb.ca International Sales Manager
Robert N. Guenther (Industry) New Zealand
Alan Mantooth Telephone: +1 973 835 7015
VP-Product Development Axel Mertens chalupapels@aol.com
Immediate Past President Universität Hannover, Germany
NWL
Nominations Committee Chair
Bordentown, NJ 08505 USA Maryam Saeedifard IEEE Power Electronics
mantooth@uark.edu
+1 609-298-7300 ext. 1245 Georgia Tech, United States Society Staff
RGuenther@nwl.com Braham Ferreira
Senior Past President Shinzo Tamai Mike Kelly
John Shen (Academic) Long-Range Planning Toshiba Mitsubishi-Electric Industrial Executive Director
Grainger Chair Professor Committee Chair Systems Corporation, Japan m.p.kelly@ieee.org
Department of Electrical j.a.ferreira@tudelft.nl Jane Celusak
2022 Members-at-Large Project Manager
and Computer Engineering Mario Pacas
Christina DiMarino j.celusak@ieee.org
Illinois Institute of Technology VP Global Operations Virginia Tech, United States
10 West 35th Street, Suite 1600 pacas@uni-siegen.de Alicia Tomaszewski
Chicago, IL 60616 USA Yan-Fei Liu Marco Liserre
Project Manager Transportation
+1 312 567-3352 Keil University, Germany
VP Technical Operations Electrification Community
zjohnshen@gmail.com yanfei.liu@queensu.ca Sudip K. Mazumder a.tomaszewski@ieee.org
Brad Lehman University of Illinois at Chicago,
Tom Keim (Contributing) United States Becky Boresen
+1 352 363 6688 VP Products Technical Community
lehman@ece.neu.edu Brendan McGrath Program Specialist
tkeim@alum.mit.edu RMIT University, Australia
Johan Enslin b.boresen@ieee.org
VP Standards Xiongfei Wang
Magazine Advisory Board jenslin@clemson.edu Aalborg University, Denmark IEEE Periodicals
John Shen Jian Sun Mark Dehong Xu Magazines Department
MAB Cochair Treasurer Zhejiang University, China 445 Hoes Lane, Piscataway, NJ
Chairman jsun@ecse.rpi.edu 08854 USA
Illinois Institute of Technology Jinjun Liu Technical Committee Chairs Jessica Welsh
VP Membership Brian Zahnstecher Managing Editor
Robert N. Guenther Communications Energy Systems
MAB Cochair jjliu@mail.xjtu.edu.cn Geraldine Krolin-Taylor
David B. Durocher bz@powerrox.com Senior Managing Editor
NWL
Division II Director Jin Wang Janet Dudar
William A. Peterson High Performance and Emerging Senior Art Director
D&V Electronics 2020 Members-at-Large Technologies
Johan Enslin Gail A. Schnitzer
wang.1248@osu.edu
Mark Dehong Xu Clemson University, United States Associate Art Director
Uday Deshpande Theresa L. Smith
Zhejiang University, China Noriko Kawakami Motor Drives and Actuators
Toshiba Mitsubishi-Electric Production Coordinator
Ernie Parker udayd@ieee.org
Industrial Systems Corp., Japan Mark David
Crane Aerospace and Electronics Rolando Burgos Sr. Manager Advertising and
Brad Lehman Power and Control Core
Annette Mutze Northeastern University, Business Development
Technologies
Graz University of Technology, United States rburgos@ieee.org Felicia Spagnoli
Graz, Austria Helen Li Advertising Production Manager
Hanh-Phuc Le
Florida State University, Power Conversion Systems Peter M. Tuohy
Stephanie Watts Butler United States Production Director
Texas Instruments and Components
Marco Rivera hanhphuc@colorado.edu Kevin Lisankie
Soma Essakiappan University of Talca, Chile Sudip Mazumder Editorial Services Director
University of North Carolina- Pradeep Shenoy Sustainable Energy Systems Dawn M. Melley
Charlotte Texas Instruments, United States mazumder@uic.edu Staff Director, Publishing Operations

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IEEE Power Electronics Magazine (ISSN 2329-9207) (IPEMDG) is published quarterly by the Institute of Electrical and
Electronics Engineers, Inc. Headquarters: 3 Park Avenue, 17th Floor, New York, NY 10016-5997 USA, Telephone: +1 212
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request. Copyright and reprint permission: Abstracting is permitted with credit to the source. Libraries are permitted to photo-
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Promoting Sustainable Forestry

Digital Object Identifier 10.1109/MPEL.2019.2959111 SFI-01681

2 IEEE POWER ELECTRONICS MAGAZINE z March 2020


From the Editor
by Ashok Bindra

Electric Vehicle Batteries


Enter a New Era

T
he first feature article of this medium switching frequency applica- are many other aspects that are not
issue of IEEE Power Electron- tion. It does not limit the number of treated in this article.
ics Magazine, “Electric Vehi- devices in parallel; The last feature
cle Batteries Eye Solid-State Tech- consequently, very article “The Increas-
nology,” is by yours truly and investi- high currents can be As always, we are ing Role of Design
gates the developments in solid-state achieved by paral- Automation in Power
committed to bringing
batteries for electric vehicles (EVs) leling smaller semi- Electronics,” by Kev-
and hybrid EVs and what is driving conductor devices. timely articles, in Hermanns, Yarui
them. Besides offering lower cost, I n a dd it ion, it i s columns, and news Peng, and Alan Man-
lighter weight, higher energy density, implemented by us- items of interest and tooth, discusses the
and greater range, the solid-state ver- ing low-cost compo- value to practicing papers presented by
sion, with solid electrodes and elec- nents and does not academia, computer-
power electronics
trolytes, is also expected to provide a require complicated aided design ven-
engineers.
higher degree of safety. real-time measure- dors, design houses,
In essence, based on data from ments or processes and testing equip-
the market research firm Yole Dével- to balance the dy- ment providers at the
oppement, the article shows that namic currents among MOSFETs. second Design Automation for Power
to commercialize solid-state batter- In their article, “Generate and Electronics workshop. The topics ex-
ies, four different types of technol- Analyze Standard Testing for Power plored include fast-yet-accurate mod-
ogy players are joining forces to share Supply Quality,” Brian Hsu and Jorge els and circuit simulators, system-level
knowledge and overcome challenges. Velazquez demonstrate the useful- optimization algorithms, layout-driven
Plus, the article identifies key automo- ness of a programmable ac power component-optimization methods,
tive original equipment manufactur- source in testing power supplies that model-based-design space explora-
ers (OEMs) that have made substantial comply with stringent power quality tion, and automated design-synthesis
investments in companies developing standards, such as IEC61000-4–11. workflows. In addition, the authors
solid-state batteries. Next, “Modeling the Magnetic Be- explicitly outline the results of 12 pre-
In the next article, “A Novel Cur- havior of N-Winding Components,” by formulated questions on power elec-
rent-Balancing Method for Paralleled Alex J. Hanson and David J. Perreault, tronics design automation.
MOSFETs in High-Current Solid-State reviews valuable modeling tech-
Switch Applications” by Alinaghi Mar- niques for the magnetic behavior of Columns and News
zoughi and K haled Bahei-Eldin, a inductors and (especially) multiport In the “Happenings” column, Prof.
novel method to parallel individual components (such as transform- Qing-Chang Zhong, of the Illinois Insti-
power semiconductor devices in solid- ers), highlighting each approach’s tute of Technology, Chicago, details
state switch applications is proposed. advantages in component design, the workshop Power Electronics-
The authors believe that this method circuit application, and experimen- Enabled Operation of Power Sys-
can also be extended to any other low/ tal characterization. In this article, tems, where experts debated the fun-
the authors model only the behav- damental challenges and needs in
Digital Object Identifier 10.1109/MPEL.2019.2959961
ior of magnetic coupling and energy multidisciplinary research and
Date of current version: 19 February 2020 storage within a component. There education in the control of power

4 IEEE POWER ELECTRONICS MAGAZINE z March 2020


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electronics-enabled power systems, Boulder for master’s degree students elevated IEEE Fellows. Finally, the
necessary for enhanced grid stability, who were ready to enter industry. His “Event Calendar” provides the year’s
autonomy, scalability, operability, reli- experience shows that “you don’t listing of conferences and workshops.
ability, security, and resiliency. The learn to cook from a cookbook” when In its seventh year, IEEE Power
“Patent Reviews” column by Art Mac- trying to help students fully under- Electronics Magazine continues to
Cord investigates a court decision on s tan d th e des ign and develop- do well. I would like to thank all of
a copyright case, which will indicate ment process. you for your continuous support. As
how much of a software program’s In addition to providing a preview always, we are committed to bring-
source code can actually be protected. of the IEEE Applied Power Electron- ing timely articles, columns, and news
In the “Expert View” column, Alex ics Conference and Exposition in New items of interest and value to practic-
Lidow of Efficient Power Conversion Orleans, Louisiana, in March 2020, ing power electronics engineers. To
Corporation takes readers through the articles in the “Society News” column serve you better and keep this maga-
various phases of gallium nitride inte- discuss interesting events and activi- zine a valuable resource for working
gration, spearheaded by two major ties from the IEEE Power Electron- power electronics engineers world-
players. In the “White Hot” column, ics Society (PELS) Chapters around wide, we look forward to your feed-
Robert V. White shares his experience the world, including the launch of the back and suggestions. Wishing you all
in teaching a power electronics proj- PELS online webinar series. The col- the best for 2020!
ect lab at the University of Colorado– umn also provides the names of newly

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6 IEEE POWER ELECTRONICS MAGAZINE z March 2020


President’s Message
by Frede Blaabjerg

The IEEE PELS Footprint Is


Expanding Across the Globe

I
have now completed one year of road maps, define new PELS technol- webinars, and so on. It is important
my term as president of the IEEE ogy milestones, and initiate new stan- to ensure that, in the future, we will of-
Power Electronics Society (PELS), dards—just to mention a few plans. fer attractive and timely activities and
and time is passing so quickly—in a Meanwhile, it is time to announce products to our members. We were
good way. Our Society is very dynam- the next president-elect for PELS, who able to discuss our new strategic plan
ic, with many new ideas and initia- will serve in 2021 and 2022. I would like at the AdCom meeting at the Energy
tives, and it is getting better each day. to congratulate Prof. Liuchen Chang Conversion Congress and Exposition
On 12 December 2019, we launched from the University 2019–North America
the first PELS online webinar series, of New Brunswick, in Baltimore, Mary-
which covered microinverters for Canada. Since he has We hope to create land, in October 2019.
photovoltaics. It was organized as a been involved with technology road If you have any
half-day event with a combination of PELS for many years, maps, define new input regarding new
presentations and question-and- the transition will be activities, services,
PELS technology
answer sessions after each presenta- easy and smooth. or products that our
tion. More than 500 attendees partici- We have also elected milestones, and initiate Society should of-
pated in the webinar via the Internet. three vice presidents new standards— fer, you ca n ema il
We have been trying to launch this (VPs) to serve the term just to mention a t hem to me, a nd I
online series for a long time, as it 2020–2021: VP for few plans. will present them to
could provide a compelling alterna- Global Relations Prof. the committee. Simi-
tive to travel. Mario Pacas, Germa- larly, please share
The event was a great success; ny; VP for Membership Prof. Jinjun your ideas about how to improve our
both the presentations and the follow- Liu, China; and VP for Standards existing offerings, including what we
ing question-and-answer discussions Prof. Johan Enslin, United States. The should not do anymore. Email your
were informative and educational. election was conducted by the voting feedback, and we will give it due con-
Our intention is to offer such programs members of Administrative Commit- sideration when finalizing our strate-
more regularly for Society members, tee (AdCom) for PELS. The election gic plan for 2020–2025. I also hope we
presenting current topics of interest in is based on a slate of volunteer candi- will be able to expand our number of
our field. Thanks to Prof. Prasad Enjeti, dates found by the PELS Nomination technical committees (TCs). We cur-
PELS digital media editor, for organiz- Committee. I thank Prof. Peter Wilson rently have seven TCs, but there are
ing this series. I expect that, in 2020, we for his long-term service as VP for Stan- technology areas in our field that are
will repeat some of our new activities, dards as well as all of the candidates not covered. Consequently, my vision
such as the P3Talk and PELS Day; ex- volunteering to be part of the ballot. is that all PELS members should be
pand our PELS summer schools; and This year we will update our stra- able to identify themselves with at
continue to provide the IEEE Empow- tegic plan for 2020–2025, a process in least one TC and, thereby, get involved
ering a Billion Lives program. In ad- which we would like to get input from in the Society.
dition, we hope to create technology Society members. Since our last Furthermore, our Society is keenly
strategic plan (2015–2019), we have observing how the start of the new
Digital Object Identifier 10.1109/MPEL.2019.2959962
almost doubled our membership IEEE Open Journal of Power Elec-
Date of current version: 19 February 2020 numbers, new journals, conferences, tronics is progressing and the level

8 IEEE POWER ELECTRONICS MAGAZINE z March 2020


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of interest in the professional commu- Because we see our technology as where we are not yet present, mainly
nity to submit papers to this journal. the enabler for the global moderniza- through regional or Chapter activi-
Even though the open journal will not tion and electrification, we expect our ties. In this way, we plan to launch
have an impact factor Society to be present new events.
the first two years, i n a s ma ny cou n- Winter is drawing to a close, and it
there seems to be Even though the open tries as possible. In is time for us to see each other again at
tremendous inter- December 2019, we the IEEE Applied Power Electronics
journal will not have an
est, and it will surely had our first activ- Conference and Exposition (APEC)
get one within three impact factor the first ity in Buenos Aires, 2020 in New Orleans, Louisiana,
years. This means two years, there seems A r gent i n a , wh ich 15–19  March. APEC 2020 again has a
that articles already to be tremendous was a great success, record high number of exhibitors and
published in its first interest, and it will involving more than a very strong technical program. This
year will be indexed surely get one within 40 participants from conference is a good place to network
in Web of Science. I different parts of with other professionals in your field. I
three years.
hope you will submit that country. It was am also sure we will learn news about
a paper to this jour- evident that the So- better technology and ideas during
nal (as well as read ciety has much to the technical sessions. I hope to meet
the exciting papers already published), offer in Argentina; for example, power many of you there while enjoying
which will be accessible to all through electronics is integrated in many cur- the conference!
gold open access, thereby bringing the ricula. In 2020, we will try to organize
highest visibility to research conducted. similar activities in other countries 

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Happenings
by Qing-Chang Zhong

Power Electronics-Enabled
Operation of Power Systems

P
ower systems are going Prof. Beibei Ren, Texas Tech Uni- nized and Democratized (SYN-
through a paradigm shift as versity; Dr. Thanh Long Vu, Pacific DEM) Smart Grids,” Qing-Chang
millions of distributed energy Nor thwest National Laborator y; Zhong, IIT
resources are connected to the grid Prof. Ziang Zhang, Binghamton Uni- ■ “Optimizing Ubiquitous Power Elec-
worldwide. This imposes unprece- versity; and Annette Lauderdale, IIT. tronics for the Future Power Grid,”
dented challenges to the operation of More than 130 participants from Dr. Zhenyu Henry Huang, Pacific
future power systems, which will be funding agencies, regulatory commis- Northwest National Laboratory
power electronics based instead of sions, utilities, national labs, universi- ■ “Technical Challenges of High Level
electric machines with millions of ties, and vendors attended (Figure 1). of Inverter-Based Resources in
active, intermittent, nonsynchronous, The vice provost for research at IIT, Power Grids,” Prof. Robert Lasseter,
and heterogeneous players. It is Prof. Fred J. Hickernell, welcomed University of Wisconsin–Madison
important to identify the fundamental them. Dr. Anil Pahwa from the NSF ■ “Research and Education in CURENT
challenges and needs in multidisci- kicked off the workshop with “NSF on Power Electronics for Power
plinary research and education in the Perspectives: Challenges and Oppor- Systems,” Prof. Fred Wang, Univer-
control of power electronics-enabled tunities,” followed by 10 keynotes, sity of Tennessee, Knoxville
power systems for enhanced grid sta- nine short talks, and two panel dis- ■ “Growing Deployment of Power
bility, autonomy, scalability, operabili- cussions. The pa r ticipa nts a lso Electronics in Power Systems:
ty, reliability, security, and resiliency, v i sited the IIT microgrid and the Challenges, Opportunities, and
while strengthening collaborative SYNDEM Smart Grid Lab. Research Initiatives,” Dr. Abraham
efforts to tackle these issues and raise The talks included Ellis, U.S. Department of Energy
awareness within funding agencies ■ “Enabling a Power Electronics ■ “Flexible Division and Unification
and among policy makers. To help do Grid,” Prof. Deepak Divan, Georgia Control Strategies for Resilience
so, the Energy, Power, Control, and Institute of Technology Enhancement in Networked Mi-
Networks Program of the U.S. Nation- ■ “Power Electronics-Enabled Auton- crogrids,” Prof. Mohammad Shahi-
al Science Foundation (NSF) spon- omous Power Systems: Synchro- dehpour, IIT
sored a workshop, Power Electron-
ics-Enabled Operation of Power Sys-
tems, at the Illinois Institute of
Technology (IIT), Chicago, from 31
October to 1  November 2019, under
award 1933207.
The workshop’s organizing com-
mittee included Prof. Qing-Chang
Zhong (chair), IIT; Prof. Sairaj Dhople,
University of Minnesota; Prof. Brian
Johnson, University of Washington;

Digital Object Identifier 10.1109/MPEL.2019.2960670


Date of current version: 19 February 2020 FIG 1 Workshop attendees gather for the first day.

12 IEEE POWER ELECTRONICS MAGAZINE z March 2020


SL Series XR Series TS Series MS Series MT Series
■■“Medium-Voltage Power Electronics Technolo-
gy,” Prof. Alex Huang, University of Texas at
Austin
■■“Power Engineering Education in the Age of Cli-
mate Crisis: A Holistic View,” Prof. Ned Mohan,
University of Minnesota
■■“Power Electronics in Transportation Electrifica-
tions,” Prof. Ali Emadi, McMaster University.
The short talks were
■■“Protection of High-Voltage dc Transmission Sys-
tems,” Prof. Maryam Saeedifard, Georgia Insti-
tute of Technology
■■“Grid-Forming Photovoltaic Inverter: Opportuni-
ties and Challenges,” Dr. Hariharan Krishnaswa-
mi, U.S. Department of Energy
■■“The Advanced Grid Innovation Lab for Energy: A
Collaborative Program of the New York Power Au-
thority (NYPA),” Dr. George Stefopoulos, NYPA
■■“Microgrid Testbeds at Different Scales for Re-
search and Education,” Prof. Beibei Ren, Texas
Tech University
■■“Resilient Architectures and Algorithms for Gen-
eration Control of Inertialess ac Microgrids,”
Prof. Alejandro Dominguez-Garcia, University of
Illinois at Urbana-Champaign
■■“Nonlinear Decentralized Control for Future
Grids,” by Prof. Brian Johnson, University of
Washington
■■“Multi-Scale Control of Power Electronics for

Tape Wound Toroidal & Cut Cores Power Systems,” Prof. Sudip K Mazumder, Uni-
versity of Illinois at Chicago
For Sophisticated Electronic ■■“High-Frequency Power Electronics at the Grid

Components Edge: Opportunities and Challenges,” Prof. Min-


jie Chen, Princeton University
■■“Impedance-Based Evaluation of Stability Impacts
of Inverter-Based Resources,” Dr. Shahil Shah, Na-
tional Renewable Energy Laboratory.
The workshop was a success, and the participants
found it informative and useful for further work.
It will be organized annually in the future.

About the Author


Qing-Chang Zhong (zhongqc@ieee.org) received
Magnetic Metals Achieve Near-Perfect his Ph.D. degree in control theory and engineering
Uniquely Supplies: Magnetic Circuits in: from Shanghai Jiao Tong University, China, in 2000
• All types & thicknesses of soft • Power/navigation systems and his Ph.D. degree in control and power engineer-
magnetic materials with… • Transformers/GFCI’s ing from Imperial College London in 2004. He is the
• Advanced magnetic & • Power supplies Max McGraw Endowed Chair Professor in energy
performance properties. • Voltage monitors and power engineering in the Department of Elec-
trical and Computer Engineering, Illinois Institute
• Standard & custom sizes, Contact Our Technical of Technology, Chicago, and founder and chief
shapes and quantities. Team Today!
executive director of Syndem, Chicago. His re-
• Nanocrystalline & amorphous New Jersey & California
888-892-8392 search focuses on power electronics, advanced
alloys; silicon- nickel- and
cobalt-iron alloys. www.MagneticMetals.com control theory, and the seamless integration of both
to address fundamental challenges in energy and
75+ YEARS power systems. He is a Fellow of the IEEE.
OF CUSTOMER
SERVICE
by Ashok Bindra

Electric
Vehicle
Batteries Eye
Solid-State

©ISTOCKPHOTO.COM/NATALYABUROVA
Technology
Prototypes promise lower cost,
faster charging, and greater safety

T
he global pressure to cut carbon dioxide emis- energy density, cost less, and provide greater safety.
sions from automobiles is driving more and Besides the performance improvement, safety is a major
more buyers toward electric vehicles (EVs) factor driving automakers toward SS technology. In SS
and hybrid EVs (HEVs). As the market for EVs batteries (SSBs), the flammable liquid electrolyte, which
and HEVs slowly grows with lithium-ion (Li- passes the charge that carries Li ions during charge and
ion) as the battery technology of choice, for reasons well discharge cycles, is replaced by a solid electrolyte. These
known, there is another technology emerging. Research- ongoing improvements in battery technologies will pave
ers are developing a solid-state (SS) version of Li-ion the way for an installed EV base of 100 million vehicles
batteries for EVs that promises to charge and discharge by 2028, according to global technology market advisory
rapidly, offer longer lifecycles, provide a much higher firm ABI Research, Oyster Bay, New York. In fact, ABI’s
principal analyst James Hodgson says, “Lithium-silicon
Digital Object Identifier 10.1109/MPEL.2019.2961203
and SS are the future EV battery technologies that will
Date of current version: 19 February 2020 improve performance, hold more energy, and last longer

16 IEEE POWER ELECTRONICS MAGAZINE z March 2020 2329-9207/20©2020IEEE


at a lower cost. The addition of silicon alone over the Yoshino is an honorary fellow at the Asahi Kasei Corpora-
next seven years will grow the EV installed base from tion and a professor at Meijo University, Nagoya, Japan. He
8 million vehicles in 2019 to 40 million in 2025, as con- shared the Nobel Prize with John B. Goodenough, Univer-
sumers’ range anxiety slowly eases” [1]. sity of Texas at Austin, and M. Stanley Whittingham, State
During the past few years, several players announced University of New York at Binghamton.
prototype cells and expected commercialization dates, LIBTEC is the first organization to gather automo-
only to withdraw their claims or postpone the results. tive, battery, and materials manufacturers in an effort to
“Despite decades of development, many technological develop a standard SS Li-ion battery that has a capacity of
challenges remain unsolved,” stated Dr. Milan Rosina, 800 Wh/L. By setting standards for SSBs, Japanese compa-
principal analyst for power electronics and batteries at nies hope to reclaim their global dominance. During the
market research firm Yole Développement (Yole), Lyon, past several years, Japanese automotive-battery manufac-
France. Yole’s latest SSB report indicates that mass pro- turers have lost market share to manufacturers from China
duction will begin by 2022 and account for less than 1% of and South Korea.
the traditional Li-ion battery market by 2025. However, this
scenario will change when large SSB manufacturers enter More Investors
the arena. In fact, according to Rosina, “To commercial- To speed up the development of SSBs, automotive OEMs,
ize SS batteries, four different technology players are join- including battery manufacturers, have begun to invest in the
ing forces to share knowledge and overcome challenges” technology. While the progress is encouraging, there are still
(Figure 1). Those companies produce SS electrolyte tech- many hurdles that must be overcome before SSBs can be
nology, equipment, battery cells, and vehicles. However, adopted in automobiles. German automaker Volkswagen,
with work still remaining, there is no commercially avail- for example, announced a US$100 million investment in
able bulk SSB today. QuantumScape, an SSB start-up that spun out of Stanford
According to Yole, the key technology areas that need University, California. In a statement, QuantumScape Chief
to develop include electrolyte-material screening, ionic- Executive Officer (CEO) Jagdeep Singh said, “We think the
conductivity enhancement, electrolyte/electrode-interface higher range, faster charging times, and inherent safety of
stability, Li-metal anodes, cell- and pack-manufacturing SS technology will be a key enabler for the next generation
methods, battery-management systems, and battery- of electrified powertrains.”
pack designs. Yole’s analysts have identified more than Likewise, automaker Ford invested US$20 million in
100 companies and R&D groups that are involved in SSB SSB developer Solid Power (Table 1). The partnership is
development [2]. expected to capitalize on Solid Power’s fully automated,
roll-to-roll production facility (Figure 2), which became
SSB Developers operational last year. “From initial 2-Ah cells, Solid Power’s
Established automotive manufacturers, such as Toyota, Volk- automated pilot production facility will be capable of pro-
swagen, BMW, Daimler, and Hyundai, as well as newcomers ducing 20-Ah cells for larger battery packs by the end of the
Dyson and Fisker have joined SSB developers to commer- first quarter,” said Solid Power’s Dean Frankel, a strategic
cialize EVs/HEVs with batteries that will be safer, lighter, and business development executive. He added that the com-
longer running than conventional Li-ion batteries. As a result, pany hopes to commercialize the technology in the next
the number of companies and consortiums developing SSBs five to nine years with a target of 2027 for large batteries
has risen. One example is Japan’s Lithium Ion Battery Tech- for automotive applications. In fact, according to Frankel,
nology and Evaluation Center (LIBTEC), a consortium con- the company hopes to demonstrate the commercially ready
sisting of 30 companies, including heavyweights such as Toy- EV SSBs by 2022. According to Solid Power, “By combining
ota, Nissan, Honda, and Panasonic. “Sharing
know-how from the four main technology
areas is crucial for commercializing SSB,”
asserted Rosina.
R&D
With support from Japan’s Ministry
of Economy, Trade, and Industry and the
New Energy and Industrial Technology
Development Organization, LIBTEC hopes
to develop an SSB that doubles the range of
EVs from 400 km (249 mi) to 800 km (497 mi)
1) Technology 2) Equipment 3) Cell 4) Automotive
by 2030. For the time being, it is targeting a Provider Supplier Manufacturer OEM
more modest range of 550 km (342 mi) by
2025. The effort is led by Dr. Akira Yoshino, FIG 1 Companies in four different technology areas must share knowledge to over-
a winner of the 2019 Nobel Prize in Chemis- come the challenges of SSB commercialization. OEM: original equipment manufac-
try for the development of Li-ion batteries. turer. (Source: [2]; used with permission.)

March 2020 z IEEE POWER ELECTRONICS MAGAZINE 17


state-of-the-art cathodes with metallic-Li anodes, SSBs can area of development for Solid Power.” The initial technology
achieve up to a 50% increase in cell-level energy versus cur- was licensed from the University of Colorado, Boulder. Like
rent Li-ion cells. Even greater energy improvements are pos- Ford, auto giants BMW and Hyundai are investors in Solid
sible with more advanced cathodes, which is an additional Power as is battery supplier A123 Systems.
A123 Systems has also partnered with an advanced-
materials company, Ionic Materials, to develop SSBs. By
Table 1. Notable investments and partnerships.
combining Ionic Materials’ advanced, ionically conductive,
Battery polymer-based solid electrolyte with graphite anodes and
Company Investor Type ­Technology metal–oxide cathodes, the partners plan to manufacture
Quantum Scape Volkswagen Investment SS technology full-scale SSBs by using high-volume Li-ion manufacturing
Solid Power BMW Group Partnership SS technology equipment, which would result in a cost-effective way to
make EVs safer, lighter, and less complex (see “Fast-Charg-
Hyundai Investment
ing Electric Vehicle Batteries”). “This unique approach is
Ford
expected to enable the high-volume launch of SS technol-
Samsung ogy into the market as soon as 2022,” according to the part-
Northvolt BMW Group Partnership Battery ners. “By not using more exotic electrodes, such as Li-metal,
Umicore ­recycling an SSB with a solid polymer electrolyte can be introduced
Enevate Nissan ­Alliance Investment Lithium-silicon to the market much faster.” In a press release, Mike Zimmer-
Samsung batteries man, CEO of Ionic Materials said, “The synergy between
our two companies produced a level of cooperation that is
LG ­Chemistry
required to succeed in the ever-advancing battery space.
Sila Siemens Investment Lithium-silicon
We look forward to our continued success in commercial-
­ anotechnologies
N Daimler batteries
izing this technology.”
BMW Group Partnership Earlier this year, Daimler led a US$170 million series E
Source: ABI Research. funding round for Sila Nanotechnologies, which developed
a silicon-based anode (rather than graphite) to improve Li-
ion battery efficiency. Toyota is developing an SSB for its
own vehicle-electrification plan and recently partnered
with Panasonic.
On the government front, the U.S. Department of Energy
has awarded General Motors US$2 million for research and
development of SSBs. This money will be precisely divided
into two parts. While US$1 million will go for the funda-
mental understanding of interfacial phenomena in SSBs,
the other US$1 million will go into research of hot press-
ing of reinforced all SSBs with sulfide glass electrolyte. In
FIG 2 Solid Power’s fully automated, roll-to-roll SSB production a 2014 study, it was shown that all bulk-type SSBs with sul-
facility. (Source: Solid Power; used with permission.) fide glass electrolyte exhibited excellent cycle performance

Fast-Charging Electric Vehicle Batteries


Unlike the largest market for rechargeable batteries for consumer EV battery requires intercalation of Lithium (Li) ion and electrons
handsets, the ability to charge quickly (<15 min) is a key necessity for on the electrodes. The process of intercalation of lithium into free
electric vehicles (EVs). Given the size of the battery and the need to sites slows as more free sites become occupied with Li ions. Trying
create a battery that will last at least 10 years with a nonsignificant to push more Li ions quickly into less free space on the anode
amount of degradation, the ability to create a battery with fast- effectively creates an overload, whereby lithium starts to build up
charging capabilities is highly complex. on the anode, unable to find a free site on the anode. This results
Consumers in the automotive market desire charge times that in extra stresses, reducing capacity over time in the anode, and
are similar to filling up a vehicle at a gas station. In a bid to meet eventually leading to lithium plating, which could lead to short
consumer demand, automotive market incumbents and infrastructure circuiting, if severe. The same conditions also occur when charging
providers are continually aiming to develop charging technology to is carried out in cold temperatures, which significantly reduces the
achieve high-charging powers and establish fast charging times. rate of intercalation.
Not only do fast-charging stations have a huge impact on the grid,
but they also introduce large stresses on the EV battery. Charging an —ABI Research

18 IEEE POWER ELECTRONICS MAGAZINE z March 2020


research and development as an open collaborative pro-
gram and works with all interested parties. In China,
a startup spun out of Tsinghua University called Qing
Tao Energy Development Co. has deployed an SSB pro-
duction line in Kunshan, East China. After achieving an
energy density of over 400 Wh/kg, Chinese EV startup
Enovate has inked a deal with battery cell maker Pro-
Logium on commercializing SSBs. Under this agreement,
Enovate will use ProLogium’s SS lithium ceramic battery
(LCB) technology in its newest EV model ME-S premium
sports sedan. The SS-LCB is expected to offer an energy
density of 750 Wh/L. According to ProLogium, unlike
rechargeable Li-ion batteries, its SS-LCB technology
FIG 3 imec’s pilot line for SS Li-metal battery cells. (Source: does not need any protection circuit and is intrinsically
imec; used with permission.) safe with no leakage.
Meanwhile, in partnership with Panasonic, Toyota
at room temperature. As a result, it could play a key role in is also developing an SSB under its vehicle electrifica-
bringing SSBs to market. tion plan. Toward that goal, according to the Japanese
automaker, it will debut a prototype EV equipped with
Europe and Asia an SSB at the 2020 Tokyo Olympics. However, a produc-
During the European Electric Vehicles Batteries Summit in tion EV with SSB will not be available until the middle
June 2019, imec announced that it had doubled the energy of this decade.
density of its SS Li-metal battery cell and that it was scal- Unlike others, Tesla continues to advance the conven-
ing a pilot line in Genk, Belgium, to manufacture the prod- tional wet Li-ion technology and is developing new chemis-
uct ­(Figure 3). To achieve an energy density of 400 Wh/L at tries in collaboration with Dalhousie University in Canada.
a charging speed of 0.5 C (2 h), the researchers used a As per Tesla’s press release, the new technology offers the
solid nanocomposite electrolyte combined with a standard energy density of SSBs while maintaining the same format
Li-iron phosphate cathode and Li-metal anode. imec aims as today’s lithium-ion cells.
to reach densities of more than 1,000 Wh/L at a charging
speed of 2–3 C (less than half an hour) by 2024. According About the Author
to imec, the solid nanocomposite electrolyte has an excep- Ashok Bindra (bindra1@verizon.net) received his M.S.
tionally high conductivity of up to 10 mS/cm, with a poten- degree from the Department of Electrical and Computer
tial for even higher levels. A distinguishing feature of the Engineering, Clarkson College of Technology (now Clark-
new material is that it is applied as a liquid via a wet chem- son University), Potsdam, New York, and his M.Sc. degree
ical coating and converted into a solid when it is in place in physics from the University of Bombay, India. He is the
in the electrodes. As a result, says imec, the material is editor-in-chief of IEEE Power Electronics Magazine and
well suited to be cast into dense power electrodes where it a Member of the IEEE. He is a veteran freelance writer
fills all of the cavities and ensures maximum contact, and editor with more than 35 years of editorial experience
much like a liquid electrolyte. covering power electronics, analog/radio-frequency tech-
Per imec’s description, the assembly of the cells could be nologies, and semiconductors. He has worked for leading
done by slightly modifying existing manufacturing lines electronics trade publications in the United States, includ-
for Li-ion batteries. As a result, the technology does not ing Electronics, EE Times, Electronic Design, Power
require expensive investments to switch from wet to SS Electronics Technology, and RF Design.
cells. The pilot line, which is located at the imec Ener-
gyVille Campus in Genk, was established in coordination References
with the University of Hasselt, Belgium, enabling the man- [1] ABI Research, London, U.K., “Next gen batteries will power up the
ufacture of prototype pouch cells with up to 5 Ah of capac- electric vehicle installed base to 100 million by 2028.” Aug. 2019. [Online].
ity. In a statement, imec’s scientific director said, “The Available: https://www.abiresearch.com/press/next-gen-batteries-will-power
pilot line allows us to take the next step and upscale the -electric-vehicle-installed-base-100-million-2028/
battery breakthrough to industrially relevant processes [2] Yole Développement, “Solid-State Battery Report,” June 2018. [Online].
and formats, using manufacturing processes similar to Available: https://www.i-micronews.com/products/solid-state-battery-2018/
those for wet batteries.” [3] J. E. Trevery, “Advances and development of all-solid-state lithium-ion bat-
imec said that bringing the emerging SSB battery teries,” Mechanical Engineering Graduate Theses & Dissertations, vol. 17,
technology to market will require the cooperation and Univ. Colorado, Boulder, Spring 1-1-2011. [Online]. Available: https://scholar
commitment from the world’s major materials suppliers .colorado.edu/cgi/viewcontent.cgi?article=1016&context=mcen_gradetds
and battery producers. Therefore, it performs its battery 

March 2020 z IEEE POWER ELECTRONICS MAGAZINE 19


A Novel Current-
Balancing Method for
Paralleled MOSFETs in
High-Current Solid-State
Switch Applications ©ISTOCKPHOTO.COM/ SPAINTER_VFX

Paralleling a large number of semiconductor devices


by adding inductances in series

by Alinaghi Marzoughi and Khaled Bahei-Eldin

D
ue to theoretical and practical limitations in ited number of operation cycles, yield much less power
the current rating of individual power semi- density with much higher profile compared to solid-state
conductor devices, connecting them in paral- switches, and, last but not least, need a considerable
lel to achieve higher current ratings has been amount of driving power to turn on and stay closed.
of special interest to engineers and research- The main challenge when paralleling power semicon-
ers. One of the specific application areas for high-current ductor devices is to ensure balanced static and dynamic
paralleled semiconductors is solid-state switches. There currents among them, to avoid uneven distribution of
might be a number of different reasons to use solid-state conduction/switching stresses and losses. The drain to
switches instead of the traditional mechanical contac- source on-resistance of power MOSFETs exhibits a posi-
tors in a given application. To name a few examples, the tive temperature coefficient, thus, static current sharing
mechanical contactors are inherently slow, have a lim- among devices is naturally achieved. However, nearly
equal current sharing must be ensured during turn-on and
Digital Object Identifier 10.1109/MPEL.2019.2959142
turn-off events to ensure equal switching stress and avoid
Date of current version: 19 February 2020 premature failure of the system. A variety of efforts have

20 IEEE POWER ELECTRONICS MAGAZINE z March 2020 2329-9207/20©2020IEEE


been made by researchers to paral- MOSFETs [3]. In this way, symmetri-
lel power semiconductor devices and cal layouts, i.e., star connection,
achieve higher current ratings. In [1]
The main reason would be necessary for the semicon-
and [2], active gate control is used to behind unequal tran- ductor devices to ensure equal cur-
balance the currents among parallel rent sharing. A major limitation of
sient current sharing
semiconductors. Despite its effec- this method is the number of semi-
tiveness, this method needs rigorous among paralleled conductors in parallel, where not a
processors as well as several cycles at semiconductor devices large number of devices can be
start-up to be able to balance the cur- placed in a symmetrical/star configu-
rents. The authors of [3] investigate a is mismatch in device/ ration without drastically increasing
passive solution to balance the peak circuit parameters. the resulting prototype size and its
currents between paralleled MOS- corresponding commutation loops.
FETs, caused by unequal threshold Figure 1(a) demonstrates the pro-
voltages. In a similar fashion to [3], posed method for dynamic current
in [4], the authors use inductances in series with the MOS- sharing among MOSFETs, where the objective is to equal-
FETs’ source pins to balance the switching currents. The ize summation of additional inductances in series with the
difference between the aforementioned references is that drain and source terminals of the MOSFETs. Having such
in [4], negatively coupled inductances are used for adjacent configuration, the switching currents are balanced among
devices in parallel, resulting in no change in voltage stress the paralleled MOSFETs. This method does not require a
or switching losses among the devices. Although this structure like the well-known star configuration, thus, the
method’s effectiveness is proven via experimental results,
it may result in higher cost and bulky inductors at higher
current ratings. The effectiveness of coupled inductors at
the ac point of paralleled half-bridge silicon carbide (SiC)
MOSFET modules is shown in [5]. In [6], two-level dynamic LDn
gate resistance control is used to delay switching times LD1 LDi
and, thus, balance the switching currents among paral-
leled IGBTs. This method is capable of balancing the cur-
rents within one switching cycle. Q1 Qi Qn
In this article, a novel method is proposed to par- +
allel individual power semiconductor devices in solid- +
+
state switch application, and it may be extended to icirc icirc
V1
any other low/medium switching frequency applica- LS1 LSi Vi LSn Vn
tion. The proposed method does not limit the number – – –
of devices in parallel, and, thus, very high currents
can be achieved by paralleling smaller semiconductor (a)
devices. In addition, it is implemented using low-cost
components and does not require complicated real-
time measurements/processes to balance the dynamic Gate Signal
LDi
3 × RG

2 × CG

currents among devices.


3 × LG

Proposed Dynamic Current-Balancing Method VGP


The main reason behind unequal transient current sharing Gate Qi
GND
Driver
among paralleled semiconductor devices is mismatch in VGN
device/circuit parameters. The threshold voltage of semi-

conductor devices will vary, especially as devices age.
This will cause mismatch in switching times, leading to LSi Vi
different switching currents and switching stresses. More- +
over, parasitic inductances in the commutation path, com-
posed of the parasitic inductance of the circuit traces and
the device package, play an important role in dynamic (b)
current sharing among paralleled semiconductor devices.
FIG 1 (a) The proposed method for paralleling individual MOS-
A well-known traditional practice to overcome unequal
FETs where sum of L Di and L si (i = 1fn) equals a constant
dynamic currents among paralleled semiconductor number. (b) The decoupling of power and gate signal for each
devices is to add external inductances in the commutation individual MOSFET to avoid circulating currents in gate-source
path in series with the emitter/source terminal of IGBTs/ paths of paralleled MOSFETs.

March 2020 z IEEE POWER ELECTRONICS MAGAZINE 21


practical limitation for the number of MOSFETs in paral- without facing significant voltage drop. An external capaci-
lel is eliminated, and a large number of MOSFETs can be tor with a value of 100–200 times the input capacitor (C iss) of
connected in parallel to achieve a very high-current device. the MOSFET would be proper for this purpose. Also based
Due to similar values of inductances added to drain on various simulations/experiments, it is concluded that an
and source of the MOSFETs in Figure 1(a), the dynamic R G of around 10–20 Ω works well for the proposed circuit of
currents can be well balanced (as Figure 1(b). If chosen smaller, R G may
proven later via simulations and not be able to suppress the possible
ex per iments). However, because resonance between C G and L G and
the source inductances of parallel
The CG must be select- avoid dc/lower-frequency circulating
MOSFETs are not of the same size, ed with a high-enough current components. However, if the
during the switching transients the value of the selected R G is too large,
value to be able to
voltage drop across the parasitic it will block the charging current to
inductance will be different for adja- provide the gate power C G and limit the operating switch-
cent MOSFETs. This can cause cir- during the switching ing frequency.
culating currents in the gate-source In Figure 1(b), for each of the
path of the MOSFETs, deteriorating event without facing positive/negative gate-driving volt-
both gate-source voltage and drain- significant voltage ages, the charging path is composed
source voltage waveforms of the of 2 # R G resista nce a nd 2 # L G
MOSFETs [Figure 1(a)]. Between the drop. inductance. Charging current can
two aforementioned impacts, ring- flow through the charging path at
ing added to the gate-source voltage all times, whereas discharging only
of the MOSFETs can be of more severe impact, causing happens at switching moments. Assuming that the volt-
delayed switching or damaging the gate structure of age across the capacitor C G always remains within 5%
the MOSFETs. of its nominal value (±2.5%), the power delivered to the
A practical way to stop the circulating current in capacitor via the charging path is calculated from
Figure 1(a) is by using isolated dc–dc converters for indi-
vidual MOSFETs to provide their gate-driving power. The ^VGi - 0.975 # VGi h
Pcharge = 2 # RG # 0.975 # VGi .(1)
galvanic isolation of the dc–dc converter would be a bar-
rier against the circulating current components in Figure
1(a) via the gate path. However, this would come at a high In (1), the effect of L G is neglected during charging,
and unreasonable cost, because typically the isolated dc– because the charging current is a dc component. In addition,
dc converters are more expensive than a discrete MOSFET the capacitor voltage is considered to be at its minimum
itself. Considering the high-frequency nature of the circulat- (worst case, which happens at the maximum switching fre-
ing currents in Figure 1(a) and the fact that a large inductor quency). However, the discharging component of power for
can provide a high impedance for high-frequency current C G is equal to the gate power of the MOSFET, which can be
components, as part of the proposed method an RL circuit calculated from (2). In this equation, the static power losses
is used to decouple the gate-driving power of individual in the gate-driver circuit are neglected:
MOSFETs from the high-frequency ringing point of view.
Figure 1(b) shows a low-cost impedance-based decou- Pdischarge = VGi # fSW # Q G, (2)
pling system for gate power of each individual MOSFET
to avoid the circulating currents. In this figure, VGP and where Q G is the gate charge of the MOSFET, and fSW is
VGN are the positive and negative gate-driving voltages, the switching frequency. To maintain the voltage stabil-
respectively. An inductance L G (to suppress the high- ity across C G, the charging power must be greater than
frequency ringing voltage caused by switching event on or equal to the discharging power. This will yield the fol-
L Si) is added in series with a resistance R G (to suppress lowing equation for the maximum switching frequency
the lower-frequency components and avoid possible reso- in terms of either one of the positive/negative gate-driv-
nance between L G and C G) . In addition, two capacitors ing voltages:
C G are added after the RL networks to store the energy
0.02 # VGi
required for switching of the MOSFETs. C G capacitors fSW # 2 # R # Q .(3)
G G
will be charged during the on/off state of the MOSFETs
and will be discharged during switching transients. The Note than (3) must be held valid for both VGP and VGN .
RL network will allow charge of the capacitors at a slow Also, a safety factor must be considered for the switching
rate but will block the instantaneous high-frequency cir- frequency calculated from (3), to take into account the
culating currents from flowing. static power dissipation in the gate-driver stage.
The C G must be selected with a high-enough value to be As another criterion, when designing the circuit shown
able to provide the gate power during the switching event in Figure 1(b), the inductance L G must be selected such

22 IEEE POWER ELECTRONICS MAGAZINE z March 2020


that it will limit the circulating current components. The networks are used to decouple the gate-driving voltages of
value of circulating currents will depend on the value of individual MOSFETs, where a 20-Ω resistor is connected in
inductances added in series with the source terminal of the series with a 10-nH, 1.1-A inductance. The MOSFETs under
MOSFET as well as the MOSFET’s di/dt test are IXFX90N30 from IXYS, with
rate. Once the magnitude and fre- 300-V 90-A voltage and current rat-
quency of the most extreme ringing ings. A totem-pole bipolar junction
voltages across the parasitic induc- The value of circulat- transistor (BJT)-based gate driver is
tances [V1 and Vn in Figure 1(a)] have ing currents will used for each individual MOSFET, and
been calculated, the inductor value the gate signal is isolated by means of
can be selected to limit the current
depend on the value an optocoupler. Finally, yet impor-
to low magnitudes at all frequencies. of inductances added tantly, the MOSFETs are driven with
A circulating current in the order of 10-Ω gate resistances. The maximum
a few 10s of milliamps or lower will
in series with the switching frequency feasible for the
guarantee clean switching wave- source terminal of simulated system is calculated from
forms. Special attention must be paid (3) to be around 2.7 kHz, to ensure the
the MOSFET.
to the current rating of the induc- stability of VGN .
tor, such that it does not saturate Figure 3(a) and (b) demonstrates
under the worst circulating current the turn-on and turn-off waveforms of
scenario. Typically, off-the-shelf inductors in 2512 or 1812 the paralleled MOSFETs. In this figure, VDS1, VDS2, and VDS3
surface-mount device packages are well suited to serve in are the drain to source voltages of Q 1, Q 2, and Q 3, respec-
the proposed circuit. tively. The same order is valid for the currents, where I D1,
Other than the gate power path, the gate signal path I D2, and I D3 are the drain currents for Q 1, Q 2, and Q 3 . Fig-
can also propagate the circulating current i circ shown ure 3(a) shows that during the turn-on transient, the drain
in Figure 1(a). Thus, the gate command signal also currents rise with the same slope and overlap each other.
needs to be isolated for MOSFETs in parallel. The most In a like fashion, the drain-source voltages of the paral-
practical method for implementing this feature is to use leled MOSFETs change quite similarly, which will guar-
an optocoupler-based gate-driver chip for individual antee comparable stress and switching loss for all of the
MOSFETs, which costs a fraction of what the MOSFET MOSFETs during turn-on. Figure 3(b) shows the turn-off
does and provides galvanic isolation for the gate com- waveforms where the rising slope of drain-source voltages
mand signal. match perfectly. Also, the drain currents change with the
The configuration proposed in Figure 1 enables the par- same slope, guaranteeing similar a turn-off process for
alleling of a large number of MOSFETs that can be laid in all MOSFETs. The waveforms shown in Figure 3 are cap-
linear configuration and yet share the dynamic switching tured using devices with completely matched parameters,
currents nearly perfectly equally. The next sections will to merely show the effect of mismatched inductors at the
provide simulation and experimental results to prove the drain/source of the devices (while their summation stays
validity of the proposed approach. constant) on the switching waveforms.
To evaluate the effectiveness of the decoupling circuit
Simulation Results proposed in Figure 1(b), the same circuit (Figure 2) is simu-
A system composed of three MOSFETs in parallel is lated one more time. This time the impedance-based decou-
selected for simulation study. Simulations are carried out in pling circuit is removed, and the totem-pole BJT-based gate
an LTspice environment, and Figure 2 demonstrates the sys- drivers of the paralleled MOSFETs are directly connected
tem and the values of the inductances added in series with to the same +10/–2-V supply bus. Also, the gate signal is
the drain and source terminals of the individual MOSFETs. directly fed to the base of the BJTs without optic isolation.
Although 80 nH of total parasitic inductance added in series
with a MOSFET may seem to be a large value for just three
devices, selection of this value demonstrates that under
excess mismatch in drain/source inductances between the 10 nH LD 1 40 nH LD 2 70 nH LD 3
paralleled MOSFETs, the proposed method can be used to
balance the peak switching currents (and thus, the voltage Q1 Q2 Q3
100 A
stresses) among paralleled MOSFETs. This will enable par-
allel connection of a large number of MOSFETs in a linear
(or other) layout. 70 nH LS 1 40 nH LS 2 10 nH LS 3
The gate-driving voltages in simulation are all provided
by a single 12-V power supply, suppling +10/–2 V for the on/
off state of the devices, respectively. However, in a similar FIG 2 The simulated circuit with three MOSFETs in parallel to
fashion to the circuit shown in Figure 1(b), RL impedance the switch 100-A current.

March 2020 z IEEE POWER ELECTRONICS MAGAZINE 23


Figure 4 demonstrates drain current waveforms of the Experimental Validation of the Proposed Technique
MOSFETs during turn-on, where a considerable mismatch In this section, a prototype is implemented using a total of
between drain currents is observed. The difference is not three Si MOSFETs in parallel. Based on the tests on the pro-
only in the peak current of the MOSFETs but also exists in totype, validity of the proposed approach is proven. Next, a
their rising slope. This will increase both switching losses high-speed, high-current solid-state relay is applied using a
and switching stresses on the MOSFET with smaller induc- total of 14 Si MOSFETs in parallel for use in an energy-stor-
tance at the source terminal, and eventually that MOSFET age application.
will fail before the rest.
Slower switching observed from Q 1 is due to the fact Proof of Concept at Low Currents
that higher inductance at its source causes a higher Table 1 demonstrates the design/test parameters for the
transient voltage across it [V1 in Figure 1(a)], delaying setup implemented as proof of concept. As shown in
the time to reach a fully on state for the MOSFET. A Table 1, a total of three Si MOSFETs (part number
similar imbalance in drain currents exists during turn- IPT020N10N3ATMA1) from Infineon rated at 100 V, 300 A
off, causing difference in turn-off currents and losses are used in parallel. Shunt resistors are used in series with
among the MOSFETs. each MOSFET so that its drain current can be measured.
Drain-Source Voltages (V)

200
VDS1
150 VDS2
VDS3
100
50
0
0.100025 0.10003 0.100035 0.10004 0.100045 0.10005 0.100055 0.10006
40
Drain Currents (A)

30
20
10 ID1
ID2
0 ID3
–10
0.100025 0.10003 0.100035 0.10004 0.100045 0.10005 0.100055 0.10006
Time (s)
(a)
Drain-Source Voltages (V)

200
150
100
VDS1
50 VDS2
VDS3
0
0.20006 0.200065 0.20007 0.200075 0.20008 0.200085
40
Drain Currents (A)

30 ID1
ID2
20
ID3
10
0
–10
0.20006 0.200065 0.20007 0.200075 0.20008 0.200085
Time (s)
(b)

FIG 3 The simulated waveforms of (a) turn-on and (b) turn-off switching corresponding to Q 1, Q 2, and Q 3 MOSFETs with part num-
ber IXFX90N30 under 100-A load current.

24 IEEE POWER ELECTRONICS MAGAZINE z March 2020


Drain-Source Voltages (V)

200
VDS1
150 VDS2
VDS3
100
50
0
0.100025 0.10003 0.100035 0.10004 0.100045 0.10005 0.100055 0.10006
40
Drain Currents (A)

30
20
ID1
10
ID2
0 ID3
–10
0.100025 0.10003 0.100035 0.10004 0.100045 0.10005 0.100055 0.10006
Time (s)

FIG 4 The turn-on waveforms corresponding to Q 1, Q 2, and Q 3 MOSFETs under 100-A load current when the impedance-based
decoupling circuits of Figure 1(b) and the optocouplers of the gate-driving stage are removed from the system.

The shunt resistors are in a 2512 package, and two resistors turn-on is due to the much higher current capacity of the
are paralleled per switch position to ensure minimal impact devices under test (compared to the test current), which
on parasitic inductances of the path. For each MOSFET, a brings about large output capacitance for the MOSFETs. In
separate gate-driver integrated circuit (SI8261 from Silicon this way, the discharging current of device C oss at turn-on is
Labs) with optical isolation of signal is used. A 12-V gate- larger than the actual conducted load current [7].
driving voltage is supplied to the board and is converted Similarly, the turn-off current waveforms of the board
into +10/–2-V gate-driving voltages. Also, an RLC network are captured and shown in Figure 7. Due to slower rate of
similar to the circuit shown in Figure 1(b) is used for each VDS rise for the MOSFETs (due to the power supply’s slow
MOSFET to provide its decoupled gate power. transient response), the drain-source voltages are excluded
Once the printed circuit board (PCB) is designed, sev- from this figure.
eral iterations have been made to achieve parasitic induc- Figures 6 and 7 provide experimental proof for validity
tances similar to those shown in Figure 2. For this purpose, of the proposed paralleling technique. As demonstrated in
the PCB was extracted to EMWorks software, and trace these figures, the switching waveforms of the paralleled
inductances were calculated. After several iterations, para- MOSFETs match each other during turn-on and turn-off
sitic inductances very close to the numbers shown in Fig- events. Also, using the proposed method, current sharing
ure 2 were achieved, and later, measurements on the manu- is achieved from the very first switching transient. The only
factured PCB validated the conducted calculations in the drawback of this solution is the additional switching losses
EMWorks environment. in the system due to larger inductances in switching loops,
Figure 5 shows the designed PCB, on which the values which is not a major barrier when taking into account the
for parasitic inductances are marked. The devices are ori- low switching frequency nature of the target application.
ented in a linear form, which allows paralleling a large num- In Figure 5, the gaps between MOSFETs can accommo-
ber of MOSFETs. The gaps among the individual MOSFETs date at least six more MOSFETs. This is an indicator that
are used to match the parasitic inductance values shown
in Figure 2 and create fairly large mismatch in inductance
Table 1. The design/test parameters for
values in series with the drain and source pins of the MOS- the implemented setup.
FETs, to observe performance of the proposed approach
under large variation in values of L D and L s of differ- Parameter Symbol Value
ent MOSFETs. Number of MOSFETs in parallel n 3
Figure 6(a) and (b) demonstrates the turn-on waveforms MOSFETs under test Q 1–Q 3 IPT020N10N3ATMA1
of the MOSFETs under a 9-A load current. In a similar Test voltage Vdc 60 V
fashion to the simulation results, the experimental cur- Test current I dc 9A
rents and voltages match very well with each other. This
Positive gate-driving voltage VGP 10 V
ensures product reliability and similar rate of aging for the
Negative gate-driving voltage VGN –2 V
MOSFETs in parallel. In Figure 6, the high-current spike at

March 2020 z IEEE POWER ELECTRONICS MAGAZINE 25


acid/lithium-ion battery applications. There
were several motivations behind this
LD3~70 nH design. First, the conventional mechanical
contactors have a high profile, which
LD 2~40 nH
LD 1~10 nH Q3 requires allocation of a considerable
Q1 Q2
amount of space for them in the battery
LS1~10 nH compartment, which in turn reduces the
LS 2~40 nH
battery capacity. Next, the mechanical con-
tactors are slower in comparison and
LS 3~70 nH
require tens to hundreds of milliseconds to
open/close. In short circuit-sensitive appli-
cations, i.e., applications using lithium-ion
FIG 5 The designed PCB with three MOSFETs in parallel. batteries, this time can be detrimental to
the safety of the system. Thanks to the fast
switching speeds of power semiconductor devices, the
70 solid-state relays can act in a few hundreds of nanoseconds,
60 VDS1 which is significantly less in comparison and can provide
VDS2
Drain-Source Voltages (V)

better protection for battery/equipment. Finally, yet impor-


50 VDS3
tantly, the solid-state relay has a smaller driving power
40 requirement. Typically, several watts of power are needed to
30 activate the coil in mechanical contactors, whereas the volt-
age-controlled MOSFETs consume almost no power in
20
steady state. This helps improve the overall battery life and
10 system efficiency.
0 Figure 8 shows a solid-state switch implemented using
14 Si MOSFETs in parallel, intended to operate at currents
–10
0 2 4 6 8 up to 600-A dc and 1,000-A transient (under short circuit
Time (s) ×10–7 conditions, and so on). Selection of 14 MOSFETs in parallel
(a) is because the MOSFETs are needed to operate in the linear
60 region at turn-off and absorb the energy of the significant
ID1 voltage spike due to the parasitic inductances of the large
50
ID2 cables in the system. Zener diode clamping is used to oper-
ID3
40 ate the devices in the linear region and dissipate the excess
Drain Currents (A)

amount of energy in the system [8]. Busbars are used in the


30
system to conduct the current, because the high rated cur-
20 rent could not be handled using PCB traces. To achieve a
better form factor and avoid extreme parasitic inductances
10
in series with the devices, the 14 MOSFETs are divided into
0 two batches and placed in two rows.
The designed high-current solid-state switch of Figure 8
–10
0 2 4 6 8 was tested under a variety of conditions including nomi-
Time (s) ×10–7 nal and short circuit currents and elevated temperatures.
(b) The power-cycling test was also performed on more than
one prototype, and satisfactory results were obtained.
FIG 6 The experimental waveforms of (a) turn-on voltages This product is still in its early design stages; there-
and (b) turn-on currents of the parallel MOSFETs under 10-A fore, no experimental test results are being reported
load current.
from its operation.

the proposed method can be used for much larger number Conclusions
of MOSFETs in parallel than the three MOSFETs shown in This article proposed a new method for paralleling power
Figure 5. All that is needed for paralleling the MOSFETs semiconductor devices in solid-state switch application.
using this method is to simply place them in a linear layout. Although it can be applied to any other application that
requires low/medium switching frequencies, the proposed
High-Current Solid-State Relay technique adds inductances in series with the drain and
With the proof of concept for the proposed method, a high- source terminals of semiconductor devices to equalize the
current solid-state switch was designed to be used in lead- dynamic currents among them. The added inductances do

26 IEEE POWER ELECTRONICS MAGAZINE z March 2020


respectively, and his Ph.D. degree in electrical engineer-
3.5 ing from the Center for Power Electronics Systems at Vir-
3 ID1 ginia Tech, Blacksburg, in 2017. He is currently with
ID2 Enersys, Reading, Pennsylvania, as a systems integration
2.5
Drain Currents (A)

ID3 manager. His areas of interest include power electronic


2
converter modeling and control, wide-bandgap semicon-
1.5 ductors, and grid interface for renewable energy and
1 energy-storage systems.
0.5 Khaled Bahei-Eldin (Khaled.Bahei-Eldin@enersys
0 .com) received his B.S. degrees in electrical and computer
engineering from North Carolina State University, Raleigh,
–0.5
2 2.5 3 3.5 4 4.5 and his M.S. degree in electrical engineering from the Geor-
Time (s) ×10–7 gia Institute of Technology, Atlanta, in 2004 and 2008,
respectively. He has been the director of engineering for
FIG 7 The experimental waveforms of turn-off currents of the energy storage systems at EnerSys, Reading, Pennsylvania,
paralleled MOSFETs under 10-A load current. since 2017. Prior to joining EnerSys, he spent 13 years with
General Electric in a variety of roles in the energy industry
and corporate R&D, including manager of power systems
research, product manager for wind and solar converter life-
cycle, and monitoring and diagnostics software leader for
the wind business.

References
[1] D. Bortis, J. Biela, and J. W. Kolar, “Active gate control for current balanc-
ing of parallel-connected IGBT modules in solid-state modulators,” IEEE
Trans. Plasma Sci., vol. 36, no. 5, pp. 2632–2637, Oct. 2008. doi: 10.1109/
TPS.2008.2003971.
[2] Y. Xue, J. Lu, Z. Wang, L. M. Tolbert, B. J. Blalock and F. Wang, “Active
current balancing for parallel-connected silicon carbide MOSFETs,” in
Proc. 2013 IEEE Energy Conversion Congr. Exposition, Denver, CO, pp.
1563–1569. doi: 10.1109/ECCE.2013.6646891.
FIG 8 The solid-state switch composed of 14 MOSFETs in parallel.
[3] Y. Mao, Z. Miao, C. Wang, and K. D. T. Ngo, “Passive balancing of peak
currents between paralleled MOSFETs with unequal threshold voltages,”
not need to be identical. In fact, nearly perfect current shar- IEEE Trans. Power Electron., vol. 32, no. 5, pp. 3273–3277, May 2017. doi:
ing among parallel MOSFETs was achieved by ensuring 10.1109/TPEL.2016.2646323.
equality of the summation of the added inductances to the [4] Y. Mao, Z. Miao, C. Wang, and K. D. T. Ngo, “Balancing of peak currents
drain and source terminals of the MOSFETs. A very low- between paralleled SiC MOSFETs by drive-source resistors and coupled
cost impedance network was used to decouple the gate power-source inductors,” IEEE Trans. Ind. Electron., vol. 64, no. 10, pp.
power of individual MOSFETs to prevent a circulating cur- 8334–8343, Oct. 2017. doi: 10.1109/TIE.2017.2716868.
rent that could otherwise flow via the gate path. Validity of [5] S. Lu, X. Deng, S. Li and E. Rong, “A passive transient current balancing
the proposed method and its effectiveness in achieving method for multiple paralleled SiC-MOSFET half-bridge modules,” in Proc.
dynamic current balance among paralleled MOSFETs was 2019 IEEE Applied Power Electronics Conf. Exposition (APEC), Anaheim,
proven via simulations and experiments. A high-current CA, pp. 349–353. doi: 10.1109/APEC.2019.8721897.
solid-state switch prototype was also demonstrated that has [6] M. Sasaki, H. Nishio and W. T. Ng, “Dynamic gate resistance control
been designed as a commercial product for 600-A continu- for current balancing in parallel connected IGBTs,” in Proc. 2013 Twenty-
ous and 1,000-A transient currents. The simulation/experi- Eighth Annu. IEEE Applied Power Electronics Conf. Exposition (APEC),
mental results presented in this article employed Si MOS- Long Beach, CA, pp. 244–249. doi: 10.1109/APEC.2013.6520216.
FETs. However, the proposed method is not limited to sili- [7] A. Marzoughi, R. Burgos, and D. Boroyevich, “Active gate-driver with dv/
con-based semiconductors and can be applied to dt controller for dynamic voltage balancing in series-connected SiC MOS-
state-of-the-art wide-bandgap semiconductor devices (i.e., FETs,” IEEE Trans. Ind. Electron., vol. 66, no. 4, pp. 2488–2498, Apr. 2019.
SiC MOSFETs) as well. doi: 10.1109/TIE.2018.2842753.
[8] T Lu, Z Zhao, S Ji, H Yu and L Yuan, “Parameter design of voltage balanc-
About the Authors ing circuit for series connected HV-IGBTs,” in Proc. 7th Int. Power Electron-
Alinaghi Marzoughi (Marzoughi.ee@gmail.com) ics and Motion Control Conf., Harbin, 2012, pp. 1502–1507. doi: 10.1109/
received his B.S. and M.S. degrees in electrical engineer- IPEMC.2012.6258983
ing from the University of Tehran, Iran, in 2010 and 2013, 

March 2020 z IEEE POWER ELECTRONICS MAGAZINE 27


Generate and Analyze
Standard Testing for
Power Supply Quality

by Brian Hsu and Jorge Velazquez

©ISTOCKPHOTO.COM/OLM26250

S
Determining how ensitive and often vital electronic devices—to
the extent they are not battery powered—
equipment is affected mostly rely on the public power grid and some-
what less on industrial or private ac sources.
enables better protection Another source is the large inverter installa-
and greater customer tions that produce line current from dc sources and that
have come about as wind and solar power generation
satisfaction have grown. The inverter installations generally feed
into the public power grid as part of its large collective
array of generation points. One other important power
source is in military and civilian aircraft, which mostly
rely on MIL-STD-704 for distributed onboard power,
Digital Object Identifier 10.1109/MPEL.2019.2959099
most often in the form of single-phase 115/120 V at 400 Hz.
Date of current version: 19 February 2020 In recent times, this has been supplemented by additional

28 IEEE POWER ELECTRONICS MAGAZINE z March 2020 2329-9207/20©2020IEEE


types of outputs, such as three-phase 400 Hz, 28 VDC, IEC 61000-4-28 addresses the immunity of devices to
and several others. variations in the frequency of their ac power sources. Like
All of these sources are prone to errors, such as dips, IEC 61000-4-14, it is considered a basic test standard. The
sags, brownouts, voltage and/or frequency variations, and tests specified by IEC 61000-4-28 help meet generic stan-
interruptions that can affect the operation of electronic dards called for under the EMC directive. They also pro-
devices. The European Union Electromagnetic Compatibil- vide, if followed completely, a high level of confidence
ity (EMC) directive addresses these issues along with other and reliability that can help assure conformance with the
compatibility matters. The result has been that the Inter- EMC directive’s protection requirements. However, even
national Electrotechnical Commission (IEC) has come up if a device meets the product or generic standards listed
with a set of standards by which devices can be tested and by the EMC directive, it could still be unreliable or fail in
certified to comply with requirements for protection. real life because it is not sufficiently immune to the actual
electromagnetic environments in which it is normally used.
Test Standards Address ac Fault Protection Variations in the frequency of ac power sources are related
The test standards that directly address these issues are IEC to the rotational speed of the generators, which increase
61000-4-11, IEC 61000-4-14, IEC 61000-4-28, and the Aircraft and decrease in response to the multiple loads on the sys-
Electric Power Characteristics standard, MIL-STD-704F (the tem. Because the frequency of ac mains supplies is usually
latest version). 50–60 Hz, the effects they will have on equipment are fairly
IEC 61000-4-11 is the standard for testing for immunity simple to calculate. However, the problems that ac power fre-
(or susceptibility) to voltage variations. Variations includ- quency variations can cause should not be underestimated [3].
ing dips, dropouts, sags, and interruptions are the most For example, control systems that use the ac frequency
common forms of disturbance in the mains supply and are as a timing reference can enter error states or fall out of
often caused by load switching, use synch with other elements in a sys-
increases/decreases, and other tran- tem that is controlled by a more accu-
sient interruptions. Such faults are rate dc timing source. AC motors
considered the most common causes IEC 61000-4-11’s com- increase and decrease rotational
of poor mains supply quality. prehensive and varied speed according to frequency, which
IEC 61000-4-11’s comprehensive can affect their ability to handle
and varied set of tests enables detec-
set of tests enables loads. Frequency variations can also
tion of problems in great detail and detection of problems adversely affect other electrome-
focuses on the particular type of chanical elements, such as transform-
error. Although this set of tests and
in great detail and ers or relays, depending on their indi-
levels goes beyond what is generically focuses on the particu- vidual characteristics.
required by most common immunity The MIL-STD-704 standard is now
lar type of error.
standards, they set a level of compli- up to revision F. The new revision,
ance that can go a long way toward however, does not negate the earlier
assuring reliability and customer sat- versions. Aircraft systems have long
isfaction. As compliance with these standards has become lives, and they are not renovated every time a revision to the
more widely required, a need for integrated test equipment standard is adopted. Therefore, it is very important to know
has been created, for example, the Preen AFV-P Series what revision of the power platform an aircraft is using
from AC Power Corp., to ease the burden on developers before testing for compliance to the standard. Although it
and manufacturers. is an American military standard, MIL-STD-704 has been
IEC 61000-4-14 is directed at detecting the effects of adopted by a number of countries around the world, includ-
disturbances in the mains supply voltage and is often ing China [4].
referred to as a basic test standard [1]. The voltage fluctu- The standard originally described a voltage waveform
ations addressed by IEC 61000-4-14 are commonly caused of 150/120 V at 400 Hz. Six additional specifications were
by randomly varying heavy loads like arc furnaces, roll- added later, including a three-phase version, two 115-V
ing mills, or large motors with varying loads—things that variable-frequency versions, a 115-V/60-Hz version, and two
can cause voltage drops until the supply can compensate. dc versions—270 VDC and 28 VDC. The variations on the
A common symptom is transient flicker in a lighting sys- MIL-STD-704 standard describe the power characteristics
tem, so IEC 61000-4-14 offers a basic immunity test for of various classes of aircraft systems. They do not, however,
voltage fluctuations. Although IEC 61000-4-14 is a test describe tests for those systems. Instead, a series of hand-
method, the EMC standard the testing must meet includes books describe the tests. For example, the handbook MIL-
the generic requirements plus those for the product stan- HDBK-704F-2 defines tests for single-phase 115-V 400-Hz
dard. The product-family standard determines the volt- systems. Handbooks are available for each class of aircraft
age fluctuation levels and duration for which the product power system described by the standard and should be used
is tested for conformity [2]. for the proper version and revision of that standard (Figure 1).

March 2020 z IEEE POWER ELECTRONICS MAGAZINE 29


True rms Frequency Power Spectrum Distortion
Oscilloscope
Voltmeter Counter Meter Analyzer Meter
(See Note 3)
(See Note 3) (See Note 3) (See Note 3) (See Note 3) (See Note 3)

Current
Transformer Unit Under Test
See Note 1 (UUT)
Adjustable A
ac Power A
Supply Circuit Breaker
N
N

(See Note 5) 10 cm
See Note 2 Chassis
Caution
GND
Ground Plane
Notes:
1) Voltage measurements shall be made within 10 cm of UUT input power terminals. Stimulation and
Monitoring Equipment
2) Caution: Verify suitability of power supply NEUTRAL and GROUND connections.
(See Note 4)
3) Caution: Verify suitability of instrumentation inputs and/or use appropriate attenuation.
4) Stimulation and monitoring equipment are user defined. This functional block shall provide appropriate inputs (stimulations)
and monitor UUT outputs (e.g., RPM, signals, data, and so forth).
5) If current waveform limits are imposed by the detailed performance specification, the ac power source shall be a rotating
machine.

FIG 1 The general power testing setup from MIL-HDBK-704-2. The handbook specifies a setup with appropriate instrumentation
and connections for each specified test. The Preen AFV-P Series enables the programming of tests and allows the display of input
waveforms to the device under test (DUT). The user can then coordinate analysis between results on the DUT and the output of the
test generator. (Source: MIL-HDBK-704-2 standard; used with permission.)

Standard Tests Require Standard Parameters uating power quality. Power can be considered of good qual-
AC fault detection involves exposing the UUT to a power ity when it maintains a steady supply voltage that stays
source with known, induced faults and detecting how they within the prescribed range (e.g., 115–120 V) and has a
affect the equipment. The testing recognizes that no ac steady ac frequency close to the rated value (e.g., 50 or
sources are ideal, which in turn requires standards for eval- 60 Hz), with a smooth and steady voltage waveform.
To ensure that different power quality instruments
use the same definitions of parameters and measurement
techniques, IEC 61000-4-30 has further defined methods
for 50- and 60-Hz power measurement so that all compli-
ant instruments will give the same readings. Among the
60% of VNOM various parameters, some of which are detailed later, are
harmonics, flicker, frequency, voltage variations including
dips/sags, spikes and swells, and short interruptions.
Voltage dips or sags are an important consideration cov-
ered by IEC 61000-4-11. A dip (as distinguished from the lon-
20 ms ger-lasting sag) is a brief reduction caused by such things as
load switching or fault clearance in the ac mains supply. It
FIG 2 A 40% dip with 20-ms duration, as specified in IEC
is defined as a 10–90% reduction in root-mean-square (rms)
61000-4-11 tests, started and ended at zero crossings. How-
ever, real-life dips can start and end at any phase angle. This voltage for 0.5 cycle up to 1 min. Using the IEC 61000-4-11 test-
and similar disturbances to the supply power can be pro- ing standards, dips are started and finished at zero crossing,
grammed into the Preen AFV-P test devices. but in practice they can occur at any phase angle. They can

30 IEEE POWER ELECTRONICS MAGAZINE z March 2020


also occur abruptly or have more gradual rates of change, supplies can change frequency significantly when loads are
although testing is done using abrupt dips. For example, the applied. Small home generators, for example, audibly change
dip in Figure 2 shows a 40% dip (20% on each phase) lasting pitch when a significant load is turned on. Inverter-based
20 ms and resulting in 60% of normal voltage. sources like UPSs have their frequencies set by their internal
A dropout or short interruption is defined as a dip that circuitry, so these are mostly unaffected by load changes.
lasts up to 1 min and is between 95 and 100% deep. Drop- Equipment that relies on the supply frequency for tim-
outs are also mostly the result of load switching and fault ing can experience errors or fall out of synchronization
clearance as well as switching between mains and alterna-
tive supplies, such as emergency backup systems or uninter-
ruptible power supplies (UPSs). As in dip testing, dropouts
are applied at zero crossing, such as in the 60-ms example
Figure 3 shows, but can happen at any phase angle. A drop-
out that lasts longer than 1 min is not covered by the testing
standard and is commonly referred to as a power failure.
Voltage variations also include the longer-lasting and
slowly varying sags (or brownouts) and swells, which can 60 ms
occur over periods of hours. Although sags and swells can
briefly go as low as 0 V, they would also be considered power
FIG 3 A 60-ms short dropout. The Preen AFV-P Series is set up
failures if the duration exceeds a minute (Figure 4). Swells to trigger on the 0° phase angle but can be programmed for
are different from transient surges or spikes, which typi- any phase angle as well.
cally last for less than 1 ms. Most mains supplies have a tol-
erance—typically ±6%—and equipment should be designed
and tested with that in mind. IEC 61000-4-11 does not specify
Volts rms
any swells testing, but sags can be a problem for ac motors
and for some dc motors due to possible stalling. Although 230 V
most motor controls have undervoltage trips to prevent that,
sags can still cause outages that affect operations.
Variations in supply frequency can arise from the rota-
tional generators. For example, if a generator’s speed 115 V
changes due to a suddenly connected large load, a variation
can occur. AC generation systems (other than large public
utilities) can experience their own frequency variations.
These systems include the small generators that homes or s
businesses use during power outages, hospital emergency 1 2 3 4 5 6
backup systems, and independent power facilities for server
farms, military installations, and the like. Such power FIG 4 A sag test showing a 50% sag with a duration of 1 s.

Mains
Supply

When Mains
Unregulated dc Input Supply Dip
Occurs
(60 ms)
V

3.3 V

When Input Voltage


3.3-V Minimum Voltage Drops Below the
Regulator’s Required for the 3.3-V
Threshold, Circuit
Output ICs Function Properly
Malfunctions May Occur
Voltage

FIG 5 An example of a 3.3-V circuit shows how dips and dropouts can cause malfunctions in the internal electronics of the DUT.

March 2020 z IEEE POWER ELECTRONICS MAGAZINE 31


with other elements of a system, such as a dc motor. Fre- problems like relays and contacts malfunctioning and
quency directly influences ac motor speed, and frequency errors in routines that rely on mains cycle counting for tim-
variations can affect the behavior of internal tuned filters ing if a supply causes a subsequent dip in the unregulated
or the magnetic saturation of transformers if they go past dc. The dip in unregulated dc power will in turn result in a
given limits for a certain amount of time. drop in the voltage regulator’s output voltage that goes
below that needed by the device’s integrated circuits (ICs).
Example of a Test Setup Such an output voltage drop then causes unpredictable
Let’s look at a typical test setup as an example testing for malfunctions (Figure 5). Because one of the most severe
dips and dropouts. Dips in the mains supply can cause effects of a voltage interruption can be the inrush current
following a serious dip, sufficient testing
for such interruptions must be performed.
The major components of the setup are
ac Supply to EUT a clean mains ac power source, a test gen-
erator, the UUT [or equipment under test
(EUT)], and the appropriate instruments,
EUT
including an rms voltmeter, an oscillo-
Mains Dip/Dropout Transient scope, a frequency counter, and so on. As
Precompliance Test
noted earlier, these are all integrated and
under control of user programs in the
Preen AFV-P Series. A sample setup is
shown in Figure 6. The ac mains supply
must be monitored and shown to be within
From a Clean 2% of its nominal value. It must also be
Mains Supply
capable of supplying the required inrush
current for adequate testing.
FIG 6 A test setup for dips and dropouts. Each test requires a clean (as possible)
mains ac supply and a test generator device, such as the Preen AVF-P Series from The maximum required capability for
AC Power Corp., appropriate to the test as well as the appropriate instrumenta- a test generator is 500 A for 250 V but can be
tion to monitor and record the results. less under certain specific circumstances.

Source of Mains
Standard Pulse Variable Transformers Power Supply
Generator as Are Used to Set the
Signal Source Dip Level/Dropout, or L N E
Normal Mains Level

Zero-Crossing
Solid-State
Switch Module

L Variable Transformer
Mains Power Supply to Set the Nominal
Connected to EUT N Mains Level
E

FIG 7 A block diagram of a dip and dropout test generator. Note the second variable transformer to set the level of the dip or drop-
out and the circuitry to detect and trigger the dips at zero crossing as specified in IEC 61000-4-11. This, of course, requires user
setup with separate instrumentation and display support and ultimately more expense and time spent on thorough testing.

32 IEEE POWER ELECTRONICS MAGAZINE z March 2020


In such cases, the product’s actual voltmeters, oscilloscopes, and fre-
inrush characteristic must be less than quency counters to analyze the effects
70% of the generator’s output capabil-
To perform tests that of the programmed errors on the
ity. In addition, the test generator can be evaluated using DUT, all under the control of a user
should be capable of starting and end- program. The user program enables
the IEC standards, it is
ing the tests at mains zero crossings the setup of tests, for example, one
with an accuracy of ±10%. The Preen necessary to follow the for introducing an error of increas-
AVF-P Series from AC Power Corp. generic or product- ing severity and observing where the
meets all of these requirements. The effects on the DUT become critical.
Figure 7 block diagram shows that one family standards and Appliance manufacturers find it
of the two variable transformers can perform each test is very time consuming and finan-
be set to the desired dip level. Solid- cially burdensome to send their test
state switching circuits can used to three times with 10 s unit back and forth to testing labs.
cause that dip at zero crossings, as between tests. However, by employing a program-
Figure 7 indicates. Such a test genera- mable ac power source with a pre-
tor can only switch whole numbers of compliance testing function, manu-
half-cycles, which is presently con- facturers can take advantage of a
sidered adequate. There are a number of test generators useful solution for product verification and modification.
commercially available, but because the tests do not involve The Preen AFV-P Series from AC Power Corp. comes with
high frequencies, many choose to construct their own dip an IEC 61000-4-11 testing function for precompliance
and dropout testers that meet the IEC requirements. A com- testing, design verification, and quality assurance for a
plete solution is described in the next section. (The Figure 7 full range of target devices including motor-driven equip-
block diagram shown here does not constitute a schematic ment. It supports continuous voltage adjustment from 0
for such a product.) to 310 VAC and an output frequency range of 40–500 Hz,
To perform tests that can be evaluated using the IEC or optionally 15–1,000 Hz. In addition, it includes pro-
standards, it is necessary to follow the generic or product- grammable setup and control with a graphical user inter-
family standards and perform each test three times with face and standard connectivity to RS323, RS485, USB,
10 s between tests. The results can then be compared to the and Ethernet.
published standards and evaluated. In addition, all results The Preen AFV-P Series thus combines a stable, adjust-
should be recorded and included in a report to be submit- able power supply with a comprehensive test generator
ted for possible evaluation and/or certification processes or and recorder in a single unit. The supply, which provides
simply for company data to be used for development or sup-
plied to customers.
The effects of a poor or disturbed ac mains supply are
considered to be the most significant cause of damage and
downtime to electrical equipment. Quantifiable testing
for these effects according to international standards
significantly raises confidence that the tested equipment
will continue to operate in the real world, despite all but (a)
the most significant disturbances. Such testing also aids
designers in detecting and correcting for unforeseen effects
on the internal electronics of their products.

Programmable ac Power Source Offers


Full Testing Solution to Meet the Industry
Power Quality Standards
Extensive testing, analysis, and documentation are required
to meet the growing demand for compliance with the IEC
power quality standards, increasing the burden for develop-
ers and manufacturers. The Preen AFV-P Series programma-
ble ac power source, from AC Power Corp., integrates the (b)
generation of tests and displays their input to the DUT to
FIG 8 The Preen AFV-P Series from AC Power Corp. provides user-
ease that burden, saving time and money while increasing
selectable test setup, display, and recording for a wide variety of
accuracy to create a significant advantage. power supply test and analysis applications. Photos of the Preen
The user can observe the waveform being sent to the (a) AFV-P-2500 and (b) AFV-P-5000 power source models. (Source:
DUT and use the results detected by instruments like AC Power Corp.; used with permission.)

March 2020 z IEEE POWER ELECTRONICS MAGAZINE 33


Voltage Step Frequency Step
Frequency 1 Frequency 2 Frequency 3
Voltage 1
Voltage 2
Voltage 1

Time 1 Time 2 Time 3 Time 1 Time 2 Time 3

Step 1 Step 2 Step 3 Step 1 Step 2 Step 3

FIG 9 An example of software-controlled waveform inputs that can be set up using the Preen AFV-P Series. (Source: AC Power
Corp.; used with permission.)

clean power with a distortion of less than 0.3% at 50/60 Hz, and IEC 61000-4-28 addresses the immunity of devices to
is programmable for a full range of tests. For instance, it is variations in the frequency of their ac power sources. MIL-
possible to simulate real-world conditions by changing volt- STD-704F defines power characteristics for aircraft sys-
age and frequency by ramping up or down or by a series of tems. One solution to achieve stable power quality is to use
distinct steps in any combination of voltage and frequency. a programmable ac power source that meets the parame-
Further aiding analysis, the unit can then display the output ters outlined by the test standards, satisfying the conditions
waveform and precise measurement readings [5]. for critical aerospace, defense, and industrial applications.
Users can also set up and trigger power line disturbances
for the EUT. These include transient events, such as sags, About the Authors
surges, and dropouts of selected severity and duration, which Brian Hsu (brian.hsu@acpower.net) received his M.S.
according to IEC 61000-4-11 are to occur at zero-degree cross- degree in mechanical engineering from Taiwan University,
ing. However, it is also possible to set the events to occur at Taipei City, in 2003. He is a product marketing manager at
any desired degree from 0° to 359°. To meet the requirements AC Power Corporation, Taipei, Taiwan, and a coauthor of
for IEC 61000-4-11 precompliance tests, the Preen AFV-P two patents for an electrical energy management device:
Series features a fast response time of less than 300 µs as well U.S. Patent number US20 050 118 472 and Taiwan Patent
as the ability to automatically record test results. number TW200 520 282.
Certain motor-type products or appliances may require Jorge Velazquez (jorge.vela@acpower.net) received his
higher inrush current (or start-up current) upon start-up. B.S. degree in electrical engineering from California State
The Preen AFV-P Series is capable of optional 150% over- Polytechnic University, Pomona, in 2018. He is a field appli-
load capacity within 1 s. That may help if the motor has cations engineer at AC Power Corporation, Taipei, Taiwan.
certain inrush current within a couple of milliseconds and
back to the rated current. References
The Preen AFV-P Series can be controlled from an [1] Handbook on EN 61000-4-14 Mains Voltage Fluctuations, REO (UK)
attached computer or over the network using the supplied Ltd., Craven Arms, U.K., 2007, p. 2. [Online]. Available: https://www.reo
software and a LabVIEW driver (see Figures 8 and 9). It can .co.uk/en_61000-4-11_voltage_variations
also be controlled directly via the built-in graphical HMI [2] A Practical Guide for EN 61000-4-11 Testing and Measurement Tech-
on its 5-in touchscreen with no additional programming. niques, REO (UK) Ltd., Craven Arms, U.K., 2007, pp. 2–12. [Online]. Avail-
A rotary knob is supplied on the front panel for precision able: https://www.reo.co.uk/en_61000-4-11_voltage_variations
adjustments. All in all, the Preen AFV-P Series offers a com- [3] A Practical Guide for EN61000-4-28: Power Frequency Variation, REO
plete test solution for ac and dc power quality and precompli- (UK) Ltd., Craven Arms, U.K., pp. 2–26. [Online]. Available: https://www.reo
ance with IEC 61000-4-11 requirements. Using this or similar .co.uk/en_61000-4-28_immunity_to_power_frequency_variatio
equipment can potentially save product development time. [4] Department of Defense Handbook: Guidance for Test Procedures for
Demonstration of Utilization Equipment Compliance to Aircraft Electri-
Summary cal Power Characteristics Single Phase, 400 Hz, 115 Volt, HDBK-704-2,
Critical applications in aerospace, defense, and industrial U.S Department of Defense, Washington, D.C., 2004, pp. 2–97. [Online]. Avail-
segments demand reliable quality power sources. Test stan- able: http://everyspec.com/MIL-HDBK/MIL-HDBK-0700-0799/download.
dards including IEC 61000-4-11, IEC 61000-4-14, IEC 61000- php?spec=MIL-HDBK-704-2.014611.PDF
4-28, and MIL-STD-704F define power quality and the test [5] AFV-P Series: High-Performance Programmable AC Power Source, AC
procedures. IEC 61000-4-11 is the standard for testing Power Corp., Taipei, Taiwan, 2019. [Online]. Available: https://www.preenpower
immunity to voltage variations like dips, dropouts, sags, and .com/en/product/1560842500046/1570244319172
interruptions; IEC 61000-4-14 tests for voltage fluctuations; 

34 IEEE POWER ELECTRONICS MAGAZINE z March 2020


Modeling the Magnetic
Behavior of N-Winding
Components
Approaches for unshackling
switching superheroes

by Alex J. Hanson and


David J. Perreault

T
he cover of the March 2015 issue of IEEE fundamental scaling laws that oppose miniaturization—a
©ISTOCKPHOTO.COM/GAZOMET

Power Electronics Magazine portrayed gallium half-size magnetic component can process less than half
nitride (GaN) and silicon carbide (SiC) switch- of the power [1]. Other components have been more read-
ing devices as superheroes, able to make ily miniaturized by advances in materials, manufacturing,
“next-generation power electronics smaller, semiconductor devices, and operating frequencies. Mean-
faster, and more efficient” in a single bound. Indeed, they while, magnetics remain stubbornly large and lossy—an
are largely doing so, in conjunction with improved compo- even greater bottleneck than before. It is not uncommon
nents and integrated circuits, better packaging, and more in sophisticated, modern power converter designs to have
sophisticated circuit design and control. approximately half of the volume and power losses arising
Despite this tremendous progress, magnetics remain from inductors and transformers. Visualizing this trend,
an important bottleneck in power electronics. In some our colleague has portrayed magnetics as a ball-and-chain
ways, this is inevitable. Magnetic components suffer from locked around the ankles of the GaN and SiC superheroes
(Figure 1) [2].
Digital Object Identifier 10.1109/MPEL.2019.2959356
Given this increasingly severe magnetic bottleneck, it is
Date of current version: 19 February 2020 becoming imperative to make maximum use of magnetic

2329-9207/20©2020IEEE March 2020 z IEEE POWER ELECTRONICS MAGAZINE 35


capabilities, such as achieving multiple functions from a 1) mathematical representations
single component (for example, using so-called integrated 2) necessary-and-sufficient circuit representations
magnetics [3]). Magnetic components are relied upon to 3) physical circuit representations.
support multiple inputs/outputs (for instance, interfac- For all three representations, single-winding structures
ing with a renewable energy source, a load, and a battery) (inductors) reduce to the same thing, that is, a single induc-
[4]. They also allow the use of multiple voltage/current tance L represents the entire structure. The differences
domains within a circuit to take advantage of good fig- become clearer when a second winding is added to form a
ure-of-merit switches at high frequency [5], [6], advanta- transformer (see “Different ‘Types’ of Transformers”). The
geously spread out heat dissipation [7], or compress appar- transformer can be represented by a set of coupled equations
ent impedance ranges [8]. In a great many of these cases,
: D =; E ; E, (1)
v1 L 11 L 12 d i 1
more functionality means more complicated magnetic
v2 L 21 L 22 dt i 2
components with more windings.
It is well known that magnetic components with mul- where the inductance matrix comprises the mathematical
tiple windings do not have simple behavior, and as switch- representation. This representation fully captures the effect
ing frequencies increase and designs become more sophis- of inductive coupling among multiple electrical ports. By
ticated, the importance of these more-complex behaviors reciprocity [13], an inductance matrix must be symmetric,
becomes increasingly central. In this article, we review with L mn = L nm, which means there are M (M + 1)/2 inde-
valuable techniques for modeling the magnetic behavior pendent parameters in an M-winding structure. While inde-
of inductors and especially multiport components (such pendent, these parameters are nonetheless bound by the
as transformers), highlighting each approach’s advantages limitations of physics. For example, by conservation of
in component design, circuit application, and experimen- energy, the inductance matrix must be positive semidefi-
tal characterization. Here, we only model the behavior of nite, yielding L 11 $ 0, L 22 $ 0, and ; L 12 ; # L 11 L 22 in the
magnetic coupling and energy storage within a compo- two-port case.
nent; there are many further aspects we do not discuss, While the inductance matrix is a useful mathematical
such as capacitance modeling [9], winding loss modeling description, it is not conducive to circuit analysis and design
[10], [11], and core loss modeling [12], though these can or to synthesis of magnetic components. To this end, the
often be treated separately and appended to these models. inductance matrix can also be represented by a “necessary-
and-sufficient” equivalent circuit composed of inductors
Modeling Magnetic Components and ideal transformers. We call such models necessary and
There are several ways to represent magnetic components, sufficient because they have the exact number of indepen-
including dent parameters needed to represent a magnetic structure.
For a two-winding transformer, necessary-and-sufficient
models can be constructed with each of the T  model, the
Pi model, and the Cantilever model (Figure 2). These circuits
will yield identical results to each other and to the mathe-
matical representation.
Perhaps the most familiar of these is the T model, though
it is more typically shown with inductor L B reflected
through the transformer to the secondary side (with an
appropriate scaling of the inductance value). Defining
the turns ratio N 1 /N 2 = N, it is straightforward to show
that the inductance matrix description can be related to
the circuit model parameters as follows: L 11 = L A + L C,
L 22 = (L B + L C)/N 2, and L 12 = L 21 = L C /N and the inverse
L A = L 11 - NL 12 , L B = N 2 L 22 - NL 12 , and L C = NL 12 .
It can be seen that—including the turns ratio N — the
T  model actually has four parameters that can be used
to fit the three free parameters of the inductance matrix.
One is not constrained to choose N to be the physi-
cal turns ratio of the transformer, and sometimes the
physical turns ratio is not known. A frequent nonphysi-
cal choice for N is 1, which results in very simple rela-
tionships between the remaining three parameters (the
FIG 1 A cartoon showing how the potential for advances, such inductances) and the inductance matrix: L A = L 11 - L 12 ,
as GaN and SiC, to elevate system-level performance is often L B = L 22 - L 12 , and L C = L 12 . Such a model can yield nega-
limited by the magnetic components. (Figure used courtesy of [2].) tive inductance values (as long as conservation of energy

36 IEEE POWER ELECTRONICS MAGAZINE z March 2020


Different “Types” of Transformers
All N-winding magnetic structures based on electromagnetic induction Other good examples include instrumentation transformers. A
may be modeled in the same way. Nevertheless, it is common to see current transformer is typically designed with a single-turn primary
them referred to by their intended application—flyback transformers, and a small resistive burden on the secondary. In this case, the user
forward transformers, current transformers, Rogowski coils, voltage assumes that nearly all of the primary current flows through the ideal
transformers, common-mode chokes, coupled inductors, sense windings transformer in the T model. A corresponding current flows through
(on inductors), gate-drive transformers, low-/medium-/high-frequency the burden resistor to create a sense voltage, which is proportional
transformers, autotransformers, pulse transformers, variacs, and so to and in phase with the sensed current. The magnetizing inductance
on. This varied terminology sometimes gives the impression that (L C) and secondary leakage inductance (L B) are therefore considered
there is a great variety of physical principles at work, which is not parasitic, and current transformer designs seek to maximize L C and
the case. It is important to emphasize that the varied transformer minimize L B . By contrast, a Rogowski coil is also used to sense current,
nomenclature refers to a variety of use cases (and hence design but a well-designed Rogowski coil is meant to be used with a high-
goals), not to any distinction in magnetic physics. (While there are impedance secondary load with all of the primary current flowing
electromagnetic components, such as circulators, that incorporate through the magnetizing inductance (L C). The magnetizing inductance
other physical principles, nearly all magnetic components used is not parasitic in this case and is carefully optimized to create a
by power electronics engineers operate based on Faraday’s law of large signal while inserting a small impedance on the sensed system.
electromagnetic induction.) It does not matter what terminology is Thus, while current transformers are typically designed with high-
used; the approaches in this article apply to all such magnetic devices. permeability magnetic cores, Rogowski coils often use no core at all.
For example, a forward transformer is so called because it has been Further examples abound, including transformers that intentionally
optimized for use in a forward converter, where all of the inductances use leakage inductance (for example, in dual-active-bridge converters)
in the T model are considered parasitic. It is therefore often designed and transformers that intentionally use both leakage and magnetizing
with no core gap and tight coupling between the windings to yield inductance (such as in LLC resonant converters). Nevertheless,
large-magnetizing (L C) and small-leakage inductances (L A, L B). By the same physics, analysis, characterization, and intuition apply
contrast, the magnetizing inductance (L C) in a flyback converter is equally well to all cases. Therefore, while there is value in specific
not parasitic; it plays a direct role in the intended operation of the nomenclature, it is useful to appreciate the unity of the principles that
converter and is expected to store a substantial amount of energy. A underlie all such magnetic devices and the ability to model them in
flyback transformer is therefore designed with a gap in the core. the same way.

is obeyed, as noted), which can actually be useful in cir-


cuit design [14].
In the more common case where N is selected as the LA LB N1 : N2
physical turns ratio of the transformer, the inductances
have physical meaning, namely as the primary-side leak-
LC T
age inductance L A = L l1 (representing flux that only
couples the primary), the primary-referred magnetizing
inductance L C = L n1 (representing flux that couples both
windings), and the primary-referred secondary-side leak- LD N1 : N2
age inductance L B = N 2 L l2 (representing flux that only
couples the secondary; more typically L B is reflected to
the secondary side, forming the secondary-side leakage LE LF Pi
inductance L l2 = L B /N 2 ). Strictly speaking, the above
description only applies when flux linking any turn of a
given winding links all of the turns of that winding, such
that there is no flux leakage among turns. Otherwise, it LG
n: 1
is merely an approximate physical understanding. Flux
leakage within a winding is one reason, along with various
numerical and measurement issues, that “physical” leak- LH Cantilever
age inductances are sometimes concluded to be negative
from experiments.
Turning to the Pi model of the transformer, we can like-
wise see that there are four possible parameters, which FIG 2 Three common circuit structures for modeling two-wind-
can be selectively narrowed to three parameters to real- ing transformers. These models can be made mathematically
ize a necessary-and-sufficient model for any two-port equivalent to each other and to the inductance matrix.

March 2020 z IEEE POWER ELECTRONICS MAGAZINE 37


models that directly represent the physical flux paths of
a magnetic structure. This can be accomplished by form-
l2 ing a magnetic circuit model (including key flux paths
l1
and reluctances) and converting it into its correspond-
– ing electrical circuit. This process can also be reversed,
+
v1 v2 starting from a desired electrical circuit model of a mag-
– +
netic component, converting it into an equivalent mag-
netic circuit, and from there synthesizing a magnetic
structure with similar flux paths and reluctances. This
procedure is not novel (see, for example, [3] and [17]), but
FIG 3 A two-winding magnetic structure example used in Fig-
despite its usefulness we rarely see it used, and it bears
ure 4 to demonstrate the conversion from a magnetic circuit additional emphasis.
model to an equivalent electric circuit. To illustrate the physical modeling procedure, we con-
sider an example magnetic structure in Figure 3. Drawing
magnetic component. One way to approach this is to rec- the relevant flux paths and reluctances yields a magnetic
ognize that the Pi model of Figure 2 can be directly synthe- circuit at the top of Figure 4 with the across variable
sized from the T model by using a Y–T transform [15] to being magnetomotive force (MMF) (ampere-turns) and
convert its inductor network from a T (Y) to an equivalent the through variable being flux (volt-seconds/turn) (see
Pi (T) configuration. “Reluctance Models Versus Other Equivalent Circuits”).
The cantilever model of Figure 2—so named by its origi- Taking its topological dual yields a circuit with flux as
nators because the configuration of the two inductors in the across variable, MMF as the through variable, and a
the circuit resembles a cantilever [16]—provides exactly set of permeances (units: henries, the magnetic analog of
the three independent parameters needed to represent a conductance). Differentiating the circuit makes the across
two-port magnetic structure: two inductors (L G and L H ) variable dz/dt and through variable N di/dt, but the rela-
and a nonphysical turns ratio n. (If the primary or second- tionships represented by the circuit remain true.
ary leakage is very small, a cantilever model may be con- Now, we can pass the role of differentiation from the
structed with n approximately equal to the physical turns through variable to the permeances, replacing the through
ratio. In physical windings, however, there is always some variable with NI and the permeances [which enforce the
leakage flux.) The cantilever model can be understood as ratio P = across /through@ with inductances [which enforce
the T model with one series inductance constrained to be the ratio L = across/(d ^through h /dt)@. This maintains the
zero or as the Pi model with one shunt inductance con- exact same constitutive relations between the across and
strained to be infinitely large. This model is particularly through va r iables: dz/dt = P 6N (di / dt)@ = 6L (d / dt)@ Ni.
suitable for use in circuit design, as it makes explicit only Adding transformers to account for the source turns
two energy-storage elements, making its behavior easier ratios completes the conversion, with the outer variables
to visualize than a model including three inductors. How- becoming electrical volts and amperes. The inner struc-
ever, since none of the three parameters has direct physi- ture is usually reflected to the outside, and the transform-
cal meaning, it can be difficult to synthesize a magnetic ers are usually combined; we leave the example in “unfin-
component with the desired parameters. ished” form to highlight the electrical domain coupling
Indeed, excepting the T model with N chosen as the into the magnetic domain.
physical turns ratio, the models of Figure 2 tend to be Figure 4 shows that the magnetic circuit and its
more mathematical than physical in how they represent a “direct equivalent” electric circuit are topological
magnetic component. One can, however, develop circuit duals [3], [17]. Thus, these steps can be used to convert

Reluctance Models Versus Other Equivalent Circuits


In the reluctance model, the product of across variable (magneto­­ reluctance model’s ease of use has made it the clear favorite in
motive force) and through variable (flux) has units of energy, not the field.
power, as in electrical, mechanical, or fluid systems. In addition,
References
“dissipation” in the magnetic circuit domain corresponds to energy
[S1] E. R. Laithwaite, “Magnetic equivalent circuits for electrical machines,”
storage in the electric circuit domain (and, while we do not treat it Proc. Inst. Elect. Eng., vol. 114, no. 11, pp. 1805–1809, Nov. 1967. doi: 10.1049/
here, vice versa [S1]). This inconsistency with the models of virtually piee.1967.0344.
every other physical system is sometimes seen as a theoretical [S2] D. C. Hamill, “Lumped equivalent circuits of magnetic components: The
embarrassment of the reluctance model, and more satisfying gyrator-capacitor approach,” IEEE Trans. Power Electron., vol. 8, no. 2, pp. 97–103,
models have been proposed to replace it [S2]. Nevertheless, the Apr. 1993. doi: 10.1109/63.223957.

38 IEEE POWER ELECTRONICS MAGAZINE z March 2020


between the electric and magnetic domain for the same electric circuit. Because the identification of relevant
component. Note that while we belabor the details for reluctance paths is an unconstrained choice, the final
completeness, in practice, the transformation is often result may be under- or overdetermined [with respect to
easily drawn by inspection. the M (M + 1) / 2 independent parameters for describing
In this example, the physical model reduced to a well- port relationships] and therefore will only match reality to
known necessary-and-sufficient representation (the Pi the extent that the original magnetic circuit captures the
model with a physical turns ratio), but there is no guar- right amount of information.
antee that it would have. A magnetic circuit can include Physical modeling of magnetics is most useful in
reluctance paths at many levels of granularity, producing design. If we want some functionality in a circuit, we can
just as many inductances in the electric equivalent circuit. reverse the above process to obtain a magnetic circuit and
The limit of an ultrafine-grained reluctance model is simi- then synthesize an actual component. However, physical
lar in essence to a finite-element simulation. A magnetic models can be less useful in characterizing an existing
circuit could also include fewer reluctances than a nec- device, especially for the likely case of an under- or over-
essary-and-sufficient model, resulting in a reduced-order defined model. For example, consider the complicated

R1 R2

Across = MMF (Ampere-Turn)


N1 i1 + R3 + N2 i2
– – Through = Flux (Volt-second/Turn)

Dual
P3

Across = Flux (Volt-second/Turn)


N1 i1 P1 P2 N2 i2
Through = MMF (Ampere-Turn)

Differentiate P3

di1 di2 Across = dφ/dt (Volt/Turn)


N1 P1 P2 N2
dt dt Through = N di/dt (Ampere-Turn/second)

Exchange
Roles L2

Across = dφ/dt (Volt/Turn)


N1 i1 L1 L3 N2 i2
Through = MMF (Ampere-Turn)

Add
Transformers N1 : 1 L2 1 : N2

Across = Volt
i1 L1 L3 i2
Through = Ampere

FIG 4 How magnetic circuits can be converted into electric equivalent circuits through topological duality (and vice versa).
This physical modeling approach can be used to analyze existing structures or synthesize a structure with some desired
functionality, but it is not guaranteed to have the number of independent parameters required by the inductance matrix.

March 2020 z IEEE POWER ELECTRONICS MAGAZINE 39


structure of Figure 5 with many relevant flux paths. With
physical modeling, the analysis is straightforward, even
considering the flux that links only some turns of each
winding (for example, by modeling each turn as a sepa-
rate winding, electrically connected in series). (Flux
linking only some turns in a winding can be important
i1 i2 to model, for instance, to understand the direction and
+ + magnitude of B fields within the structure, to capture
v1 v2
– – uneven distribution of voltage on a winding, and so on.)
However, the 12 reluctances in the model of Figure 5 are
more than the number of parameters in a two-port or even
a four-port inductance matrix (three and 10, respectively).
Therefore, given a prototype of this structure, it is impos-
sible to determine the values of all 12  equivalent circuit
inductances by experimentally testing the electrical port
behavior, though such tests can determine the values of
FIG 5 A bizarre magnetic structure, which is difficult to ana- an inductance matrix or a necessary-and-sufficient circuit
lyze without a many-parameter physical model. While mathe- model. Conversely, if the physical model had too few reluc-
matically such a model must reduce to the three independent tances/inductors in it to capture the actual flux paths in a
parameters of the inductance matrix (equivalently, a neces-
practical device, then the resulting circuit model (and any
sary-and-sufficient circuit model), such a reduction is not
always straightforward. inductance matrix derived from it) would not well repre-
sent the behavior of the practical device.
This case shows that the translation between physical
and necessary-and-sufficient models can be difficult, and
i1 1:1 L12 1 : n2 i2 the advantages of each approach become more apparent.
+ +
On paper, physical modeling is the easiest way to under-
L13 L23 v2
v 1 Lm stand a structure. Given a physical prototype, experimen-
– – tally characterizing the component in terms of inductance
1 : n3 matrix parameters or necessary-and-sufficient circuit
+
models is much more straightforward.
v3

– Modeling With Three Windings


Moving to three windings changes the modeling land-
FIG 6 The extended cantilever model, a necessary-and-suffi- scape substantially. While the mathematical and physical
cient model, for a three-winding structure. This model extends representations extend naturally to M windings, most
naturally to M ports and M (M + 1)/2 parameters. Moreover, necessary-and-sufficient circuit representations do not
each parameter can be measured without performing numeri- extend so cleanly [18]. The primary exception and perhaps
cally sensitive calculations, though some of the measurements
the most used of such models is the extended cantilever
require current sensing which can be challenging at elevated
frequencies. model [19] (Figure 6). In this model, an M- port magnetic
structure is represented by a set of M nodes with an
inductance connecting each of them to each other, yield-
Table 1. Recommended measurements to identify ing M (M - 1)/2 parameters. Each winding couples to one
parameters in the extended cantilever model of the M nodes, with the primary having a shunt induc-
with three windings. These recommendations tance and a 1:1 turns ratio and every other turns ratio
require short circuit current measurements
being an independent variable. This yields M more
but no subtractions.
parameters, for a correct total of M (M + 1)/2. This model
Apply Condition to Winding extends naturally to M windings, and any apparent com-
plexity in the model results from the fact that port rela-
1 2 3 Measure
tionships of magnetic structures simply become quadrati-
m1 v1 Open circuit Open circuit Z1 = j~L m cally more complicated as a function of M.
m2 v1 Open circuit Open circuit v 2 /v 1 = n 2 Identifying the M (M + 1)/2 parameters in any nec-
m3 v1 Open circuit Open circuit v 3 /v 1 = n 3 essary-and-sufficient representation is typically done
m4 v1 Short circuit Short circuit v 1 /i 2 = j~l 12 # n 12 experimentally, either through experiments on a practical
device or through numerical simulations of a model of the
m5 v1 Short circuit Short circuit v 1 /i 3 = j~l 13 # n 13
device. The recommended measurements for the extended
m6 SC v2 Short circuit v 2 /i 3 = j~l 23 # n 23
cantilever model are shown in Table 1, with open-circuit

40 IEEE POWER ELECTRONICS MAGAZINE z March 2020


Example—Characterizing a Flyback Transformer
Measurement difficulties are encountered even in two-winding (though, as we show, transformers with three or more windings have
transformers, and a two-winding example helps demonstrate the additional complexity beyond simple leakage models). Figure S2 shows
challenges. Consider a 5:1 flyback transformer (N = N 1/N 2 = 5) with that the primary-referred secondary-side leakage (L B) is strongly
the following measurements (taken from a real transformer): affected by measurement errors of both L 11 and v 2 /v 1 —errors
1) The primary inductance is measured with the secondary open- of ! 2 % of each parameter yield a 160-nH range of results for a
circuited, yielding L 11 = 1987 nH. nominally 20-nH parameter.
2) The secondary inductance is measured with the primary open- The small-difference-of-large-numbers problem can also yield
circuited, yielding L 22 = 79.98 nH. nonphysical results. Calculating the coupling coefficient (k = L 12 / L 11 L 22 )
3) An ac voltage of 1.047 V is applied to the primary with the with similar measurement errors yields Figure S3. The top-right region
secondary open-circuited; the secondary voltage is measured at of Figure S3 indicates that small errors are liable to yield a coupling
0.2082 V. coefficient that is physically impossible ( ; k ; 2 1).
The T-model transformer parameters are easily found: This flyback example highlights the need for modeling ap-
proaches with low numerical sensitivity by using only high-accu-
v
L C = NL 11 v 21 = 1, 975.6132 . 1, 976 nH racy measure­ments and, where possible, by avoiding subtractions
(or at least small differences of large numbers) when computing
L A = L 11 – L C = 1, 987 - 1, 975.6132 = 11.3868 . 11.39 nH
model parameters.
L B = N 2 L 22 – L C = 1, 999.5 - 1, 975.6132 = 23.8868 . 23.89 nH.

In this case, finding L A and L B requires subtractions of large LB (µH)


numbers that are about 1% apart. Small-percentage errors in the large 2 100
0 –4
numbers can yield wildly incorrect results. For example, consider –2 0
0
what would happen if the L 11 and v 2 /v 1 measurements each had 1 40
v2/v1 Error (%)

! 2 % error. First consider L A, the primary-side leakage inductance. 50


In a flyback converter, this parameter should be known accurately to 20
0 60 0
account for leakage losses or to properly design an active or passive
clamp. Calculations of L A across small measurement errors yield a very 0
40
wide range of results, as shown in Figure S1—an approximately 80-nH –1 80
20
range for a nominally 11-nH parameter. Figure  S1 demonstrates 60
that achieving reasonable accuracy of L A would require the L 11 –2 –50
–2 –1 0 1 2
measurement to be accurate to + 0.1%, which can be very difficult
L11 Error (%)
to achieve.
The secondary-side leakage is also an important parameter, FIG S2 Calculated values for L B in the T model of a flyback
as it can lead to undesired load regulation and degraded cross- transformer shows that small measurement errors in multiple
regulation between multiple outputs and/or sense windings parameters can produce widely varying results.

LA (µH) k
2 50 2 1.02
50

10

–10

–20
40

30

20

40
1.01
1 30 1
0.9
0.9
v2/v1 Error (%)

v2/v1 Error (%)

1
9

1
8

1.0

20
1

0 10 0 0.99
0
0.98
–1 –10 –1
50

10

–10

–20
40

30

20

0.9

0.97
0.9

0.9

–20
9

1
7

–2 –2
–2 –1 0 1 2 –2 –1 0 1 2
L11 Error (%) L11 Error (%)

FIG S1 Calculated values for L A in the T model of a flyback FIG S3 Calculated values of coupling ­coefficient for a fly-
transformer shows that small measurement errors can produce back transformer shows that small measurement errors can
a range of results that is . 8 times as large as the nominal result. yield nonphysical models (for example, k 2 1).

March 2020 z IEEE POWER ELECTRONICS MAGAZINE 41


measurements used to find the magnetizing inductance and extended cantilever model is the recommended process for
nonphysical turns ratios and short circuit current measure- determining model parameters, which includes the need
ments used to find the “leakage” inductances. This approach to measure currents at short circuited ports [20]. Current
is particularly good since subtractions of measurements measurements typically require bulky sensors that impose
are avoided, which otherwise could cause small-difference- inductive and/or resistive impedances on the circuit, both
of-large-numbers problems which are particularly acute in of which become more restrictive concerns as frequency
magnetic systems with very strong or very weak couplings increases and size decreases. Given the complexity of the
(see “Example—Characterizing a Flyback Transformer”). model, it is difficult to predict a priori if external imped-
As a useful necessary-and-sufficient model, perhaps the ances or artificial inductances from measurement loops will
only substantive complaint that can be levied against the be negligible compared to what one is trying to measure.
Therefore, it would be advantageous to have a nec-
essary-and-sufficient representation that only requires
i1 1:1 1 : n 2 i2 voltage measurements, which are easier to make with
+ + high confidence at even 10s of megahertz. In particular,
L1 L2
v 1 Lm v2 we would like to use only one-port impedance measure-
ments or two-port voltage ratios that can be obtained
– –
on an impedance analyzer. It is also preferable, where
possible, to have measurements that require open-
L3
circuit terminations rather than short circuit termina-
1 : n3 i 3 tions, as these are easier to realize at high frequency.
+
(At sufficiently high frequencies it becomes difficult to
v3 impose sufficiently good short or open circuits at ports;
– it is partially for this reason that S-parameter measure-
ments become the dominant approach at radio frequen-
FIG 7 Modification to the extended cantilever model with cies.) We would like any required calculations to avoid
the graphical dual of the inner network. For three windings, small-differences-of-large-numbers problems as well.
the designer can characterize each parameter using only One way to approach this problem is to observe that
one-port impedance and two-port voltage ratio measure-
the offending measurements in the extended cantilever
ments, without any subtractions. It has the same advantages
as the extended cantilever model with extended utility at model arise from the connection of the internal nodes
higher frequencies. (a delta connection in the three-winding case). We might
hypothesize, perhaps without perfect rigor, that creat-
ing a model with the graphical dual of the internal sec-
Table 2. Well-behaved measurements available for tion (a Y connection) might allow for voltage measure-
the three-winding model in Figure 7.
ments in place of currents. Such a model is shown in
Apply Condition to Figure 7, with available well-behaved measurements
Winding in Table 2. Combining these measurements tur ns
out to be fruitful in obtaining every parameter using
1 2 3 Measure
only one-port impedance and two-port voltage ratio
m1 v1 Open Open Z 1 /j~ = L m measurements and without any subtractions (Table 3).
circuit circuit
For completeness, the mappings between this model
m2 v1 Open Open v 2 /v 1 = n 2 and the inductance matrix are provided in Table 4; this
circuit circuit
complements the mappings provided for the cantilever
m3 v1 Open Open v 3 /v 1 = n 3 model in [19].
circuit circuit
m4 v1 Short Open v 3 /v 1 = L 2 /(L 2 + L 1) # n 3
circuit circuit Table 3. Measurements from Table 2 can be
m5 v1 Open Short v 2 /v 1 = L 3 /(L 3 + L 1) # n 2 combined to yield the model parameters in
circuit circuit Figure 7 without resorting to subtractions and the
ensuing numerical dangers.
m6 Short v2 Open Z 2 /j~ = (L 2 + L 1) # n 22
circuit circuit Lm m1
m7 Short Open v3 Z 3 /j~ = (L 3 + L 1) # n 2
3 n2 m2
circuit circuit n3 m3
m8 Short v2 Open v 3 /v 2 = L 1 /(L 1 + L 2) # n 3 /n 2 L1 m 8 m 6 /(m 2 m 3) or m 9 m 7 /(m 2 m 3)
circuit circuit
L2 m 4 m 6 /(m 3 m 22)
m9 Short Open v3 v 2 /v 3 = L 1 /(L 1 + L 3) # n 2 /n 3
circuit circuit L3 m 5 m 7 /(m 2 m 23)

42 IEEE POWER ELECTRONICS MAGAZINE z March 2020


We have therefore achieved a necessary-and-sufficient functions within a power converter). Transformers in high-
circuit model that can represent three-winding structures frequency power conversion commonly contain an aux-
and can be characterized by measurements that are well iliary winding for sensing. Recent research has also
behaved to high frequency, making such a model very suit- made greater use of stacking power conversion units
able for many power electronics applications. in multiple voltage domains and using dual-input trans-
Before extending the model to more than three wind- formers to recombine the power and provide isolation
ings, it is useful to note the variety of applications of [5]–[8]. Additionally, center-tapped seconda r ies a nd
three-winding transformers. Many applications have novel approaches to circuit-magnetics interaction like
dual input or dual output (especially, for example, sup- that of [21] are structures that, for purposes of modeling,
plying “hotel” or auxiliary power to the analog and digital are three-winding structures. Furthermore, the use of
“integrated magnetics” can achieve both high density
and functional integration.
Table 4. Mapping the model in Figure 7 to the
inductance matrix and back.
Extension to More Than Three Windings
L 11 = Lm Lm = L 11 A strong benefit of the extended cantilever model is that it
L 22 = (L m + L 1 + L 2) # n 22 n2 = L 12 /L 11 can, in principle, model general M-winding magnetic com-
L 33 = (L m + L 1 + L 3) # n 23 n3 = L 13 /L 11 ponents. Insofar as the proposed model involves a graphi-
2 cal dual of (part of) the extended cantilever model, it is
L 12 = Lm # n2 L1 = L L /(L 12 L 13) – L 11
23 11
likewise extensible to any number of windings. However,
L 13 = Lm # n3 L2 = L 22 L 211 /L 212 – L 23 L 211 /(L 12 L 13)
for more than three windings, the extended cantilever
L 23 = (L m + L 1) # n 2 n 3 L3 = L 33 L 211 /L 213 – L 23 L 211 /(L 12 L 13) model has a nonplanar graph, that is, there are branches
that cross each other, and there is no way to draw the cir-
cuit without the crossings. Taking the dual of a nonplanar
graph is ordinarily impossible but can be enabled with a
D A D A
small circuit trick, as demonstrated in Figure 8 [22]. Any
crossing branches may be redrawn as intersecting, pro-
vided that an ideal 1:1 transformer is inserted on one of the
=
branches. Thus, the voltage in one branch still has no effect
on the other branch, just as when they were disconnected.
Once this modified planar (but electrically equivalent)
B C B C graph has been drawn, the dual may be taken as usual.
Performing these operations for the four-winding case
FIG 8 Topological duality is not directly applicable to nonpla- converts the extended cantilever model (Figure 9) to the
nar graphs, like this circuit with nodes A–D. When unavoidable
crossings occur, the graph may be modified to an electrical proposed model (Figure 10).
equivalent that is graphically planar [22], and the dual may be A set of well-behaved measurements for the proposed
found [13]. model is shown in Table 5, with available nonsubtractive

i1 i2
+
1:1 l12 1 : n2 1:1 1 : n2 i2
+ + +
L1 L2
L6
v1 Lm l13 v2 v1 Lm v2
l14 l23 – L5 1:1
– –

l24 L3
i4 n4 : 1 L4 1 : n3 i3
l34 + +
i4 n4 : 1 1 : n3 i3
+ + v4 v3

v4 v3 – –

– –
FIG 10 A four-winding version of the proposed model, as derived
from the extended cantilever model. In this case, most parame-
FIG 9 A diagram showing the extended cantilever model for ters may still be obtained using only one-port impedance and
four windings containing one unavoidable nonplanar crossing. two-port voltage ratio measurements. Some parameters may
The dual of the inner section may be taken using the method require current sensing or subtractions to determine, though
­
in Figure 8 to yield the model in Figure 10. several options are available to choose from to minimize error.

March 2020 z IEEE POWER ELECTRONICS MAGAZINE 43


Table 5. Available well-behaved measurements for the proposed model, extended to four windings
in Figure 10. While some of the measurements require short circuit terminations at ports,
none of the tests reported here require current sensing.
Apply Condition to Winding

1 2 3 4 Measure
m1 v1 Open circuit Open circuit Open circuit Z1 = j~L m

m2 v1 Open circuit Open circuit Open circuit v 2 /v 1 = n2


m3 v1 Open circuit Open circuit Open circuit v 3 /v 1 = n3
m4 v1 Open circuit Open circuit Open circuit v 4 /v 1 = n4

m5 v1 Open circuit Open circuit Short circuit v 2 /v 1 = (L 4 + L 5)/(L 1 + L 4 + L 5) # n 2


m6 v1 Open circuit Open circuit Short circuit v 3 /v 1 = L 4 /(L 1 + L 4 + L 5) # n 3

m7 v1 Open circuit Short circuit Open circuit v 2 /v 1 = (L 3 + L 5)/(L 1 + L 3 + L 5 + L 6) # n 2


m8 v1 Open circuit Short circuit Open circuit v 4 /v 1 = (L 3 + L 6)/(L 1 + L 3 + L 5 + L 6) # n 4

m9 v1 Short circuit Open circuit Open circuit v 3 /v 1 = L 2 /(L 1 + L 2 + L 6) # n 3


m 10 v1 Short circuit Open circuit Open circuit v 4 /v 1 = (L 2 + L 6)/(L 1 + L 2 + L 6) # n 4

m 11 Short circuit v2 Open circuit Open circuit Z2 = j~ (L 1 + L 2 + L 6) # n 22


m 12 Short circuit Open circuit v3 Open circuit Z3 = j~ (L 1 + L 3 + L 5 + L 6) # n 32
m 13 Short circuit Open circuit Open circuit v4 Z4 = j~ (L 1 + L 4 + L 5) # n 24

m 14 Short circuit v2 Open circuit Open circuit v 3 /v 2 = (L 1 + L 6)/(L 1 + L 2 + L 6) # n 3 /n 2


m 15 Short circuit v2 Open circuit Open circuit v 4 /v 2 = L 1 /(L 1 + L 2 + L 6) # n 4 /n 2

m 16 Short circuit Open circuit v3 Open circuit v 2 /v 3 = (L 1 + L 6)/(L 1 + L 3 + L 5 + L 6) # n 2 /n 3


m 17 Short circuit Open circuit v3 Open circuit v 4 /v 3 = (L 1 + L 5)/(L 1 + L 3 + L 5 + L 6) # n 4 /n 3

m 18 Short circuit Open circuit Open circuit v4 v 2 /v 4 = L 1 /(L 1 + L 4 + L 5) # n 2 /n 4


m 19 Short circuit Open circuit Open circuit v4 v 3 /v 4 = (L 1 + L 5)/(L 1 + L 4 + L 5) # n 3 /n 4

calculations in Table 6. From Table 6, it is clear that the pro-


Table 6. Well-behaved measurements for the
proposed four-winding model can be used to posed model for four-winding structures can yield seven
derive seven of the 10 model parameters without of 10 parameters with fully well-behaved measurements
subtraction, an improvement over four of 10 for and calculations (more than the four of 10 such param-
the four-winding extended cantilever model. eters of the extended cantilever model). The remaining
Lm m1 three parameters may be obtained by less desirable means
(subtraction, current sensing, and others) where sensitiv-
n2 m2
ity allows, and there are several ways to obtain each of the
n3 m3 remaining parameters.
n4 m4
Conclusions
L1 m 18 m 13 /(m 2 m 4) or m 15 m 11 /(m 2 m 4)
As designers strive to best take advantage of good
L2 m 9 m 11 /(m 3 m 22) switching devices and best grapple with the magnetic
bottleneck, the solution often involves more complex
L3 —
magnetic structures. Modeling such structures with math-
L4 m 6 m 13 /(m 3 m 24) ematics, necessary-and-sufficient circuit models, and
L5 — physical circuit models is an essential element in under-
standing their complicated behavior. Our brief review has
L6 —
covered some of the primary modeling approaches, their

44 IEEE POWER ELECTRONICS MAGAZINE z March 2020


advantages and disadvantages, and the translation DC–DC converter for efficient wide load range operation,” IEEE Trans.
between them. Power Electron., vol. 33, no. 12, pp. 10,428–10,448, Dec. 2018. doi: 10.1109/
In addition, we introduced a necessary-and-sufficient TPEL.2018.2801306.
circuit model with characterization advantages over the [7] M. Chen, K. K. Afridi, S. Chakraborty, and D. J. Perreault, “Multitrack
extended cantilever model. In a three-winding structure, power conversion architecture,” IEEE Trans. Power Electron., vol. 32, no. 1,
the complete set of parameters can be obtained with only pp. 325–340, Jan. 2017. doi: 10.1109/TPEL.2016.2526973.
one-port impedance and two-port voltage ratio measure- [8] S. J. Gunter, K. K. Afridi, D. M. Otten, R. A. Abramson and D. J. Per-
ments, which can reliably be obtained to very high frequen- reault, “Impedance control network resonant step-down DC-DC converter
cies (compared to three of six parameters in the extended ­architecture,” in Proc. 2015 IEEE Energy Conversion Congr. Exposition
cantilever model). In a four-winding structure, the proposed (ECCE), Montreal, QC, pp. 539–547. doi: 10.1109/ECCE.2015.7309736.
model can find seven of 10 parameters in this way (com- [9] L.F. Casey, A.F. Goldberg, and M.F. Schlecht, “Issues regarding the capaci-
pared to four of 10 for the extended cantilever model). This tance of 1-10 MHz transformers,” in Proc. 1988 IEEE Applied Power Elec-
model may therefore be useful for a wide range of many- tronics Conf., pp. 352–359. doi: 10.1109/APEC.1988.10583.
winding magnetic structures, with a high ceiling on appro- [10] W. G. Hurley, E. Gath, and J. G. Breslin, “Optimizing the AC resistance
priate frequencies. of multilayer transformer windings with arbitrary current waveforms,”
IEEE Trans. Power Electron., vol. 15, no. 2, pp. 369–376, Mar. 2000. doi:
About the Authors 10.1109/63.838110.
Alex J. Hanson (ajhanson@utexas.edu) received his B.E. [11] M. Chen, M. Araghchini, K. K. Afridi, J. H. Lang, and D. J. Perreault, “A
degree from Dartmouth College, Hanover, New Hampshire, systematic approach to modeling impedances and current distribution in
in 2014 and his S.M. and Ph.D. degrees from the Massachu- planar magnetics,” IEEE Trans. Power Electron., vol. 31, no. 1, pp. 560–580,
setts Institute of Technology, Cambridge, in 2016 and 2019, Jan. 2016. doi: 10.1109/TPEL.2015.2411618.
respectively. He received the William M. Portnoy First Place [12] K. Venkatachalam, C. R. Sullivan, T. Abdallah, and H. Tacca, “Accurate
Prize Paper Award. In 2019, he joined the University of prediction of ferrite core loss with nonsinusoidal waveforms using only
Texas at Austin as an assistant professor. His research inter- Steinmetz parameters,” in Proc. 2002 IEEE Workshop on Computers in
ests include high-frequency circuits and magnetics for ener- Power Electronics, pp. 36–41. doi: 10.1109/CIPE.2002.1196712.
gy conversion. He is a Member of the IEEE. [13] C. Desoer and E. Kuh, Basic Circuit Theory, 1st ed. New York: McGraw-
David J. Perreault (djperrea@mit.edu) received his Hill, 1966.
B.S. degree from Boston University, Massachusetts, and his [14] T. C. Neugebauer, J. W. Phinney, and D. J. Perreault, “Filters and compo-
S.M. and Ph.D. degrees from the Massachusetts Institute of nents with inductance cancellation,” IEEE Trans. Ind. Appl., vol. 40, no. 2,
Technology, Cambridge. He received the Richard M. Bass pp. 483–490, Mar./Apr. 2004. doi: 10.1109/TIA.2004.824487.
Outstanding Young Power Electronics Engineer Award, the [15] A. E. Kennelly, “The Equivalence of triangles and three-pointed stars
R. David Middlebrook Achievement Award, the Office of in conducting networks,” Elec. World Eng., vol. 34, no. 12, pp. 413–414,
Naval Research Young Investigator Award, and the Society 1899.
of Automotive Engineers Ralph R. Teetor Educational [16] D. Maksimovic, private communication, Mar. 2019.
Award. He is coauthor of 12 IEEE prize papers. His research [17] E. C. Cherry, “The duality between interlinked electric and magnetic cir-
interests include design, manufacturing, and control tech- cuits and the formation of transformer equivalent circuits,” Proc. Phys. Soc.,
niques for power electronic systems and components and B, vol. 62, no. 2, pp. 101–111, 1949. doi: 10.1088/0370-1301/62/2/303.
their use in a wide range of applications. [18] J. G. Hayes, N. O’Donovan, and M. G. Egan, “The extended T model
of the multiwinding transformer,” in Proc. 2004 IEEE 35th Annu. Power
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March 2020 z IEEE POWER ELECTRONICS MAGAZINE 45


R
ONIOKH
.COM/ANT
by Kevin Hermanns,

KPHOTO
Yarui Peng, and

©ISTOC
Alan Mantooth

The Increasing Role of


Design Automation in
Power Electronics
Gathering what is needed

T
he second Design Automation for Power Elec- prepared questions of interest in DA provided valuable
tronics (DAPE) workshop was held in the information (Figure 1).
beautiful historical city of Genova, Italy, on 6 The breakout sessions were focused on group discus-
September 2019. This was one day after the sions about the fundamental questions in the domain of
successful European Conference on Power design automation, such as:
Electronics and Applications (EPE ECCE). With approxi- 1) For DA, which aspects need research, and in which cases is
mately 40 participants and a nice mix of industry and aca- it good enough?
demic affiliations, the workshop provided outstanding 2) What are the major bottlenecks in data quality and acces-
presentations covering the wide field of design automa- sibility? How could standardization help?
tion for power electronics. A very novel exchange of 3) What are the desired features for power electronics design
views was performed by breakout sessions, and the use of engineers?
online voting technology to rapidly poll the attendees on 4) How do you verify the results of DA algorithms?
5) How do you see the role of artificial intelligence (AI) in DA?
Digital Object Identifier 10.1109/MPEL.2019.2959706
The breakout sessions tackled these questions with the final
Date of current version: 19 February 2020 session devoted to reporting the results. A postmeeting notes

46 IEEE POWER ELECTRONICS MAGAZINE z March 2020 2329-9207/20©2020IEEE


compilation was provided to all attendees along with the pre- Dr. Thomas Guillod and Prof. Johann Kolar from ETH Zu-
sentations, which are available in the IEEE Power Electron- rich further evaluated and compared different optimization
ics Society (PELS) Resource Center [2]. More information algorithms, including brute-force search, analytical model,
about the workshop can be found on the DAPE website [3]. genetic algorithm, gradient method, and neural network, in
Promoting DA in the field of power electronics is the goal terms of computability, efficiency, and applicability for PE
of the DAPE initiative within the IEEE PELS. Starting with applications. Through automation, the design space can be
workshops to highlight the importance of DA, the DAPE ini- quickly explored within sufficient accuracy for a converter
tiative is already working on further activities to become the design case study. A standard interface to allow smart
collaborative platform for exchanging ideas about DA for switching between algorithms may further enhance design di-
power electronics. Facilitating DA is of utmost importance to versity and flexibility.
make technological advances and keep up with the demands Besides stand-alone algorithms, other speakers fo-
of modern societies on electric power supply. The shortening cused on integrating various DA tools into repeatable design
of product development cycles and increasing use of power flows to replace the best practices in PE engineering. Prof.
electronics with the demand for more tailored solutions lead Yarui Peng from the University of Arkansas (UA) presented
to a higher complexity with which power electronics design- a multiobjective layout synthesis tool called PowerSynth
ers have to cope. The only way to address the resulting chal- (Figure 2). Inspired by the physical design tools used in
lenges is through DA. integrated-circuit designs, PowerSynth was developed
collaboratively within the UA Power Group led by Prof. Alan
State-of-the-Art Solutions Mantooth. It generates a Pareto front of manufacturable
The first part of the DAPE workshop consisted of several pre- and optimized module layouts with predictable electro-
sentations from a wide range of academia, ­computer-aided thermal metrics. Resembling the semiconductor foundry
design (CAD) vendors, design houses, and testing equipment
providers. It was divided into two sessions with a break in
between for follow-up discussions. Several interesting topics
captured most of the attention, including fast-yet-accurate
models and circuit simulators, system-level optimization algo-
rithms, layout-driven component optimization methods,
model-based design space exploration, and automated design
synthesis workflows.
With the exponential growth of computing power, the ques- FIG 1 Kevin Hermanns presenting an online voting question
tion of how to effectively utilize these ever-increasing hard- at the second DAPE workshop: What are the most important
ware resources to construct an efficient workflow becomes steps to be automated in the current design process?
a challenging but rewarding problem to
solve. One of the most generic solutions is
to start with efficient models and algorithms.
Multichip Power Module Physical Optimizer
Unlike generic circuit simulators, such as Description and Component Selection Initialization and
the Simulation Program With Integrated Cir- Execution
cuit Emphasis (SPICE), the Latency Inser- Technology Library Create a New
Project, Import Assign Symmetries,
tion Method (LIM), developed by Prof. Jose Files, and Specify Constraints, and
Schutt-Aine’s group from the University of Symbolic Layout Design Rules Performance Metrics
Illinois, is highly customized for simulations
on RLC mesh networks, which are widely Select Baseplate Characterize
used to analyze power distribution networks and Substrate Electrical and
Materials and
or thermal effects. By dividing the network Dimensions Thermal Models
into RL branches and GC nodes and then sep-
arately updating branch currents and node Select Devices, Run
voltages, the general nodal analysis can be Bondwire Types, Multiobjective
and Leads Optimization
accelerated, resulting in linear-scaling time
complexity and predictable stability. This
approach can be applied on standard netlists Postoptimization Analysis
and provides a computational speed up by
Browse Select and 3D Models
several magnitudes compared with SPICE. Pareto-Optimal Export Layout
Other extensions, including device simula- Results Solutions Parasitic Netlist
tion and stochastic analysis, have the poten-
tial to replace commercial general-purpose
simulators for power analysis. FIG 2 The PowerSynth layout synthesis and optimization workflow.

March 2020 z IEEE POWER ELECTRONICS MAGAZINE 47


business model, it can further enable customized power from Plexim also demonstrated its hardware-in-the-loop
package prototyping through a fabrication plant with quick simulation platform integrating hardware-accelerated test-
turnaround time. Riccardo Giacometti from Keysight Tech- ing with model-based analysis to enhance productivity and
nologies also shared its electromagnetic (EM) cosimulation reduce costs.
solutions for power electronics designers (PEDs). Unlike During the follow-up discussion, many agreed that power
the time-consuming trial-and-error approach, the PathWave electronic design automation (PEDA) tools are currently most
Design Suite provides an interactive schematic and layout useful for simulation, verification, and evolutionary optimiza-
design environment with parasitic-annotated netlists for ac- tions rather than finding revolutionary alternatives. However,
curate EM simulations and an integrated thermal analysis new automation algorithms, i.e., machine learning and neural
engine for risk-proof agile development. networks, may redirect some decision-making processes from
Targeting various applications, customized tools are rule-based search to data-driven approaches. Other attend-
needed to drive further innovations forward. Dr. Andreas ees also shared their experiences about the bottlenecks and
Rosskopf from the Fraunhofer Institute for Integrated Sys- existing limitations of PEDA tools, such as difficulties of com-
tems and Device Technology reviewed several candidate bining system-level with component-level designs, absence
problems as the potential killer applications for automated of industry interchangeable models and software standards,
workflows, i.e., component placement problems, multiple- and the lack of portable algorithms and open-source librar-
objective optimizations, and complex designs involving ies. Uncertainty in accuracy and applicability further hindered
multiple CAD tools. In addition, Dr. Ki-Bum Park of ABB the adoption of academic models into commercial solutions.
Zürich looked at several common optimization approaches Some potential solutions were discussed during the afternoon
that can be automated to reduce repetitive work for grid ap- sessions as an initiative for pathfinding.
plications. The impacts of modulation, passive-component,
circuit-topology, device, and cooling solutions are all well Needs and Challenges
known to society but yet remain to be automated in design The second part of the DAPE workshop used a structured
practices to avoid common mistakes and repetitive work. conversational process for knowledge sharing, based on the
To address the challenges for space applications, Vladimir “world café” format. In two consecutive sessions, the partici-
Svikovic from Thales Alenia Space presented an automated pants discussed, in groups, 12 preformulated questions on
design flow (Figure 3) combined with a rigid review process PEDA. The results of the discussions were captured by mod-
to meet thermal and performance targets, while ensuring re- erators and are outlined in this section.
liability and standard compliance at the same time. Although If the state-of-the-art solutions can be summarized as the
many highly customized tools and scripts are used, this pro- islanded utilization of different design tools and methods
cess combines computer assistance with designer guidance (simulators, synthesis tools, test and measurement), DA makes
interchangeably and can also be standardized and applied to itself conspicuous by coaction of all these tools and the consis-
other areas. For testing and verification, Dr. Jost Allmeling tent use of generated data throughout the design process. Thus,

MCAD

R R
R R
ECAD

R eview
Operating Scenario A
A utomated
A A A
OK?

A
A

FIG 3 The guided DA flow for space applications showing the interaction of mechanical CAD (MCAD) and electronic CAD (ECAD).
(Image courtesy of Vladimir Svikovic of Thales Alenia Space.)

48 IEEE POWER ELECTRONICS MAGAZINE z March 2020


one of the major needs required to conduct DA was identified models. Determination of model errors rather than occasional
in the consistent processing of data, starting from the compo- plausibility checks is of importance to ensure the achievement
nents through to the design of the entire system and later dur- of design goals. As a result, it becomes necessary to have more
ing the full lifecycle of a PE system. To make use of the benefits, verification loops on minimum viable units. By this the deeper
standardization of interfaces and data generation is required. integration of test and measurement equipment into the design
There are already standards in place, but these often do process is of greater importance than for a semiautomatic or
not lead to a compatible solution usable in an application. manual approach. So far, the interaction between simulation
Furthermore, data required for systems design are in many tools and test and measurement uses proprietary formats
cases not available in a machine-readable format, and the mostly based on comma-separated values files that have to be
data sets are not sufficient for a more sophisticated system adapted for each tool or from each source in a different manner.
design, such as field- and temperature-dependent power A first solution was presented at the DAPE workshop on how
losses in ferrites. Today, design engineers have to re-extract tooling and measurement equipment can be further integrated.
data from datasheets that were already available in machine- The solution was still vendor-specific. The big challenge in DA
readable formats during the characterization process. This will be to create a common ground on which all tools and equip-
makes data availability one of the major challenges in DA. As ment can work. The barriers are wasted time and money, which
a prominent example, the switching losses of semiconductors are limiting further innovations. Codesign processes between
can be named. different tooling and equipment—in some cases between differ-
Subsequent to the availability and machine-readability of ent companies—will become a key role for DA. This includes
data throughout the design process, more issues arose, such a trade-off between fast models with limited functionality and
as the liability of data and data processing. Additionally, with holistic implementations with large computational effort.
the nondisclosure of sensitive process data—which might be So far the discussed needs are just based on the design
read out from a larger set of data—the answer could not be of power converters to fulfill their dominant task of process-
derived on this question. This makes it a classic chicken–egg ing electrical energy in a certain manner, but DA has to do
problem. While the data availability and quality are poor, DA more. The compliance with EM-compatibility standards and
could not generate benefits necessary to invest in better and the consideration of manufacturing restrictions increase the
more data. Therefore, the added value of PEDA needs to be complexity of problem formulation. DA addresses these chal-
named and further qualified in advance. This is a typical task lenges as well.
for academia.
Another challenge worked out by the participants of the Outlook for DAPE Initiative
workshop is seen in a necessary paradigmatic change on how DAPE will now begin to transition into more dedicated activ-
systems design is conducted. To reduce the complexity of the ities within PELS. Working with PELS leadership, the DA
design process, designers have to convert requirements from initiative will become part of the technical committee struc-
the design space into a mathematical problem or formulate it ture, have tracks at conferences where appropriate, and per-
so that a solution from DA tools can be worked out indepen- haps a dedicated workshop will continue. This two-year
dently. This significantly shortens today’s lengthy manual, iter- exploratory effort led to the identification of the following
ative design process (Figure 4) and also requires a change in needs/gaps in DA for PE:
education of design engineers. Model fidelity, deep knowledge ■■widely accepted design flow
about optimization problems, design of suitable boundary ■■parasitic extraction and back annotation onto schematics
conditions and fitness functions for optimization algorithms, ■■signal integrity and EM interference analysis for PE
and interpretation of simulation results, together with data ■■simultaneous electrothermal–mechanical codesign
processing and handling, will play a crucial role. ■■circuit synthesis and layout optimization
While education and access to data in the required quan- ■■module and cabinet design optimization
tity and quality are more of a general nature, during the DAPE ■■uncertainty quantification
workshop even more specific needs were worked out by the ■■design for reliability and manufacturability
participants. In almost all fields of tooling, improvements ■■data standardization
are desired. Starting from faster and more accurate simula- ■■education on design tradeoffs
tors, design synthesis and optimization methods have to be ■■AI/machine-learning methods.
enhanced over model generation. While not necessarily an exhaustive list, it clearly indicates
Taking simulators as an example, new methods like the that the field of PE has room for growth in the automation
presented LIM algorithm are promising to lower the compu- space. PELS will do what it can to facilitate the dissemination
tational effort on the solution of network problems. To make of advances in these areas in conferences and publications,
these methods attractive, the parametrization of models has while also organizing symposia for industry and academia to
to be carried out on available data sets within the same time discuss solutions for the entire field.
frame. Otherwise the added value stays limited. Two efforts are already underway to assist with this. The
When it comes to DA, another very important task is veri- first is that the 2020 ECCE organizers have agreed to add DA
fication. The design process is increasingly dependent on and AI to the big data and machine-learning topic to add more

March 2020 z IEEE POWER ELECTRONICS MAGAZINE 49


FIG 4 A word cloud of responses to the online voting question: What are the future skills of PED engineers?

to that track. The second is that IEEE Open Journal of Power integrated circuits and develops design automation tools for
Electronics (OJ-PELS) is interested in articles in this area, and power electronics layout synthesis and electrothermal–
authors are encouraged to submit. OJ-PELS is a rapid-turn mechanical optimizations.
publication with a seven-week submission-to-publication goal. Alan Mantooth (mantooth@uark.edu) received his B.S.
It began publishing in January 2020. (summa cum laude) and M.S. degrees in electrical engineer-
ing from the University of Arkansas, Fayetteville, in 1985 and
About the Authors 1986, respectively, and his Ph.D. degree from the Georgia
Kevin Hermanns (kevin.hermanns@pe-systems.de) gradu- Institute of Technology, Atlanta, in 1990. He is an IEEE Fel-
ated from the Technical University Braunschweig, Germany, low and the immediate past president of the IEEE Power
in 2013. He is the general manager of PE-Systems GmbH and Electronics Society (PELS), and editor-in-chief of IEEE Open
a member of the Design Automation for Power Electronics Journal of Power Electronics. He is a distinguished professor
Initiative within the IEEE Power Electronics Society. He in the Electrical Engineering Department at the University of
started his professional career at Siemens and has worked as Arkansas, where he is also the 21st-century research leader-
a research associate at the Technical University Darmstadt ship chair in engineering. He helps lead the PELS initiative on
in the Power Electronics Department. During that time, his design automation and spent eight years at Analogy working
research interests were mainly focused on the distortions in the modeling group for the Saber simulator. He continues
of high-power converters. He is active in several national research in this area in the field of power electronics.
and international standardization groups in the field of
power electronics. References
Yarui Peng (yrpeng@uark.edu) received his B.S. degree [1] A. Bindra and A. Mantooth, “Modern tool limitations in design auto-
from Tsinghua University, Beijing, in 2012 and his M.S. and mation: Advancing automation in design tools is gathering momentum,”
Ph.D. degrees from the Georgia Institute of Technology, IEEE Power Electron. Mag., vol. 6, no. 1, pp. 28–33, Mar. 2019. doi: 10.1109/
Atlanta, in 2014 and 2016, respectively. He is an assistant MPEL.2018.2888653.
professor in the Computer Science and Computer Engineer- [2] IEEE Power Electronics Society Resource Center, “IEEE Design
ing Department at the University of Arkansas and leads the Automation for Power Electronics Workshop,” IEEE PELS, Piscataway,
Energy-Efficient Electronics and Design Automation Lab. NJ. Accessed on: Dec. 28, 2019. [Online]. Available: https://resourcecenter
His research focuses on computer-aided design for mul- .ieee-pels.org/proceedings/PELSPRO0021.html
tichip heterogeneous integration and high-efficiency power [3] “IEEE Design Automation for Power Electronics (DAPE) Workshop,”
electronics. He studies methodologies and algorithms for DAPE. Accessed on: Dec. 28, 2019. [Online]. Available: https://e3da.csce.uark
signal integrity and reliability optimizations in 2.5D and 3D .edu/dape/2019 

50 IEEE POWER ELECTRONICS MAGAZINE z March 2020


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What Does Copyright Protect


About Software?

I
n the June 2019 issue, I reported that Google’s copying of the APIs contemplated in considering fair use.
on a U.S. Supreme Court deci- made it liable for copyright infringe- The first is an inquiry into the purpose
sion that incentivized registering ment. The potential damages, which and character of the use, including
copyrights early, such as the soft- are not yet determined, could be in whether such use is of a commercial
ware used for electronics control. the billions of dollars. nature or is for nonprofit educational
The Court has agreed to hear anoth- At Google’s request, the U.S. purposes. Also involved is whether
er copyright case, one that is ex - Supreme Court has agreed to review the new work is transformative or dis-
pected to illuminate how much of a the case, focusing on two questions: places the original. To be transforma-
software program’s source code can 1) Does copyright protection extend tive, the second work must either
actually be protected. Google v. Ora- to a software interface? alter the original with new expres-
cle involves a lawsuit brought by 2) Does Google’s use of a software sion, meaning, or message or it must
Oracle when Google started to offer interface in the context of creating serve a new purpose distinct from
Android software for smartphones a new computer program consti- that of the original. Google argued
that included some of the Java Stan- tute fair use? that its work was transformative be-
dard Edition (SE) application pro- The first question involves the cause Java was originally written
gramming interface (API) code. copyright merger doctrine. Copyright for desktop and laptop computers,
The APIs included both declaring does not protect ideas, only the while Google was applying it to
and implementing code; Google cop- expression of ideas, smartphones, but
ied the declaring code including its i.e., the way an idea the court of appeals
structure, sequence, and organization is expressed. The The appeals court dismissed that ar-
(SSO), but not the implementing code. merger doct r i ne found that only gument because
Oracle’s Java SE was intended to applies if the nature there had already
170 lines of code were
enable programmers to write code of the item for which been s o m e J a v a
necessary to write the
once and then have it work in various copyright protection s m a r t phones be-
operating system (OS) environments. is claimed is so tied APIs in Java while fore Google repro-
When Google was preparing its to the idea being ex- Google copied 11,500 duced the APIs.
Android software, it wanted to take pressed that there lines, weighing against Another factor in
advantage of the programmer’s famil- are only limited ways finding fair use. fair use analysis is
iarity with those codes so it could to express the idea, the nature of the
induce them to write apps for its new so that expression copyright. That is,
OS, motivating its choice of copying cannot be protected because it has recognizing that some items are clos-
the Java APIs. merged with the idea. Since APIs er to the core of intended copyright
Oracle sued in 2012 and the par- must be used for software applica- protection than others, i.e., whether
ties have been litigating ever since. tions to be compatible, the merger the work is informational or creative.
The latest decision by the Court of doctrine may apply. Here, the functional aspects of the
Appeals for the Federal Circuit found The second question regards APIs and their SSO could indicate a
whether Google’s copying is consid- finding of fair use.
Digital Object Identifier 10.1109/MPEL.2019.2959198
ered a fair use for which it should The amount and substantiality of
Date of current version: 19 February 2020 have no liability. Several factors are the portion used is another factor in

52 IEEE POWER ELECTRONICS MAGAZINE z March 2020


the fair use analysis. The appeals of the original work. The court of In 1980, Congress specifically
court found that only 170 lines of code appeals cited instances of Java licens- made software protectable by copy-
were necessary to ees sw itch i ng to right and recent U.S. Supreme Court
wr ite the A PIs in Android from Java decisions have made it very difficult
Java while Google Fair use is appropriate or demanding dis- to protect software by patents, so it
copied 11,500 lines, for copying that does counts in Oracle’s will be interesting to watch how
weig h i ng aga i nst licensing fees due to that series of principles plays out in
not materially impair
finding fair use. the A ndroid soft- the Supreme Court’s decision in the
The fourth factor the marketability of ware competition. Java ca se. I f neit her patent nor
i s t h e c o p y i n g ’s the original work. This factor weighs copyright can protect software, cre-
effect on the poten- against a finding of ators will have to rely on trade
tial market for the fair use. Weighing secrets as the exclusive way to safe-
copyright owner’s work. Fair use is the various factors, the court conclud- guard their innovations.
appropriate for copying that does not ed that Google did not have a fair use
materially impair the marketability defense and found liability.

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54 IEEE POWER ELECTRONICS MAGAZINE z March 2020


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Expert View
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Gallium Nitride Integration:


Breaking Down Technical Barriers Quickly

A
n integrated circuit (IC)
made using gallium nitride 23 21 20 13 14 15
on silicon (GaN-on-Si) VB DZH VDDH
Vin
substrates has been in production
for more than five years. The Sep- Boot
tember 2018 issue of IEEE Power Strap REG UVLO
Electronics Magazine included an
update on the GaN integration of Vcc
24
power devices, which indicated
rapid progress toward a complete Logic
system-on-a-chip solution [1]. This EN
25
article stepped through various
phases of integration, from pure dis-
DZL Level
crete devices to monolithic half- 9 REG
Shift UVLO 16
bridge devices, to power field-effect VSW 17
transistors (FETs) that included 8 VDDL (PAD2)
18
their own monolithically integrated INH 19
26
driver. Since the 2018 update, there
Logic and
has been a good deal of progress in Antishoot
the state of GaN integration, pri- INL
27 Through
marily spearheaded by two differ-
ent GaN companies, Efficient Pow-
er Conversion (EPC) and Navitas PGND
Semiconductor.
The challenge has been integrating 1 2 3 4 5 6 7
(PAD1)
all functions necessary for a complete
(a)
power conversion solution on a single
chip. As there are many types of power
conversion topologies, there are many
types of possible solutions. However,
one building block stands out as the
most common: the half bridge. Since
half bridges are used in buck convert-
ers, boost converters, converters con- 6 × 8 mm QFN
figured as two inductors and a capaci-
(b)
tor, bus converters, motor drives, and
FIG 1 The Navitas Semiconductor is delivering 650-V GaN ICs that monolithically
Digital Object Identifier 10.1109/MPEL.2019.2959469 integrate drivers, the level shift, and many other critical circuit functions into two
Date of current version: 19 February 2020 power devices, all in (a) GaN and (b) a small 6 × 8 mm quad-flat no-lead.

56 IEEE POWER ELECTRONICS MAGAZINE z March 2020


Capacitors for Power Electronics

Advanced Capacitor Technology


Aluminum Electrolytic
AC Film
DC Film www.cde.com
RF Mica
Supercapacitors
eliminates parasitics in the drive loop
95
GaN ACF and achieves near-perfect waveforms.
227 KHz 295 KHz
94 When used in soft-switching applica-
93 tions, such as active clamp flyback,
Efficiency

257 KHz
improvements in both switching fre-
92
217 KHz quencies and efficiencies can be
91 achieved simultaneously, when com-
352 KHz
90 Si QR pared with traditional hard-switching
390 KHz
Si-based performance (Figure 2).
89
90 115 140 165 190 215 240 265 The EPC is pursuing two parallel
VAC paths for advancing GaN technology:
1) improving the underlying GaN-on-
FIG 2 The Navitas GAN ICs in soft-switching topologies achieve efficiencies of 95% in
this 45-W active clamp flyback, with up to 50% less power loss when compared to Si. Si technology to harvest the remain-
ACF: anisotropic conductive film. ing theoretically possible 300× die
size reductions [1] and 2) adding
many more converter topologies [2], it Navitas Semiconductor [3] and is more and more useful functions to
is a worthwhile endeavor to create shown in Figure 1. It has two 650-V ICs. To make rapid progress in the
integration around them. power devices with fully integrated second of these two paths, a stable,
This past year has seen two solu- gate drivers, high-voltage level shift- well-characterized library of passive
tions to this challenge. The first is ing, undervoltage lockout (UVLO), and active components that can reli-
targeted at the high-voltage market, voltage regulation, bootstrap circuit, ably and predictably integrate mono-
with early implementations targeting and antishoot-through protection. lithically is required.
universal serial bus connector fast Combining the drive and level- The first-generation EPC eGaN
chargers. This solution comes from shift circuits with the power device ICs were “handcrafted” based on trial
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and error and highly educated guess- include parasitic interactions; are creates a natural tension with the
es. However, to achieve the best and characterized overall with tempera- quickly improving discrete FET per-
most reliable performance, technolo- ture, voltage, and current conditions; formance. On the one hand, it takes
gy platforms must be translated and include realistic process varia- time and effort to fully characterize a
into a rich set of models that scale; tions. This is no small task, one that technology platform. On the other
hand, if the technology platform is
changing more quickly than the char-
acterization process, then the IC
VDD VDDF VIN
products lag behind their discrete
counterparts in performance and
Sync
Boot
cost-effectiveness.
The initial output of this more for-
HSIN malized approach was first demon-
Level Output
Shift
strated in March 2019. It is a fully
Driver
SW
monolithic half bridge that integrates
Logic all of the drive and level-shift functions
and along with the bootstrap function. The
VDD
UVLO
simplified circuit diagram containing
LSIN
Output all of the essential functions of a power
Driver stage is shown in Figure 3 and the actu-
al device is presented in Figure 4.
GND GND Although simple compared to mod-
ern digital processors, this single-chip
power stage provides a first demon-
FIG 3 All the basic functions of a power stage are shown in this simplified circuit
diagram, including output FETs, drivers for these FETs, level shifting for the high-side stration of the integration of many
circuitry, input logic and protection, and a synchronous bootstrap function to generate important fundamental functions. It
the voltage needed to drive the high-side circuitry. GND: ground. includes comparators, a central build-
ing block for decision making in an IC;
feedback for control of output action;
latching for isolation of input and out-
Battery technology put; electrostatic discharge immunity
for assembly robustness; and voltage
calls for the isolation between high- and low-side
devices on a single substrate. Nearly
best protection any IC can be made with only this set

there is
of building blocks. Although refine-
ment and improvement will continue at
a rapid pace, this first demonstration
shows the immense opportunity avail-
able for GaN ICs and the bright future
GaN has for increasing the perfor-
mance and cost of power conversion.
This product from EPC (part EPC2151)
was designed for a buck converter
topology with an on-resistance ratio of
approximately 3:1 between the low-
and high-side transistors.
Figure 5 shows the system effi-
Perfect solutions for your ciency of the monolithic power stage
energy storage units – (green line) when it is operated as a
SIBA fuses in battery installations
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3.9 mm

LSin GND GND

HSin SW SW

2.6 mm
Vdd SW SW

VddF VIN VIN

FIG 4 The EPC2151 is a fully monolithic implementation of


the circuitry in Figure 3. It was designed to operate as a buck
converter up to 2 MHz with an input up to 80 V and an out-
put of 10 A. The chip measures 10 mm2.

in power loss versus the Si solution. Also shown in Figure


5 is the advantage gained by integrating the driver and
the power FETs on the same chip. The blue line is the
measured efficiency of the identical half-bridge, but with
the driver and level shift in a separate Si-based IC. The
reduced inductance in the gate loop when the driver and
power devices are in intimate contact on the same chip is
the main reason for the significantly improved efficiency.
The half-bridge topology is also useful in many appli-
cations beyond dc–dc buck converters. For example, a
second single-chip component from EPC, the EPC2152,
has the same functionality as the EPC2151 monolithic
power stage, but with symmetric high- and low-side
FETs. The EPC2152 was designed to be used in the pri-
mary side of an isolated dc–dc converter or for brushless
dc motor drives.
With a well-defined and rich set of scalable models
based on the latest GaN technology platform, the chal-
lenge for further integration shifts to adding even more
functionality on a single chip. The ultimate goal is to
achieve a single-component IC that merely requires a
simple digital input from a microcontroller and produces
a power output that drives a load efficiently, reliably
under all conditions, in the smallest space possible, and
economically. To achieve this goal, sensors for current
and temperature will need to be added. In addition, more
digital control functions will also improve performance,
lower cost, and reduce the overall engineering required
of the power system designer. Look for these added fea-
tures and functions over the next couple of years.
Discrete power transistors, whether Si based or GaN-
on-Si, are entering their final chapter. Integrated GaN-
on-Si can offer higher performance in a smaller footprint
with significantly reduced engineering required.

About the Author


Alex Lidow (alex.lidow@epc-co.com) received his B.S.
degree from the California Institute of Technology, Pasa-
dena, in 1975 and his Ph.D. degree in applied physics as
a Hertz Foundation Fellow from Stanford University,
power MOSFETs and GaN FETs. He
Performance Comparison
95 coauthored GaN Transistors for Effi-
cient Power Conversion, the first text-
94
book on GaN transistors. He was
93
elected to the Engineering Hall of
Efficiency (%)

92
Best Si Performance Fame and received the 2015 SEMI
91 Award for North America for innova-
90 tion in power device technology.
89
88 EPC2151
References
87 uP1966A + HB_GaN FET [1] A. Lidow, “Gallium nitride integration: Going
where silicon power can’t go [Expert View],” IEEE
86
0 1 2 3 4 5 6 7 8 9 10 11 Power Electron. Mag., vol. 5, no. 3, pp. 70–72, Sept.
Iout (A) 2018. doi: 10.1109/MPEL.2018.2850738.
[2] A. Lidow, M. de Rooij, J. Strydom, D. Reusch,
FIG 5 The EPC2151 power stage operating at 1 MHz (blue line) has an overall power and J. Glaser, GaN Transistors for Efficient
loss (including inductor and control IC) at 10 A that is 30% lower than the best Si
Power Conversion, 3rd ed. Hoboken, NJ: Wiley,
MOSFET solution (red dot) when operated with 48 VIN and 12 VOUT . The green line
shows the comparative performance when the driver is fabricated in Si and 2020. [Online]. Available: https://epc-co.com/epc/
separated from the half bridge. Products/Publications/GaNTransistorsForEffi
cientPowerConversion.aspx
California, in 1977. He is the chief the CEO of International Rectifier [3] J. Mitchell, “Gene Sheridan charging into the
executive officer (CEO) and cofound- Corporation. A co-inventor of the future,” EasyReaderNews, Apr. 3, 2019. [Online].
er of Efficient Power Conversion HEXFET power MOSFET, he holds Available: https://easyreadernews.com/charging
(EPC) Corporation, El Segundo, Cali- many patents in power semiconductor -into-the-future/
fornia. Prior to founding EPC, he was technology, including basic patents in 

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2018-01-25_Halfpage.indd 1 March 2020 z IEEE POWER ELECTRONICS MAGAZINE 63


2018-01-26 09:55:56
Society News
By Ashok Bindra

APEC 2020 Brings the Latest in


Power Electronics Technology

C
ontinuing its long­standing A day before the conference, PELS capacitor­technology challenges re ­
tradition of bringing the lat­ and PSMA will host two workshops sulting from the introduction of galli­
est advances in power elec­ simultaneously. The high­frequency– um­nitride and silicon­carbide topolo­
tronics technology and applications magnetics workshop will focus on the gies, the impact of e­mobility, and
to practicing professionals and requirements of higher application fre­ other issues. The impact that market
researchers from around the world, quencies, while the capacitor work­ shortages have on new developments
the 35th annual IEEE Applied shop will shed light on application and possible solutions will be in­
Power Electronics Conference and challenges and new cluded. The capaci­
Exposition (APEC) returns to New capacitor technolo­ tor technologies to
Orleans, Louisiana, in 2020. It will gies. The high­fre­ APEC sponsors will be reviewed include
be held at the New Orleans Ernest quency–magnetics supercapacitor s,
offer the Student
N. Morial Convention Center from workshop’s morning tantalums, polymer
15 to 19 March. New Orleans was session will offer lec­ Attendance Travel horizontal chips, ce­
the venue for the first APEC 35 tures on modeling Support Program that ramic specialties,
years ago. Sponsored by the IEEE and character iza­ provides up to and the latest film
Power Electronics Society (PELS), tion; the afternoon US$1,000 per student developments. Eight
IEEE Industry Applications Society, per iod will survey toward travel and technology­demon­
and Power Sources Manufacturers winding techniques. stration stations will
conference expenses
Association (PSMA), APEC 2020 is At lunchtime, there be available during
expected to attract nearly 6,000 will be an interac­ for as many as brea k fa s t , lu nch,
engineers and researchers for five tive technology dem­ 60 students. and following the
days of professional netw o r k i n g , onstration. Each day’s events.
hands­on learning, and strategic technical­presenta­ Professional edu­
business development as well a tion session will be followed by a pan­ cation seminars will t a k e p l a c e o n
vast exposition featuring state­of­ el discussion and Q&A. Tom Wilson of 1 5 March. Approximately 18 educa­
the­art products and services. SIMPLIS Technologies and Dr. Charles tional seminars will address the need
From components to instruments Sullivan of Dartmouth University for in­depth discussions of important
and tools, the three­day exposition will be the magnetics workshop’s and complex power electronics top­
will feature hundreds of manufac­ keynote speakers. The concluding re­ ics. Each one will combine practical
turers and service providers that marks by Alexander Gerfer of Wurth application with theory to further
cater to the power electronics Elektronik will review the day’s pre­ educate engineers working in power
community in a variety of ways. sentations and their potential impact electronics and related fields. The
The participating companies will on the power electronics industry. seminars will last for 3.5 h (including
display cutting­edge products and The capacitor workshop will ad­ breaks) and complement the technical
instruments for a variety of indus­ dress the needs of junior and ad­ papers and special presentations.
trial and military applications. vanced designers of dc­dc converters, The APEC plenar y session will
frequency drives, inverters, and other open during the a f t er noon of 16
Digital Object Identifier 10.1109/MPEL.2019.2961204
power­conversation applications. It March, with invited experts provid­
Date of current version: 19 February 2020 will also cover the application­based ing views of what the future holds for

64 IEEE POWER ELECTRONICS MAGAZINE z March 2020


Power Electronics Design &
Implementation Solutions

DSIM Revolutionizes Offline


Power Electronics Simulation
100x to 10,000x faster
than existing simulation tools

Simulate hundreds of different scenarios


or converters, microgrids and other systems

Non-ideal switch simulation


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Join us for a DSIM Introduction at APEC 2020 New Orleans


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psim.powersimtech.com/pels2020
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Revolutionary simulation speed Power converter & motor drive simulation Digital and analog control design Up to 144 PWMs
Small converters to large microgrids Analog & digital control simulation Verification of control loop stability Up to 60 analog inputs
Physical (non-ideal) switch models Thermal & magnetics simulation Graphical control design interface 400 kHz switching
Embedded code generation Pre-defined or generic topologies 200 kHz vector control execution
applied power electronics. Indus­ at the time this issue was going transportation power electronics,
tr y and academic viewpoints will to print. and power electronics applications.
be presented. During the technical sessions, The industry sessions will cover
The speakers include Prof. John p e er- r e v iewe d pa p er s w i l l be similar subjects. Additionally, a so­
Kassakian of the Massachusetts Insti­­ pres e nt e d o n t o pic s i nc lud i n g cial event will be held on 18 March
tute of Technology, David Dwelley a c - d c converters, dc–dc convert­ at Mardi Gras World and feature
of Maxim Integrated, Burak Ozpine­ ers, power electronics for utility themed entertainment, a jazz band,
ci of Oak Ridge National Laboratory, interfaces, motor drives and invert­ and a parade. APEC sponsors will
Prof. Robert Pilawa-Podgurski of ers, devices and components, power offer the Student Attendance Travel
the University of California Berke­ electronics integration and manu­ Support Program that provides up to
ley, and Balu Balakrishnan of Pow­ facturing, modeling and simula­ US$1,000 per student toward travel
er Integrations. The sixth speak­ tion, control, wireless power trans­ and conference expenses for as many
er, however, was not announced fer, renewable energ y systems, as 60 students.

Congratulations to
2020 Newly Elevated IEEE Fellows

S
ixteen IEEE Power Electronics Keith Corzine Burak Ozpineci
Society (PELS) members were For contributions to topology and For contributions to transportation
elevated to IEEE Fellow for 2020. control of multilevel converters. electrification and wireless charging
IEEE Fellow is the highest grade of electric vehicles.
of Institute membership, conferred Venkata Dinavahi
only by the IEEE Board of Direc­ For contributions to real-time simu- Wei Qiao
tors. Candidates must be Senior lation of power systems with embed- For contributions to condition mon-
Members with at least five years of ded power electronic converters. itoring and control of power elec-
IEEE membership. PELS congratu­ tronics interfaced rotating machine
lates the following members who Gerard Ledwich systems.
were recognized with the grade of For development of control of power
Fellow as of 1 January 2020. systems and power electronics. Chuntaek Rim
For contributions to wireless power
Mohamed Benbouzid Kevin Lee transfer for electric vehicles and
For contributions to diagnosis and For contributions to power quality mobile devices.
fault-tolerant control of electric for adjustable speed drives.
machines and drives. Mahinda Vilathgamuwa
Bradley Lehman For contributions to power quality
Jiann-fuh Chen For contributions to high-quality and grid storage.
For contributions to power electron- LED lighting and modeling and con-
ics in sustainable energy and high- trol of dc–dc converters. Sheldon Williamson
power systems. For contributions to electric energy
Shihua Li storage systems for transportation
Kawai Cheng For contributions to the theory of electrification.
For contribution to electric vehicle mismatched disturbance rejection in
technology and switched capacitor industrial systems. Xiao-ping Zhang
power conversion. For contributions to modeling and
Yun Wei Li control of high-voltage dc and ac
For contributions to power electron- transmission systems.
Digital Object Identifier 10.1109/MPEL.2019.2960069
ics converters in microgrids and
Date of current version: 19 February 2020 industrial drives.

66 IEEE POWER ELECTRONICS MAGAZINE z March 2020


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See Us At APEC Booth #1300


by Yongheng Yang and Prasad Enjeti

IEEE PELS Online Webinar Series Launches

T
he solar photovoltaic (PV) mar­ members and academics, were as­ on solar PV microinverter research
ket is growing fast across the sembled by the IEEE Power Elec­ in academia and industry.
globe. Solar PV energy can be tronics Society (PELS) Digital Me­ This was the first of the IEEE
utilized through various technologies dia and Education Committee. They PELS online webinar series, and it
that incorporate power electronics. provided different perspectives on was a significant success. There was
Among them is the microinverter, which solar PV microinverter technolo­ a total of 725 worldwide registrants,
achieves module-level monitoring and, gy and discussed the state of the art. and 370 participated, which was ad­
more importantly, individual power opti­ Prof. Philip Krein, Zhejiang Univer­ mirable, considering that they lived
mization (maximum-power-point track­ sity–University of Illinois at Urbana- in different time zones. They were
ing). The microinverter market is Champaign Institute, presented an engaged throughout the webinar,
expected to experience a compound overview of solar PV microinverter asking questions via the chat chan­
annual growth rate of 17.3% between technology. Dr. Yi Zhao, Hoymiles, nel. The 4-h event was recorded, and
2019 and 2025, reaching US$5.6 billion the largest microinverter company the video and presentation slides are
[1]. Since microinverters have so many in China, shared the company’s and now available for members to down­
advantages, the question is: Will they Chinese perspectives. Dr. Andrii load via the IEEE PELS Resource
replace the conventional central and Chub, Tallinn University of Technol­ Center (https://resourcecenter.ieee
string inverters? If so, what are the chal­ ogy, Estonia, and Dr. Andre Lind­ -pels.org/) during the coming weeks.
lenges and technical barriers that vest, UBiK Solutions, Tallinn, led a Each attendee received a brief sur­
should be tackled? And what other ben­ discussion of microinverter tech­ vey, and a detailed analysis of the
efits could microinverters bring to the nology and its pros and cons. Dr. event will be presented in the June
industry and the technology? Patrick Chapman, Enphase Energy, 2020 issue of IEEE Power Elec-
Several of these questions were Fremont, California, offered both tronics Magazine.
debated during an online forum U.S. and international perspectives,
on 12 December 2019. The partici­ including a briefing on the challeng­ Reference
pants (Figure 1), including industry es and opportunities in solar PV mi­ [1] Energias Market Research. Accessed on:
croinverter technologies. Prof. Issa Jan. 4, 2020. [Online]. Available: https://www

Digital Object Identifier 10.1109/MPEL.2019.2960671


Batarseh, University of Central Flor­ .energiasmarketresearch.com/solar-micro
Date of current version: 19 February 2020 ida, Orlando, shared his viewpoints -inverter-market-size/

Presenters Schedule (U.S. Eastern Time)

Dr. Prasad Enjeti and 8 a.m.–8.15 a.m.: Welcome/Introductions


Dr. Yongheng Yang
Dr. Philip Krein 8:15 a.m.–9 a.m.: Solar PV Microinverters: Technology Overview
Question and Answer Session: Dr. Prasad Enjeti and Dr. Yongheng Yang

Dr. Yi Zhao 9 a.m.–9:45 a.m.: Solar PV Microinverters, China Perspective: Hoymiles


Question and Answer Session: Dr. Prasad Enjeti and Dr. Yongheng Yang
Dr. Andre Lindvest and 9:45 a.m.–10:30 a.m.: Solar PV Microinverters Perspective: UBiK Solutions
Dr. Andrii Chub Question and Answer Session: Dr. Prasad Enjeti and Dr. Yongheng Yang

Dr. Patrick Chapman 10:30 a.m.–11:15 a.m.: Solar PV Microinverters, U.S. and International Perspective:
Enphase Energy
Question and Answer Session: Dr. Prasad Enjeti and Dr. Yongheng Yang
Dr. Issa Batarseh 11:15 a.m.–12 p.m.: Solar PV Microinverters: Research in Academia/Industry
Question and Answer Session: Dr. Prasad Enjeti and Dr. Yongheng Yang

FIG 1 The webinar presenters and schedule.

68 IEEE POWER ELECTRONICS MAGAZINE z March 2020


IEEE PELS ADVERTISING OPTIONS 2020
IEEE POWER ELECTRONICS MAGAZINE
PRINT & DIGITAL, WEBSITE TILE ADS, and
MONTHLY E-NEWSLETTER BANNERS

Over 35 years ago IEEE Power


Electronics started a newsletter. In
2014 we became a magazine. The
metrics on the right shows our growth
since then.

Publication Metrics
Accessed through Xplore over 40,000 times in 2019
Print Circulation Digital Circulation Distribution
11,200 10,420 Worldwide
METRIC 2014 2105 2016 2017 2018 2019
Published Pages 180 220 280 318 376 388
Featured Articles 12 15 16 20 20 15
Advertising Pages 31.58 39.25 48.5 59.75 73 75
Avg Advertisers
Per Issue 15 17 24 29 33 34
IEEE Xplore +
HTML Views 5,537 17,275 23,420 37,507 41,417 55,612

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19
in 20 Monthly
E-Newsletter Banner New our r
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Ban slett ls world t the
E-Newsletter covers various topics pertaining e w
E-N -mai omes ou nth
00 e
to the Power Electronics Society including 2 2 , 0 . It c very mo
m onth fe
conferences, webinars, member news and eac h
r s d ay o
Thu
society activities. last

Walter Chalupa PELS Magazine NSM • e-mail:chalupapels@aol.com • ph: +1 973-835-7015


by Mohamed Orabi

IEEE CPERE 2019 Held in Aswan, Egypt

S
ponsored by the IEEE
Power Electronics
Society (PELS), the
2019 IEEE Conference on
Power Electronics and
Renewable Energy (CPERE)
was held in Aswan, Egypt,
from 23 to 25 October. This
first PELS-sponsored con-
ference on African soil at­­
tracted academicians, stu-
dents, researchers, and
practicing engineers from
across the globe and gave
them an opportunity to
observe the historical and
modern engineering mar-
FIG 1 Conference attendees pose during the gala dinner at IEEE CPERE 2019.
vels in the land of ancient
civilization. In addition to
the advanced technical program that first presentation, “Evolution of Power by a representative from the National
spread across three days, the confer- Electronics: Past, Present, and Future.” ­Research Institute of Astronomy and
ence offered two interesting events: Prof. Frede Blaabjerg from Aalborg Geophysics, Helwan, Egypt, while an
the Sun Festival at the Abu-Simbel University, Denmark, followed with expert from the National Telecommu-
Temple, an ancient engineering phe- “Wind Power: A Technology Enabled nication Regulator Authority, Cairo, led
nomenon, on 22 October and a tech- by Power Electronics,” and Prof. Su- the second, “Smart Cities: Current and
nical visit to the Benban Solar Park, dip K. Mazumder from the University Future.” The Electricity and Energy Sci-
Egypt, one of the largest photovoltaic of Illinois, Chicago, entific Council at the
parks in the world, on 26 October. delivered “Multiscale Academy of Scientific
The conference program provided Control of Power Elec­­ Research and Technol-
In addition to 96
several activities that were offered in tronic Systems.” ogy, Cairo, moderated
Egypt for the first time. In addition to IEEE CPERE 2019 technical papers that the third, “E-Mobility:
96 technical papers that were presented included three rap were presented during Current Challenges
during 16 technical sessions, there were sessions that were 16 technical sessions, for Future Opportuni-
nine intensive seminars conducted by moderated by govern- there were nine ties in Egypt.” Other
PELS senior professionals. Three key- ment and industry intensive seminars social events included
note speeches were also included. Prof. representatives. The a gala dinner (Fig­­
conducted by
Fred C. Lee from Virginia Tech gave the first, “Renewable ure 1), sailboat excur-
Energy Challenges PELS senior sion, and trips to the
and Opportunities in professionals. Philae Temple and
Digital Object Identifier 10.1109/MPEL.2019.2959887
Date of current version: 19 February 2020 Egypt,” was overseen Nile Museum.

70 IEEE POWER ELECTRONICS MAGAZINE z March 2020


by Yuxi Men, Lizhi Ding, Grant Pitel, Minjie Chen, and Xiaonan Lu

PPPEAC Consortium Holds Inaugural


Meeting, Organizes Seminar on
Flywheel Energy Storage

O
n 6 September 2019, the
recently founded Prince­
ton­Philadelphia Power
Electronics Advancement Consor­
tium (PPPEAC) held its inaugural
meeting at the Andlinger Center for
Energy and the Environment at
Princeton University, New Jersey.
The organization’s mission is to
bridge interests and forge relation­
ships between local industry and
FIG 1 Attendees pose during the inaugural PPPEAC meeting.
academia. The event was sponsored
by the newly approved joint IEEE
Power Electronics Society/Industri­ Chapter. Magna­Power Electronics tioners, researchers, and educa­
al Applications Society (PES/IAS) Inc. (MPE), Flemington, NJ; Prince­ tors in New Jersey and Pennsylva­
ton University; and Temple Universi­ nia (Figure 1).
Digital Object Identifier 10.1109/MPEL.2019.2959893
ty, Philadelphia, collaborated to The meeting lasted for approxi­
Date of current version: 19 February 2020 assemble power electronics practi­ mately three hours, and speakers

March 2020 z IEEE POWER ELECTRONICS MAGAZINE 71


were invited to introduce themselves ■■Thomas Lawson, founder and presi­
and share their interests in power dent, CogniPower, Malvern
electronics. During the welcome re­ ■■Jianwu Cao, senior power electron­
ception, Dr. Grant Pitel, MPE chief ics engineer, EnerSys, Reading,
technology officer (CTO) and PPPE­ Pennsylvania.
AC chair, shared his vision for the PPPEAC will commit itself to ini­
organization. He remarked on the tializing and vitalizing collaborations
Pennsylvania–New Jersey region’s between local industry and academia
diverse group of power electronics in the field of power electronics. Reg­
providers and expressed his hope to ular and recurring Chapter meet­
engage the community through vari­ ings will be organized, rotating be­
ous activities. The opening remarks tween New Jersey and Pennsylvania.
were followed by extended intro­ Also, in coordination with the IEEE,
ductions from 13 speakers who de­ PPPEAC will host various activities
scribed the roles of their respective including field trips, IEEE Distin­
companies/institutions in the field. guished Lectures, local educational
These talks helped stimulate the ex­ FIG 2 Prof. Seth Sanders discusses seminars, and similar events.
flywheel energy storage.
change of ideas and generated dis­ On 3 October 2019, PPPEAC invited
cussions, with the potential for later Prof. Seth Sanders from the Univer­
collaborations. The presenters were ■■Vishram Deshpande, director of sity of California, Berkeley, to give a
■■Grant Pitel, CTO, MPE, PPPEAC power-supply development, NWL seminar, “Flywheel Energy Storage:
chair Inc., Bordentown, New Jersey A Utility-Scale Energy Solution for
■■Minjie Chen, assistant professor, ■■Fei Lu, assistant professor, Drexel the 21st Century,” which was also part
Princeton University, PPPEAC trea­ University, Philadelphia of the Andlinger Center Highlighted
surer ■■Hanan Fishman, president, Alencon Seminar Series (Figure 2). The pre­
■■Ira Pitel, founder, MPE Systems, Hatboro, Pennsylvania sentation reviewed the energy-storage
■■Xiaonan Lu, assistant professor, ■■Arash Khoshkbar-Sadigh, assistant landscape and focused on flywheel
Temple University, PPPEAC secretary professor, Pennsylvania State Uni­ energy storage to meet utilities’ opera­
■■Pete Losee, manager of device tech­ versity, State College tional challenges.
nology, United SiC, Monmouth ■■Xiaofan Wu, research scientist, The next PPPEAC meeting is sched­­
Junction, New Jersey ­Siemens uled to be held in February or March
■■Wenxin Liu, associate professor, ■■Ben Cohen, vice president of engi­ 2020. To join the PPPEAC and learn
Lehigh University, Bethlehem, neering, Momentum Dynamics, about future activities, please regis­
Pennsylvania Malvern, Pennsylvania ter at http://bit.ly/2My8Ove.

by Karthik Palaniappan

IEEE PELS Lecture on


Wide-Bandgap Power Electronics
O
n 6 November 2019, Prof. consin. The event was sponsored by ure 1). A facilities tour preceded the
Krishna Shenai, a Distin­ the joint IEEE Industry Applications lecture, and a gala dinner and raffle
guished Lecturer (DL) of the Society/Industrial Electronics Society/ concluded the event, all of which was
IEEE Power Electronics Society Power & Energy Society/PELS Mil­ sponsored by Milwaukee Tools.
(PELS), delivered an insightful speech, waukee Chapter, IEEE Milwaukee Milwaukee Tools Vice President
“Wide-Bandgap (WBG) Power Elec­ Section, and Milwaukee Tools. It was Kevin Staszak opened the meeting
tronics: Is This the Future of Energy attended by approximately 100 engi­ with an introduction to the company
Economy?” at Milwaukee Tools, Wis­ neers, faculty, and students from the and its products. Afterward, IEEE Mil­
University of Wisconsin–Milwaukee, waukee Section Chair-Elect Karthik
Digital Object Identifier 10.1109/MPEL.2019.2959888
Milwaukee School of Engineering, and Palaniappan introduced Prof. Shenai,
Date of current version: 19 February 2020 Marquette University, Milwaukee (Fig­ who delivered the lecture. He discussed

72 IEEE POWER ELECTRONICS MAGAZINE z March 2020


the events leading to his WBG power
electronics proposal during the 1980s,
when he worked at the General Electric
Research Center in Schenectady, New
York. He elaborated on the history,
evolution, and impending challenges
in this critical field of technology. Prof.
Shenai attributed WBG power tech­
nologies’ slow progress and market
penetration to fragmentation in the
power electronics supply chain and
fundamental problems associated with FIG 1 Approximately 100 engineers, faculty, and students from the Milwaukee area
the crystal­growth process that lead attend Prof. Shenai’s IEEE Distinguished Lecture on WBG electronics delivered at Mil-
waukee Tools on 6 November 2019.
to a high number of defects and an in­
creased manufacturing cost.
Throughout the lecture, Prof. She­ the high­end computer­server power December 2019 issue of Proceedings of
nai emphasized the reliability of pow­ supplies with 1 million hours of MT­ the IEEE.
er systems components and remarked BFs that are the backbones of today’s The lecture concluded with lively
that future electric­utility, transporta­ Internet infrastructure. He also il­ discussions and exchanges of ideas.
tion, and cyber infrastructures will lustrated an innovative methodology The proceeding was well received and
demand power systems with 1 million for the design of compact and robust turned out to be the largest event of
hours of mean time between failures power systems using WBG power the year for the IEEE Milwaukee Sec­
(MTBFs). He substantiated that claim devices and the need to develop a tion, since it drew participants from
by describing extensive investiga­ radically new crystal­growth process, out of state, including Region 4 Indus­
tions during the 1990s that delivered which is the subject of an article in the trial Engagement Chair Jim Riess.

March 2020 z IEEE POWER ELECTRONICS MAGAZINE 73


by Ahteshamul Haque

Jamia Millia Islamia University


Hosts ICPECA 2019

T
he Department of Electrical
Engineering (EE) at Jamia Mil­
lia Islamia (JMI) University,
New Delhi, India, organized the Inter­
national Conference on Power Electron­
ics, Control, and Automation (ICPECA)
on 16 and 17 November 2019. The con­
ference received 342 technical papers, of
which 157 were accepted after peer
review. Also, 128 papers were regis­
tered and presented during 21 parallel
sessions through two days. Delegates
from nine countries participated.
In addition to technical papers,
the conference included three tuto­
rials and four keynote addresses.
During the inaugural session, Dr.
Ahteshamul Haque, ICPECA 2019
convener a nd orga nizing cha ir, FIG 1 Dr. Ahteshamul Haque (center) poses with the four keynote speakers: (from
briefed the attendees about the con­ left) Prof. Huai Wang, Prof. Akhtar Kalam, Dr. Haque, Dr. A.K. Tripathi, and Prof. Frede
ference and the history of JMI, as it Blaabjerg.
was the university’s centennial cel­
ebration. Dr. Haque introduced the tronics technology is key to renew­ researchers can contribute. Prof.
keynote speakers (Figure 1): able energy integration and that the Wang informed the audience about
■■Prof. Frede Blaabjerg, Aalborg Uni­ reliability of power electronics con­ emerging technologies in power elec­
versity, Denmark; president, IEEE verters and associated components tronics applications.
Power Electronics Society (PELS) is very important. If reliability is not Prof. Zaheeruddin, ICPECA 2019
■■Prof. Akhtar Kalam, Victoria Uni­ taken into consideration when build­ technical chair, presented the con­
versity, Melbourne, Australia ing a solar power plant, the project ference report, while the head of EE
■■Prof. Huai Wang, Aalborg Uni­ will be less successful, according to at JMI, Prof. Z.A. Jaffery, and dean
versity Prof. Blaabjerg. The PELS president of the faculty of engineering and
■■Dr. A.K. Tripathi, director general, also congratulated Dr. Haque for or­ technology, Prof. Ibraheem, wel­
National Institute of Solar Energy ganizing the conference. Prof. Kalam comed the guests and delegates.
(NISE), Gurugram, India. discussed the smart grid technology Approximately 1,000 delegates and
During the first keynote, Prof. of the 21st century and remarked g ue s t s p a r t ic ip a t e d i n ICPE CA
Blaabjerg emphasized that power elec­ that India has a great potential to 2019. Madam Vice-Chancellor Prof.
implement it. Dr. Tripathi’s speech Najma Akhtar and Registrar A.P.
Digital Object Identifier 10.1109/MPEL.2019.2961205
highlighted the research activities Siddiqui recognized Dr. Haque for
Date of current version: 19 February 2020 at the NISE as well as areas where his work.

74 IEEE POWER ELECTRONICS MAGAZINE z March 2020


by Rodrigo P. de Lacerda, Amanda P. Monteiro, and Montiê A. Vitorino

Joint IEEE PELS/IAS Federal University of


Campina Grande Student Branch Chapter
Organizes a Seminar

L
ast year, board members of the Congress and Exposition and the IAS the IAS Chapters and Membership
joint IEEE Power Electronics Annual Meeting, in Baltimore, Mary­ Department Dinner, on 30 Septem­
Society/Industry Applications land, from 29 September to 3 October. ber, the SBC received a n awa rd
Society (PELS/IAS) Student Branch During the conference, they attended in the Outstanding Small Chapter
Chapter (SBC) at the Federal Univer­ two events that were aimed at category. Similarly, during the Lun­
sity of Campina Grande (UFCG), Bra­ improving Chapter activities: the IAS cheon Award, on 3 October, the SBC
zil, including Chair Rodrigo P. de Lac­ Chapters and Membership Workshop received the PELS Best Student
erda, Vice-Chair Amanda Monteiro, and the PELS Chapter Chairs Forum. Branch Chapter Award from the im­
and Secretary Nayara Lisboa, attend­ The events outlined the main mediate past president, Prof. Alan
ed the 2019 IEEE Energy Conversion IAS and PELS activities, respec­ Mantooth. The conferences provided
tively, and discussed the needs and an opportunity to share professional
Digital Object Identifier 10.1109/MPEL.2019.2959891
strategies for developing student experiences and meet international­
Date of current version: 19 February 2020 chapters around the world. During ly renowned researchers and others
FIG 1 Prof. Petar J. Grbović (holding the PELS flag on the right) with UFCG professors and students after his seminar on multicell
and multilevel power converters. (Source: UFCG PELS/IAS SBC; used with permission.)

who help to grow and develop the Power Converters: A Way to Go Be­ st udent s d i scu s sed approa che s
IEEE, PELS, and IAS. yond the Limits” (Figure 1). The UFCG t o br i ng u ndergraduates closer
On 13 November, Prof. Petar J. professors and SBC volunteers recog­ to academic research. The profes­
Grbović, a PELS Distinguished Lec­ nize that the IEEE DL Program is very sionals were Prof. Edmar Gurjão,
turer (DL) and professor at the Inns­ important for the dissemination of UFCG; Igor Pinheiro, a project man­
bruck Power Electronics Laboratory, scientific knowledge. ager at the Virtus research institute
University of Innsbruck, Austria, Likewise, on 20 November, the at UFCG; and Dr. Reuben Palmer,
visited the UFCG SBC and presented SBC held a new event, “Academ­ UFCG. More than 30 Chapter mem­
a lecture, “Multicell and Multilevel ics Talk,” where professionals and bers were present.

by Biju K

Joint Kerala Chapter Conducts Workshops,


Organizes Visit to Manufacturing Facility

I
n celebration of IEEE
Power Electronics Soci­
ety (PELS) Day on 20
June 2019, the IEEE Industry
Applications Society (IAS)/
Industrial Electronics Soci­
ety (IES)/PELS Joint Chapter
in Kerala, India, organized a
visit to Keltron, a manufac­
turer of power electronics
products in Trivandrum, Ker­ FIG 1 The joint IEEE IAS/IES/PELS Kerala Chapter visits Keltron.
ala (Figure 1). Student mem­
bers from various engineer­ ting ceremony, the attendees toured During the second half of the year,
ing colleges in Kerala participated the company, and engineers from the Joint Kerala Chapter conducted
in the event. Following a cake-cut­ the power electronics group de­­ several workshops. On 30 and 31
scribed various manufacturing tech­ August 2019, the Chapter, in asso­
Digital Object Identifier 10.1109/MPEL.2019.2959892
niques. Approximately 28 PELS ciation with the IAS Student Branch
Date of current version: 19 February 2020 members attended. Chapter (SBC) at Saintgits College

76 IEEE POWER ELECTRONICS MAGAZINE z March 2020


of Engineering, Kerala, conducted and technologies. EV and HEV mod­ Bangalore, India. Dr. Mangal is a Life
a two-day proficiency workshop, eling and simulation studies were Member of the IEEE and fellow of the
“Electric and Hybrid Electric Vehicle performed in a MATLAB/Simulink Institution of Engineers (India). He is
Engineering.” It was coordinated by environment. Case studies of state- the vice chair of the IEEE Life Mem­
Dr. Pinkymol K.P., a member of the of-the art technologies and design ber Affinity Group Kerala Section and
Joint Kerala Chapter Executive Com­ improvements for EVs and HEVs has more than 40 years of experience
mittee; Abraham George, a counselor were examined, taking examples in R&D and engineering in the field of
to the Saintgits IAS SBC; and Aravind from Chevrolet, Tesla, Toyota, and power electronics.
Anil, chair of Saintgits IAS SBC. The other automobile manufacturers. The The workshop began with a wel­
workshop was designed to enhance training program was attended by 60 come speech by Akshay P.L ., the
the academic and professional skills participants representing seven col­ IAS SBC CET chair, who thanked
of students, faculty members, and leges in Kerala, including Prof. Biju K, Dr. Mangal; Prof. Biju K.; Dr. Bijuna
other professionals. It offered theo­ secretary of the Joint Kerala Chapter. Kunju, vice chair of the Joint Kerala
ries, practicals, and demonstration On 21 September 2019, in coopera­ Chapter; and the participants for
sessions to enhance the participants’ tion with the IEEE Educational Ac­ making the event possible. Dr. Kunju
understanding of electric vehicle tivities Kerala Section and IEEE IAS followed with an inaugural address
(EV) design and the architecture SBC at the College of Engineering during which she expressed her pride
adopted by the EV industry. P. Pras­ Trivandrum (CET), India, the Joint in being associated with the IEEE
anthkumar, of Haritha TechLogix, Kerala Chapter organized a one-day and extended her support to IAS ac­
Benga lur u, India , conducted the workshop on the design of power tivities. She encouraged the students
training sessions. electronics products for engineering to utilize the workshop to the best
The main objective of the work­ students. The workshop was con­ of their ability and apply it in build­
shop was to give a brief overview ducted by Dr. Madhu Mangal, chief ing innovative products in the future.
of EV and hybrid EV (HEV) design consultant at Advanced Rail Controls, Dr. Mangal’s presentation began with

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High reliability multi-circuit and discreet feed-through (F/T) input, output, power and signal
line filters and filter/shielded connectors for military, defense and aerospace systems.

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March 2020 z IEEE POWER ELECTRONICS MAGAZINE 77


a broad overview of power electron­ The later part of the workshop cov­ Dr. Mangal, wherein students could
ics technology, its applications, and ered the design of UPS systems, with share their ideas and ask questions.
its future scope. Besides introducing an emphasis on system specifications. The attendees participated enthusias­
power electronics to nascent engi­ Some of the topics included static tically, and many senior engineering
neers, he discussed power electron­ switch devices, output filters, inverter students found the workshop very use­
ics products, including a variety of power devices, dc link capacitors, bat­ ful for their school projects. In sum­
power converters. tery banks, and rectifier power devic­ mary, the participants obtained a new
During the second part of the ses­ es. The workshop concluded with the insight on power electronics and ap­
sion, the focus shifted to uninterrupt­ students completing a task based on plying them to enhance and improve
ible power supplies (UPSs). It began the design of power electronics prod­ current technologies. The session con­
with an introduction to UPS systems ucts. Their ideas and solutions were cluded with Adharsh offering a note of
and was followed by a discussion discussed afterward. thanks and Prof. Dinesh presenting a
about their evolution, why we need Each session of the workshop was memento to Dr. Mangal. Thirty PELS
them, and a myriad UPS topologies. followed by an interactive period with members participated.

by K. Vinoth Kumar, P. Venkatesh Kumar, and S. Jebarani Evangeline

IEEE PELS SBC at KITS Organizes


Workshop on Green Energy

T
he IEEE Power Elec­ trial Research, Chennai Cen­
tronics Society (PELS) ter, India, who gave a motivat­
Student Branch Chap­ ing talk on global warming and
ter (SBC) at Karunya Institute brought about awareness to
of Technology and Sciences energy conservation among
(KITS) in Coimbatore, India, the faculty, researchers, and
organized a national-level students. Several practice exer­
workshop, “Green Energy cises were provided to help
Technologies—The Smart Way enhance the participants’ pro­
to Reduce Global Warming,” on gramming skills.
19 September 2019. It was The afternoon session was
made possible with help from also conducted by Dr. Ayyap­
Dr. A. Immanuel Selvakumar, pan, who presented some case
head of the Department of studies on domestic energy
Electrical and Electronics FIG 1 Event participants attending a presentation about and industry energy conserva­
green energy technologies by Dr. G.S. Ayyappan.
Engineering at KITS; Dr. S. Jeb­ tion (Figure 1). Approximately
arani Evangeline and Dr. P. 130 undergraduate students
Venkatesh Kumar, event coordinators; SBC counselor. The morning ses­ and faculty members participated
and Dr. K. Vinoth Kumar, IEEE PELS sion was led by Dr. G.S. Ayyappan, in the workshop, which concluded
principal scientist, Central Scientific w it h a v a le d ic t or y s e s s ion a nd
Digital Object Identifier 10.1109/MPEL.2019.2960070
Instruments Organization, a unit of distribution of certificates to the
Date of current version: 19 February 2020 the Council of Scientific and Indus­ participants.

78 IEEE POWER ELECTRONICS MAGAZINE z March 2020


by Andreas Wagener

Meeting of Joint IEEE IAS/PELS/IES German


and Austrian Chapters in Innsbruck, Austria

F
or the last few years, the joint
IEEE Industry Applications
Society (IAS)/Power Electron­
ics Society (PELS)/Industrial Elec­
tronics Society (IES) German and
Austrian Chapters have been holding
joint meetings in Austria. In 2011, they
met in Timelkam, and in 2013, they
came together in Graz. In late October
2019, the power electronics communi­
ties of the joint German and Austrian
Chapters met once again in Innsbruck,

Digital Object Identifier 10.1109/MPEL.2019.2960100


Date of current version: 19 February 2020 FIG 1 A visit to the i-PEL of Prof. Petar J. Grbovic.

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March 2020 z IEEE POWER ELECTRONICS MAGAZINE 79


The IEEE Transportation
Electrification Community
discusses technologies,
organizations and projects
enable the clean, connected and
efficient transportation and vehicular
systems of the future. Discussions
include electric and hybrid cars and
trucks, more-electric aircraft, electric
rail and light rail systems, electric ships,
off-road vehicles, grid interfaces and
other forms of more-electric transportation.

CONFERENCES/WORKSHOPS PUBLICATIONS
AIAA/IEEE Electric Aircraft ✔ IEEE Electrification
Technologies Symposium (EATS) Magazine
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A complete listing of all conferences and
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STANDARDS
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prepare standards

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Be part of the growing electrification revolution.


Connect with industry colleagues, practitioners,
researchers, students, and all others interested FREE for Members of IEEE
in advancing the field of electric transportation. Power Electronics Society
Digital Object Identifier 10.1109/MPEL.2019.2960902
taking advantage of some warm and art of reliability assessment of pow­ mean time between failures of 1 mil­
sunny fall days. Attendees were invit­ er semiconductor devices by device lion hours, the requirement of today’s
ed to visit the newly established Inns­ manufacturers, and the expectations reliable Internet infrastructure. Prof.
bruck Power Electronics Lab (i-PEL) of end-use customers. Shenai emphasized the need to develop
of Prof. Petar J. Grbovic, the Universi­ He illustrated the design and future power systems with similar re­
ty of Innsbruck (Figure 1). manufacturing of reliable compact liability performances, especially
On the first day, the group visited computer/telecom power supplies us­ when used for smart grid and electric
Innio Jenbacher GmbH and Co. KG, a ing advanced silicon and WBG power vehicle applications that demand ro­
leading manufacturer of gas-powered electronics switching devices with a bust power system infrastructures.
heat and power units. At Jenbacher,
the visitors could see the production
of the engines, which may have up
to 24 cylinders and generate up to
10-MW power. Most of the components
are finished manually, to achieve
the high accuracy required for long-
term reliable operation. These units
are used for decentralized and very
flexible power generation, including
uninterruptible power systems, for
data centers. Later in the evening,
the participants met at the restaurant
Stiftskeller in downtown Innsbruck
for socializing.
The second day included a visit
to the University of Innsbruck Insti­
tute of Mechatronics, where several
speakers, including members from
i-PEL, gave different presentations.
First, Prof. Clemens Zierhofer, head of
the institute, presented the Faculty of
Technical Sciences, its fields of com­
petences, and the recent investment
into electric engineering. A number
of new professorships have been es­
tablished, and new degree programs
in electric engineering have been re­
cently started.
Next, Prof. Krishna Shenai, Distin­
guished Lecturer (DL) of PELS, gave
an inspiring lecture, “Field-Reliability
of Compact Power Systems.” The lec­
ture began with Prof. Shenai review­
ing different technology drivers of
the information economy of the 20th
century and the ever-increasing en­
ergy economy. He emphasized the
need to develop miniaturized effi­
cient power systems with end-of-life
field reliability to sustain the energy
economy. Prof. Shenai then discussed
the history and evolution of wide-
bandgap (WBG) semiconductor de­
vices, their potential impact on the
development of high-density power
conversion systems, the state ofUntitled-1
the 1 6/3/10 4:36:05 PM

March 2020 z IEEE POWER ELECTRONICS MAGAZINE 81


The International Technology
Roadmap for Wide Bandgap
Power Semiconductors (ITRW)

Available Now from the IEEE Power Electronics Society

The 2019 Edition of the International Technology


Roadmap for Wide Bandgap Power Semiconductors
The key role of the International Technology Roadmap for Wide Bandgap Power
Semiconductors (ITRW) is to facilitate an acceleration in the R&D process
for this new technology to fulfil its potential.

ITRW provides a pre-competitive, embracing platform for entities to:


› Share R&D progress and identify opportunities and bottlenecks
› Identify most effective paths for technology development
› Develop technology specific content within working groups
› Create a reference framework for regional roadmaps

About
ing and promoting the research, education, innovations
The International Technology Roadmap for Wide Bandgap
and applications of WBG technologies globally by provid-
Power Semiconductors (ITRW) was co-initiated by IEEE
ing a reliable and comprehensive view of the strategic
PELS and organizations representing the USA, China,
research agenda and technology roadmap. This is done by
Japan, Europe, and UK in 2015. Wide Bandgap (WBG)
working closely with industry, academia, and relevant
material-based power devices are becoming available to
roadmap organizations.
engineers for many years. SiC and GaN devices have
superior characteristics compared to silicon and will Mission
eventually become pervasive the major application areas The International Technology Roadmap for Wide bandgap
of power electronics. However, displacing an existing power semiconductor (ITRW) will provide reference,
technology with a new, better technology is never easy guidance and services to identify the future research and
and is disruptive. technology developments of wide bandgap power
The history of technological change shows it is necessary semiconductors and their application, and thereby
to accelerate the transition from silicon to wide bandgap provide a reliable and comprehensive view on the Strate-
devices such as SiC and GaN. ITRW is dedicated to foster- gic Research Agenda and Technology Roadmap.

To download your copy, visit the IEEE Power Electronics Society Resource Center at:
https://resourcecenter.ieee-pels.org/

Free for PELS members

Digital Object Identifier 10.1109/MPEL.2019.2959894


Such development is challenged by the fragmenta­
tion of the power systems’ supply chains as well as
the high cost and unknown application­level reli­
ability of WBG semiconductor power devices. In his
presentation, Prof. Shenai also emphasized the need
to update the curricula of power electronics in the
various education systems to include the reliability
of both power system components and power con­
verters and to bridge the gap between power semi­
conductor devices and power electronics switching
converters. The lecture was followed by a lively dis­
cussion between Prof. Shenai and the audience.
This was followed by a lecture on power converter
topologies led by Prof. Grbovic, also a PELS DL. He
outlined the risk to increasing system complexity
by constantly aiming to invent new topologies. He
emphasized instead the need to rethink the existing,
well­known, and well­established topologies and to
optimize their different performance criteria using
advanced devices, design techniques, and control.
Prof. Annette Muetze, chair of the Austrian
Chapter, and Prof. Gerd Griepentrog, the Ger­
man counterpart, reported on the activities of
the respective Chapters. The next meeting of the
German Chapter will be on 5–6 March 2020 in
Dresden, Germany, with a visit to VEM Sachsen­
werk GmbH, a manufacturer of special electric
machines, and the Helmholtz Research Center
Dresden­Rossendorf. Likewise, the next meeting
of the Austrian Chapter will be organized around
the IEEE International Symposium on Power
Semiconductor Devices and ICs 2020, which will A L L- E L E C T R I C V E H I C L E
be held 17–21 May 2020 in Vienna, Austria. WINS 2019 TROPHÉE ANDROS
I C E R AC I N G C H A M P I O N S H I P

by Ronald DeLuca

The Long Island


Power Electronics
Symposium
Gets Bigger Photo: Bruno Bade / ©Trophée Andros
Mersen equipped the four electric race cars, designed by Exagon Engineering, supplying

C
battery cell protection components (monitoring laminated bus bars) and protection fuses.
ontinuing its tradition of hosting power elec­
tronics symposiums for the local community, EVpack-fuse
the Long Island Chapter of the IEEE Power
Electronics Society held its third annual Long
Island Power Electronics Symposium on 7
M-fuse FLEXIBLE MONITORING
DC FUSES BUS BAR

Digital Object Identifier 10.1109/MPEL.2019.2960257


Date of current version: 19 February 2020

E P. M E R S E N . C O M
Closed Loop Performance for Power
Electronics.” Isaac Cohen, Texas In­
struments, gave the speech, “Compar­
ing Transition Mode to Continuous
Conduction Mode,” to a large crowd
of engineers. Jeffery Fedison, ST, had
a very interesting presentation, “How
SiC MOSFETs Enable Electric Ve­
hicles With Enhanced Performance,”
and Mark Hendricks, Dehn, kept the
audience interested with his discus­
sion, “Methods, Products, and Mate­
rials Available to Meet the Require­
ments of the Direct Lightning Strike.”
FIG 1 Jin He of TDK Lamdba (front, standing) gives his presentation. The Industry Track Presentations
included “Power System Manage­
November 2019 at the Radisson Hotel posium. Although Glenair is ment and Programming Tools” by
in Hauppauge, New York. More than actively involved in many global Tom Mosteller, Analog Group; “Planar
52 exhibitors showcased products shows, this regional IEEE par­ Magnetics Technology Advantages”
including ac-dc power supplies, dc-dc ticipation was extremely advan­ by Jim Marinos, Payton Magnetics;
converters, power semiconductors, tageous to us. Many local cus­ “Power Quality Issues With High Pow­
passive components, magnetics, elec­ tomers visited our booth with er ac/dc Converters” by Dave Furnish,
tromechanical devices, thermal man­ current and future applications Torotel; “High Power SiC Modules up
agement and test equipment, and com­ that needed solutions we are to 1,200 A, 3.3 KV” by Eric Motto, Mit­
pliance services. Two technical lecture able to provide. Additionally, subishi; and “New Hybrid Capacitor/
tracks were held in separate cham­ our team met new individuals Battery” by Mark Cebbia, Nichicon.
bers. After a complimentary network­ as customers that we did not Other presentations included “EMC,
ing lunch, the lectures began with the know before. I believe this show Inductors, and Filtering” by Doug
keynote address, “Trends in Power was very beneficial to the cus­ Toth, Wurth, and “Vampire Power De­­
Electronics: 1970 to 2019,” by Josh tomer and supplier side. Thanks mand Pulse Regulation” by Tom
Hauser, now retired, who was former­ again for the invite; we plan on Lawson, CogniPower.
ly director of TDI Power. He chroni­ sponsoring this event again in The event drew praise from ex­
cled the changes that occurred in the the future. hibitors and attendees representing
merchant power-supply business dur­ The symposium offered two tech­ all power electronics sectors, in­
ing the past 50 years, including an nical presentation tracks, “Technical cluding military, industrial, original-
overview of the evolving technology, Presentations” and “Industry Track equipment manufacturers, medical,
regulation, and market. Presentations,” for a total of 12. The space, consumer, and automotive. Hal
Since the symposium’s launch in Industry Track Presentations were Charych, who works in program man­
2017, it has continued to grow and at­ added last year and continued to be agement and business development at
tract power professionals, engineers, well received. They include detailed BC Systems, said:
designers, and component manufac­ information regarding specific techni­ BC Systems has been making
turers from the tri-state area and be­ cal solutions in a forum that includes military power supplies for over
yond, including regional and world­ key decision makers. 35 years. We do not advertise;
wide corporations. As a result, there Presentations included relevant so, few people besides the
were more than 475 participants at topics from TDK Lambda, Texas In­ major military contractors
the 2019 event. According to the orga­ struments, Analog Devices, ST, Key­ know that we exist. This sympo­
nizers, each exhibitor was engaged in sight Technologies, Wurth Electron­ sium gives us a chance to show
discussing its products and services. ics, Dehn, Payton America, Torotel, our name, get together with
The symposium is free and offers sub­ Mitsubishi, Nichicon, and Cogni­ local suppliers that we buy
stantial value to the exhibitors and Power. They began with a presentation from, and to meet local military
power professionals. by Jin He, TDK Lambda (Figure 1), contractors based on Long
Anthony Gallucci, Glenair Mission “Bridgeless Isolated PFC Using GaN Island who we are not doing
Critical Solutions, said: Switches and Digital Control.” Dan business with. This is the only
This year was the first time Gle­ Schwarz, Keysight Technologies, de­ trade show that we do, and the
nair participated in this Sym­ livered “Optimizing and Analyzing benefits always surprise us.

84 IEEE POWER ELECTRONICS MAGAZINE z March 2020


by Sergio Alejandro González

Joint IEEE IES/CSS/ Maximize Power


IAS/RAS/PELS/VTS Measurement
Insight
Argentina
Chapter and the
See how you can overcome tomorrow’s
power challenges.

Buenos Aires
Technological
Institute Sponsor
a Seminar COME VISIT US!
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measurements are made
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O
n Friday, 6 December 2019, the IEEE Power Solutions.

Argentina Section Joint Chapter Industrial


Electronics Society/Control Systems Soci­ APEC 2020 | March 15-19 | Booth 2025
ety/Industry Applications Society/Robotics and Auto­
mation Society/Power Electronics Society/Vehicular
Technology Society (IES/CSS/IAS/RAS/PELS/VTS)
tek_APEC_ad_2020.indd 1 1/30/20 9:24 AM
and the Buenos Aires Technological Institute spon­
sored a long­awaited PELS seminar in Buenos Aires.

Prof. Balda discussed


the recent Edge™ Powder Cores
developments in power
Best DC Bias for Cutting-Edge
electronics for electric-
power transmission
Performance and Compact Design
systems, sharing his 100%

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tronics and drives for microgrids, the bidirectional 10 100
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power electronics reliability analysis. VISIT US
Technical presentations were given by Frede AT APEC
Blaabjerg, PELS president a nd a professor
BOOTH
Digital Object Identifier 10.1109/MPEL.2019.2959889
#1625
Date of current version: 19 February 2020

www.mag-inc.com
AIAA/IEEE
ELECTRIC AIRCRAFT
TECHNOLOGIES
SYMPOSIUM
26–28 AUGUST 2020 | NEW ORLEANS, LOUISIANA

Building upon a successful event in 2018 and 2019, the 2020 Electric Aircraft Technologies Symposium
will look at progress over the past year and continue the discussion about the aerospace industry goals
for future aircraft. To accommodate rapid growth in emerging markets and ensure sustainability of air
travel, one approach being explored is using nontraditional aircraft propulsion: electric, turboelectric, or
hybrid-electric powertrains. AIAA and IEEE crafted this unique symposium to bring the aerospace
engineers and the electrical engineers together to discuss these topics and their challenges.

The 2nd annual EATS event in 2019 featured three days of technical content, including a keynote
address, panel session, and multiple technical presentation sessions each day of the event in which over
240 people from industry, government and academia attended.

For 2020, EATS will encompass three days of panel sessions, keynote addresses and technical sessions.
Papers for the 2020 event will be solicited in all relevant areas including, but not limited to, the following:

› Hybrid/Electric Propulsion Systems Architectures › High Voltage Considerations

› Electrical Energy Generation and Storage (including › New Material Solutions or Applications
battery, fuel cell, solar, turbo-electric, and others)
› System Controls and Modeling
› Electric Power Management and Distribution
› Electric Aero-Propulsive Coupling
› Failure/Fault Mode Protection, Diagnostics, and Modeling
› Integrated Vehicle Design (including fixed
› Electrical Machines and Power Electronics
wing and rotary wing)
› Superconducting and Cryogenic Systems
and Components › Mission Operation (Energy, Cost, Emissions)

› Propulsor-Machine Coupling › Verification and Validation

› Thermal Management › Safety, Certification and Standards

Sponsored by:
IMPORTANT DATES

Registration Will Be Opening


April 2020

Learn More:
propulsionenergy.aiaa.org/EATS

Digital Object Identifier 10.1109/MPEL.2019.2959470


FIG 1 Prof. Frede Blaabjerg (far right) delivers a key-
note address during the joint seminar. (Source: Argen-
tina Section Joint Chapter; used with permission.)

at Alborg University, Denmark; Prof. Ud aya


Madawala, Auckland University, New Zealand;
Prof. Osvaldo Micheloud, Tecnológico de Monter­
rey, Mexico; Prof. Juan Carlos Balda, University of
Arkansas, Fayetteville; Prof. María Inés Valla, Uni­
versidad Nacional de La Plata, Buenos Aires; and
Dr. Chen Hao, China University of Mining and Tech­
nology, Beijing.
Prof. Blaabjerg began his talk by introduc­
ing the latest developments in wind technology
from Denmark and the use of stress-strength
analysis for increasing the reliability of power
conver ters (Figure 1). Next, Prof. Madawa la
focused on bidirectional wireless EV charging,
especially for vehicle-to-grid applications. An­
other presentation was given by Prof. Micheloud,
who introduced his latest work on modulation
and advanced control design for asymmetric in­
verters and battery-management systems using
dynamic balance control.
Prof. Balda discussed the recent developments
in power electronics for electric-power transmis­
sion systems, sharing his work on silicon-carbide
and gallium-nitrite devices, followed by Prof. Valla
who focused on the finite-state-model-based control
of multilevel converters. Prof. Hao introduced the
latest research on the switched-reluctance motor-
drive system.
Other speakers, including Dr. Mario Pacas, Uni­
versity of Siegen, Germany, and Dr. João Onofre
Pinto, Federal University of Mato Grosso do Sul,
Campo Grande, Brazil, discussed PELS Region 9 is­
sues. Currently, Guillermo Catuaogno is the Chap­
ter chair and Lucia Pia Torres is the vice-chair. The
latest news from the Argentina Section Joint Chap­
ter can be found at https://webinabox.vtools.ieee
.org/wibp_links/index/CH09061.

norwe.com
March 2020 z IEEE POWER ELECTRONICS MAGAZINE 87
Event Calendar

2020 8–11 June


15–19 March Dubrovnik, Croatia
New Orleans, Louisiana, United States 11th IEEE International Symposium on Power Electronics
IEEE Applied Power Electronics Conference and Exposition (APEC) for Distributed Generation Systems (PEDG)

17–20 March 24–26 June


Hammamet, Tunisia Chicago, Illinois, United States
Fourth International Conference on Advanced Systems and IEEE Transportation Electrification Conference and Expo (ITEC)
Emergent Technologies (IC_ASET)
29 June–2 July
24–26 March Aalborg, Denmark
Berlin, Germany IEEE 21st Workshop on Control and Modeling for Power
11th International Conference on Integrated Power Electronics Electronics (COMPEL)
Systems (CIPS)
7–10 September
13–14 April Lyon cedex 06, France
Manhattan, Kansas, United States 22nd European Conference on Power Electronics and
IEEE Kansas Power and Energy Conference (KPEC) Applications (EPE’20 ECCE Europe)
13–16 April 27 September–1 October
Tunis, Tunisia Malmo, Sweden
Sixth IEEE International Energy Conference (ENERGYCon) IEEE 42nd International Communications Energy Conference
(INTELEC)
21–23 April
Nottingham, United Kingdom 4–7 October
10th International Conference on Power Electronics, St. Petersburg, Russia
Machines, and Drives (PEMD) XI International Conference on Electrical Power
Drive Systems (ICEPDS)
5–9 May
Seoul, South Korea 11–15 October
IEEE PELS Workshop on Emerging Technologies: Wireless Detroit, Michigan, United States
Power Transfer (WoW) IEEE Energy Conversion Congress and Exposition (ECCE)
5–9 May
14–16 October
Seoul, South Korea
Edmonton, Canada
IEEE Wireless Power Transfer Conference (WPTC)
IEEE Electric Power and Energy Conference (EPEC)
17–21 May
Vienna, Austria
25–27 October
Redondo Beach, California, United States
32nd International Symposium on Power Semiconductor
Devices and ICs (ISPSD) IEEE Eighth Workshop on Wide Bandgap Power Devices and
Applications (WiPDA)
18–22 May
Sochi, Russia 25–28 October
International Conference on Industrial Engineering, Philadelphia, Pennsylvania, United States
Applications and Manufacturing (ICIEAM) International Workshop on Power Supply on Chip (PwrSoC)

25–27 May 1–4 December


Suita, Japan Nadi, Fiji
Workshop on Wide Bandgap Power Devices and Applications in IEEE Fifth Southern Power Electronics Conference (SPEC)
Asia (WiPDA Asia)
15–18 December
28–30 May Jaipur, India
Monte-Carlo, Monaco IEEE International Conference on Power Electronics, Drives,
15th International Conference on Ecological Vehicles and and Energy Systems (PEDES)
Renewable Energies (EVER)
2021
31 May–3 June
Nanjing, China
21–25 March
Phoenix, Arizona, United States
IEEE Ninth International Power Electronics and Motion Control
Conference (IPEMC2020-ECCE Asia) IEEE Applied Power Electronics Conference and
Exposition (APEC)
Digital Object Identifier 10.1109/MPEL.2019.2960258
Date of current version: 19 February 2020

88 IEEE POWER ELECTRONICS MAGAZINE z March 2020


White Hot (continued from page 92)

the LED module lit up, although how semester were devoted to showing ables, like their transformer design,
well the dimming worked and how well the students the various circuit build- for example, we would be venturing
they met the specifications in general ing blocks they would need to create into giving them a recipe and taking
varied quite a bit. their LED driver. I told them in lec- away from the learning experience.
After the end of my second time ture about each block, what it did, Because the students really have no
teaching the project lab, I decided to and how to design it to achieve a idea about how to structure their
rethink the entire approach. It is a desired performance. I did not tell work when doing an original design,
challenge to create a design concept, them much about where in their LED we decided that the advantages of
do the electrical design, layout a driver each block might be used. I having weekly deliverables, and
printed circuit board (PCB), wind the even threw in some extra blocks that hopefully learning a bit about the
transformer, assemble the converter, they would not need, just to test their design process, outweighed the “giv-
debug it, take data for a test report, design thinking. ing them a recipe” factor.
and do an in-person demonstration Another change for this semester For this past fall, we started the
for an instructor in one semester. came from a suggestion by Prof. Bob semester with six weeks of intense
So I thought long and hard about Erickson. When Roger and I dis- lecture and weekly assignments.
how best to achieve the educational cussed with him the problem of stu- Most of the lectures were classroom.
objectives. To get the students to dents not understanding how to plan For a couple of lectures on topics that
working hardware would be much out the steps they needed to com- we considered review, such as op-
easier if they were given a step-by-step plete their design, he suggested we amps and op-amp circuits, we only
guide. This is when I realized, “You make the students turn in something provided the slides.
don’t learn to cook from a cookbook.” every week. Whether this was grad- The first assignment was an inten-
I have cooked for myself most of ed in detail or was a simple “check sive review of op-amp and TL431 cir-
my adult life. I made good use of cook- off” did not matter. The goal was to cuits, focusing on circuits they would
books and was able to prepare good keep the students moving forward need in their design. The second
meals. But it was not until I took cook- on their design. assignment was a basic design of a
ing classes from a professional chef Roger and I discussed this and flyback and single transistor forward
and started studying cooking instruc- appreciated the value of the students converter. From there, the assign-
tion that showed the science of cook- doing something every week. If we ments became more focused on their
ing, such as Alton Brown’s TV show simply told them to give us an update design. In successive weeks, the stu-
Good Eats and Cook’s Illustrated mag- each week, letting them make their dents had to develop a design con-
azine, that I really learned cooking own way through the design process, cept for their LED driver (topology,
versus just following a recipe. Know- it was highly likely they would floun- operating mode, choice of control IC),
ing not just how to combine a given der about and lose precious time. If a first pass schematic and parts list, a
list of ingredients, but why, greatly we gave them specific weekly deliver- transformer/flyback inductor design,
improved my cooking. My wife and I
only very occasionally eat at a restau-
rant as I can make tasty, healthier, and
less expensive meals at home.
So the task for me was to figure out
how to teach the students more than
just how to follow step-by-step direc-
tions that they would find in a power
supply design cookbook. I wanted to
teach more of the original thinking,
why this particular circuit is used and
not just how. Yet, the reality is that
the class in only a semester long. The
question was how to find the balance
between giving them a recipe from a
cookbook and inspiring them to make
their own original creation.
I describe the approach I came up
with as “dumping the Legos on the
table.” The first six weeks of the FIG 1 A student’s LED driver board. (Source: Robert V. White.)

March 2020 z IEEE POWER ELECTRONICS MAGAZINE 89


control loop design, and finally the onstration, each student had to show work? In short, Roger and I both
complete schematic and parts list. me the LED driver operating over the think this worked very well. The
The next step was a week of full range of input and output while I demonstrations went very well. All
design reviews, in which the instruc- took some basic data. I also had a students had the LED lit up, all driv-
tors met individually with each stu- couple of questions about the opera- ers worked over the full ac line
dent for an hour. The goal was not to tion of LED driver circuits to get a range, and all of the students had
find every design flaw but to identify feel for the depth and correctness of working dimming (although some
designs that were seriously off track their understanding. were better than others). Of the 19
or any ma jor design f laws that To give you a better idea of the students in the 2019 class, only two
would have prevented the LED driv- project, Figure 1 shows a student’s had their drivers fail during the dem-
er from working. LED driver board. The board is 4 × 6 onstration. Overall, the level of per-
After the design reviews, the stu- in (101.6 × 152.4 mm). formance to the specification was
dents updated their designs and had After the demonstrations, the stu- higher than in previous years. The
about a week to design their PCBs, dents have a week to complete a final final reports were due today but,
then a week to procure their PCBs report, which contains questions based on a quick look, overall the
and parts, and a week to assemble posed as if the students were in an student’s understanding is better
their boards. This left them with just interview. The questions asked about than the previous two years.
three weeks to debug and collect their design in particular, some From this I conclude that we have
data for a formal test report. power supply questions in general, found a good balance of “cookbook”
Then came the in-person demon- and then questions like “What did (the intensive lecture series) and
stration with me, which was a very you learn?” and “What was your big- requiring original thinking, analysis
stressful final exam. I had a checklist gest mistake?” and synthesis, and design work.
to assure that each student was eval- How well did this approach of While there can still be some tuning
uated in the same way. For the dem- “more lecture, a little less lab time” of the lectures and the overall class
schedule, if I teach the lab again in
the fall of 2020, I will follow this same
general approach. It was a good
semester. The students learned a lot
and so did the instructors!

About the Author


Robert V. White (bob.white@ieee
.org) has more than 30 years of indus-
try experience as a power electronics
engineer. He has worked in product
design, systems and applications engi-
neering, and technology development.
He has been an active volunteer with
the IEEE Power Electronics Society,
serving several years on the Adminis-
trative Committee, two terms as tech-
nical vice president, and as a Chapter
chair. He earned a B.S.E.E. degree
from the Massachusetts Institute of
Technology and an M.S.E.E. degree
from Worcester Polytechnic Institute.
He is currently pursuing a Ph.D.
degree in power electronics at the
University of Colorado, Boulder. Pres-
ently, he is the chief engineer of
Embedded Power Labs, a power elec-
tronics consulting company. He is a
Fellow of the IEEE.

90 IEEE POWER ELECTRONICS MAGAZINE z March 2020


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found them through IEEE Power Electronics Magazine.

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Digital Object Identifier 10.1109/MPEL.2019.2954633

March 2020 z IEEE POWER ELECTRONICS MAGAZINE 91


White Hot
by Robert V. White

You Need More


Than Cookbooks

Y
“ ou don’t learn how to cook rent from 0 to 1,200 mA, as the dim- stand the various operation modes of
from a cookbook.” This ming control voltage varies from 0 to a control integrated circuit (IC). They
came to me while planning 10 Vdc. also were very weak in understanding
the teaching of this past semester’s For most of the students, this is power MOSFETs and the design of a
power electronics project lab. In a their first original design. Almost all magnetic device (transformer or fly-
previous column, I talked about of them come to the class with no back inductor). We found that most of
teaching a project lab at the Univer- industry experience. This is the first the students had no idea of how to
sity of Colorado–Boulder for mas- time they have to create (synthesize) design their LED driver, even at a
ter’s students who were going into a complete power converter rather block-diagram level. Nevertheless, all
industry and not continuing for a than just analyze one circuit function of the students were able to design
Ph.D. degree. The goal of the project as part of a homework problem. and build a driver that illuminated the
lab is for the students to do an origi- This past fall was the third time I LED module, although the students
nal design project under conditions have taught this class with the assis- had to put in way too many hours
as similar to industry as possible. tance of Roger Bell, another consul- under too much stress. At the time of
Rather than a weekly “build this, tant here in the Denver area. Roger the demonstration, many did not com-
take data, write a report” of the typi- and I have known each other for many ply with the specifications very well
cal university lab class, these stu- years and have collaborated on a few (such as being able to dim) and most
dents are given a specification and a consulting projects along the way. designs were not very robust.
schedule. The students are told The first time we taught the class, For the second year, we prepared
“what,” they are not told “how.” They we naïvely assumed that since these more lectures but still provided only a
are also given a standard parts library, were second year master’s students, schedule with major deliverables
component derating guidelines, and they would know pretty much all they (such as a concept report and a design
product safety requirements. Some of needed to know about the power, con- review package). We gave the students
the instructional objectives are learn- trol, and analog circuits needed for about four weeks from presenting
ing to design with ac mains power, this design. We prepared a few lectures their concept to meeting with Roger
learning to design for a wide range on industry-oriented topics like the and me for a one hour design review.
of operation of both input voltage concepts of creepage and clearance This did not work well. The stu-
and output load, and learning how to distances in product safety require- dents had no idea of the amount of
debug an original design. The major ments. I also prepared a lecture on the work and how to plan the design tasks,
goal of the class is to demonstrate flyback converter, as I knew this had such as designing the magnetics or
working hardware at the end of not been covered in any detail in the control loop. Instead, they left every-
the semester. main power electronics class. thing to the last few days. Only then did
The project is a 25-W constant- We were quite surprised to find they realize how much work they had
current output LED driver that must that these students were actually very to do and many did not have a work-
work from a universal ac input (85– poorly prepared. We found that they able design to present for the design
264 Vac) a nd va r y the LED cur- had no real knowledge of analog review. Again, despite these challeng-
design, including the characteristics es, all of the students managed to get
Digital Object Identifier 10.1109/MPEL.2019.2959357
of op-amps, common op-amp circuits,
Date of current version: 19 February 2020 or how to read a data sheet to under- (continued on page 89)

92 IEEE POWER ELECTRONICS MAGAZINE z March 2020


BATTERY

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Common questions

Powered by AI

Addressing the mismatch in drain/source inductances is critical in achieving balanced switching among parallel MOSFETs because mismatched inductances lead to uneven voltage drops and variations in the dynamic current distribution during switching events. Such mismatches can cause increased voltage stress, disparate energy losses, and circuit failure due to unequal current sharing. By carefully engineering the total effective inductance seen by each MOSFET, it is possible to ensure that all devices switch simultaneously with matched current sharing, reducing the risk of failure and improving the reliability of the assembly .

The decoupling method using RL impedance networks improves the performance of parallel MOSFETs by mitigating the effects of circulating currents in the gate-source paths. These circulating currents can cause severe ringing in the gate-source voltage, leading to delayed switching or damage. By using RL networks, high-frequency components are suppressed, ensuring stable gate-driving power and allowing for balanced dynamic currents among paralleled MOSFETs .

Switching frequency limits significantly impact the implementation of the proposed MOSFET paralleling technique because it dictates the viability of the method in high-frequency applications. The maximum feasible frequency for this technique is approximately 2.7 kHz, as determined by simulation, which ensures stability and performance. This restriction means it is best suited for low-frequency power-electronics applications, where extensibility and reliability are priorities over speed. Higher frequencies would require redesigned gate-driving and impedance networks to maintain performance levels while managing the increased reactive losses and potential instability .

Implementing linear layouts for MOSFETs in high-current applications simplifies the design and improves manufacturability by minimizing the complexity and size of the internal connection network. Linear layouts facilitate uniform current distribution and enhance thermal management due to predictable heat dissipation patterns. Compared to star configurations or other complex layouts, linear arrangements also make troubleshooting and scalability easier, making them suitable for applications requiring high-current and reliable performance, such as in solid-state relays for battery applications .

Isolated dc–dc converters provide galvanic isolation, effectively blocking circulating currents in gate paths, but they are often expensive and impractical due to their cost relative to discrete MOSFETs. The RL decoupling method, on the other hand, uses resistive-inductive elements to achieve similar high-frequency decoupling at a lower cost, addressing the same issues without the prohibitive expenses associated with isolated converters .

Solid-state relays provide several advantages over mechanical contactors in battery applications. They have a smaller profile, saving space within battery compartments and potentially increasing battery capacity. Solid-state relays offer faster switching speeds, operating within a few hundreds of nanoseconds compared to mechanical contactors, which require tens to hundreds of milliseconds. This rapid response time enhances protection in short circuit-sensitive applications, such as those using lithium-ion batteries, by reducing the risk of damage associated with delayed disconnection .

Experimental evidence supporting the effectiveness of the proposed MOSFET paralleling technique includes the consistent matching of switching waveforms during turn-on and turn-off events, as captured in Figures 6 and 7. The technique achieves current sharing from the first switching transient, with drain-source voltages and drain currents showing parallel alignment, ensuring equal stress and switching loss across MOSFETs. The experimental setup also demonstrates that the method allows incorporating a larger number of MOSFETs while maintaining performance .

The totem-pole BJT-based gate driver plays a crucial role in ensuring fast and synchronized gate signals for each individual MOSFET. This synchronization is critical for achieving balanced dynamic current sharing and minimizing switching time differences, which in turn reduces stress and switching losses across the MOSFETs. Additionally, the use of an optocoupler with the gate driver provides the necessary isolation for reliable operation at varying voltages .

The proposed method for dynamic current sharing among MOSFETs involves equalizing the summation of additional inductances in series with the drain and source terminals of the MOSFETs. This configuration balances the switching currents among paralleled MOSFETs without needing a star configuration. The benefit of this method is that it eliminates the practical limitation on the number of MOSFETs that can be placed in parallel, allowing for a very high-current device without drastically increasing prototype size or commutation loop sizes, as would be the case with the star configuration .

The challenges associated with using high inductance values in MOSFET switching loops include additional switching losses and the potential for unstable waveforms due to parasitic effects. These challenges are addressed by using impedance-based decoupling circuits and optocoupler isolation, as shown in the experimental setup where these components were removed to demonstrate their impact. Despite potential drawbacks, the low switching frequency of the application mitigates these effects, and proper layout and decoupling ensure stable and efficient operation .

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