At89c52 PDF

W.1 Y.COM W . WW 00Y.CO .
TW
W WW 00Y.CO .TW W
.100 M.T W.1 Y.COM W .1 M
WW 00Y.CO .TW W W WW 00Y.CO .TW
W 00 .T W.1 Y.COM W
W .1
. C O M W W.1 Y.COM W W
WW .100Y W W .100 M.T
W 00 .T
W O M.T W .C O W W.1 Y.COM W
WW .100Y.C M.TW WW .100Y M.T
W W .100 M.T
W O W O W W .C O
Features WW .100Y.C M.TW Y W
WW .100Y.C M.TW W
W .100 O M.T
• W O C
O WW .100Y.
W Compatible with MCS-51™ Products .C
WW • 8K 0Y.Cof In-System
0Bytes .TW Reprogrammable WW Flash 1 00YMemoryM.TW M .TW
. 1 M . O W O
•WEndurance: O CyclesWW WW .100Y.C M.TW
WW• Fully 0 0 Y.C 1,000 .Write/EraseT W W . 1 0 0Y.C M.TW
W.1 Static OM
Operation: 0 Hz to 24 MHz W O W O
WW • Three-level 0 Y.C Program.T W
Memory Lock WW 0 0 Y.C .T W WW .100Y.C M.TW
0 . 1 M
W.x18-BitYInternal
• 256 .CO RAM
M WW 00Y.CO .TW W WW 00Y.CO .TW
W•W32 Programmable
.10 0 T
M.Lines
W W .1 W.1 Y.COM W
W C O
I/O
W W .C OM W
W
• Three 16-bit Y.Timer/Counters W Y W W 00 .T
W
• EightW .100 Sources
Interrupt O M.T
W
W .100 O M.T W W.1 Y.COM W
.C Channel WW .100Y . C
•W W
Programmable
1 00YSerial M .TW M .TW W
W
0
.108-bit O M.T
. O W O .C
• LowWPowerW IdleYand .C Power.TDown W Modes WW .100Y.C M.TW WW .100Y M.T
W
W 1 00 O
WW Microcontroller
. M W O W .C
W WW 00Y.CO .TW WW .100Y.C M.TW .1 00Y M .TW
Description . 1 M W O W .C O
W WW 00Y.CO .TW WW .100Y.C M.TW WW with . 1 00Y 8KMBytes .TW
The AT89C52 .
is1 a low-power, M high-performance CMOS
W 8-bit O
microcomputer with 8K W C O
WW programmable .CO and WW .C .TWThe deviceW Flash
W Y. .TW
bytes of WFlash . 1 00Y M .TW erasable read only memory
.1 00Y (PEROM). M W . 100 O M
CO high W O W .C
is manufactured
W WW using 0 0 Y.Atmel’s .T Wdensity nonvolatile WW .1memory 0 0Y.C technology
.TW and is W .1 00Y M.T
W
compatible withWthe .1 industryOstandard
M 80C51 and 80C52 W O
instruction Mset and pinout. W W .C O
.C W .C .TW or by a W W.100Y OM.TW
The on-chip WW Flash allows
. 1 00Ythe program M .TWmemory toW be reprogrammed
. 1 00Y in-systemM
WW 00aY.versatile O .C
conventional W W
Wnonvolatile 0 .CO programmer.
Ymemory .T W ByWcombining C
.T W CPU WAT89C52
8-bit W
. 1 00Y M.T
W
with Flash on a monolithic .1 0 chip, M the Atmel AT89C52 isWa .1powerful O M
microcomputer W C O
W O .C WW .100Y . .TW
which provides WW a highly 0Y.C andMcost
0flexible .TWeffective solution WW to .many 1 00YembeddedM .TW control M
. 1 W O W O
applications. W
WW .100Y.C M.TW
O
WW .100Y.C (continued) .TW WW .100Y.C M.TW
M WW 00Y.CO .TW
W W Y .C O
W W WW 00Y.CO .TW W
W 00 .T W.1 Y.COM W .1 M
Pin Configurations
W W.1 Y.COM W W PDIP W WW 00Y.CO .TW
W 00 .T W 00 .T .1 M
PQFP/TQFP
W.1 Y.COM W W W.1 Y.COM W WW 00Y.CO .TW
W W
W .100 .T
(T2) P1.0 1 40 VCC
P1.1 (T2 EX)
W .100 M.T W.1 Y.COM W

P0.0 (AD0)
P0.1 (AD1)
P0.2 (AD2)
P0.3 (AD3)
(T2 EX) P1.1 2 39 P0.0 (AD0)

OM
P1.0 (T2)
W C O P1.2 3
W W
38
. C
P0.1 (AD1)
W W
WW .100Y. W W .100
Y
M.T
W .100 .T
VCC
P1.4
P1.3
P1.2
M.T OM
P1.3 4 37 P0.2 (AD2)
NC
W O P1.4 5 36
W P0.3 (AD3)
C O W W .C W
WW .100Y.C M.TW
P1.5 6
WW .100Y.
35 P0.4 (AD4)
.TW W .100
Y
M.T
44
43
42
41
40
39
38
37
36
35
34
O
P1.6 7 34
WP0.5 (AD5)
O M W .C O
W
WW .100Y.C M.TW WW .100Y.C M.TW WW .100Y .TW
P1.5 1 33 P0.4 (AD4) P1.7 8 33 P0.6 (AD6)
P1.6 2 32 P0.5 (AD5) RST 9 32 P0.7 (AD7)
W O W O M
WW .100Y.C M.TW
P1.7 3 31 P0.6 (AD6)
W O
WW .100Y.C M.TW
(RXD) P3.0 10 31 EA/VPP
WW .100Y.C M.TW
RST 4 30 P0.7 (AD7) (TXD) P3.1 11 30 ALE/PROG
WW 00Y.CO .T
(RXD) P3.0 5 29 EA/VPP (INT0) P3.2 12 29 PSEN
NC 6 28
W W NC
Y .C O (INT1) P3.3
W
13 28
W WW 00Y.CO .TW
P2.7 (A15)
W
(TXD) P3.1 7
W 27 ALE/PROG
00 .T (T0) P3.4 14 27
W.1 Y.COM W
P2.6 (A14)
.1 M
(INT0) P3.2 8 26
W W.1 Y.COM W
PSEN (T1) P3.5 15 26 P2.5 (A13)
W W WW 00Y.CO .T
W 00 .T
(INT1) P3.3 9 25 P2.7 (A15) (WR) P3.6 16 25 P2.4 (A12)
(T0) P3.4 10 W24
W .100
P2.6 (A14)
O M.T (RD) P3.7 17 24
W.1 Y.COM W
P2.3 (A11)
W W.1 Y.COM
iT1) P3.5 11 23 P2.5 (A13)
.C W
WW .100Y W .100
XTAL2 18 23 P2.2 (A10)
.TW
XTAL1 19 22 W
P2.1 (A9)
. 100 M .T M
M W .CO
12
13
14
15
16
17
18
19
20
21
22
W C O GND 20 21 W
P2.0 (A8)
W .C O W Y
W Y . W W 0 0 Y .T W W .1 0 0
W 00 .T
(WR) P3.6
(RD) P3.7
XTAL2
XTAL1
GND
NC
(A8) P2.0
(A9) P2.1
(A10) P2.2
(A11) P2.3
(A12) P2.4
W.1 Y.COM WPLCC W W.1 Y.COM W WW

W W
W
W .100 O M.T
W
W .100 OM
.T
.C
P1.1 (T2 EX)
C W W
WW .100Y. W Y
P0.0 (AD0)
P0.1 (AD1)
P0.2 (AD2)
P0.3 (AD3)
M.T
W .100 M.T
P1.0 (T2)
W O W C O
WW .100Y.C M.TW WW .100Y.
VCC
P1.4
P1.3
P1.2
NC
W O W
WW
6
5
4
3
2
1
44
43
42
41
40
WW .100Y.C M.TW P1.5

P1.6
7
8
39
38
P0.4 (AD4)
P0.5 (AD5)
W O
WW .100Y.C M.TW
P1.7 9 37 P0.6 (AD6)
RST 10 36 P0.7 (AD7)
W
(RXD) P3.0 11
O 35 EA/VPP
WW .100Y.C NC
(TXD) P3.1
12
13
34
33
NC
ALE/PROG
W
WW
(INT0) P3.2 14 32 PSEN
(INT1) P3.3 15 31 P2.7 (A15)
(T0) P3.4 16 30 P2.6 (A14)
(T1) P3.5 17 29 P2.5 (A13)
18
19
20
21
22
23
24
25
26
27
28
Rev. 0313G–04/99
(WR) P3.6
(RD) P3.7
XTAL 2
XTAL1
GND
NC
(A8) P2.0
(A9) P2.1
(A10) P2.2
(A11) P2.3
(A12) P2.4
1
W.1 Y.COM W . WW 00Y.CO .TW
W WW 00Y.CO .TW W
.100 M.T W.1 Y.COM W .1 M
W 00 .T W.1 Y.COM W
W .1
.C O M W W.1 Y.COM W W
WW .100Y W W .100 M.T
W 00 .T
W W .100 M.T
W O W O W W .C O
Block Diagram WW .100Y.C M.TW Y W
WW .100Y.C M.TW W
W .100 O M.T
W O C
W
WW .100Y.C M.TW
O
WW .100Y.C P0.0M- .T W
P0.7 WW P2.0.1- 0P2.7 0Y. M .TW
W O W O
W
WW .100V Y.C M.TW
O
WW .100Y.C M.TW WW .100Y.C M.TW
W O
CC W .CO .TW WW 00Y.CO .TW
WW .100Y.C M.TW WW .100Y W
W GND Y.CO W .C OM
PORT 0 DRIVERS PORT
W W.1 Y.COM W
2 DRIVERS
W W
W W
. 1 00 M .TW W
W . 100
Y
O M .T W
W .100 O M.T
W O WW .100Y .C
WW .100Y.C M.TW WW .100Y.C M.TW M .TW
W O W O W W .C O
WW .100Y.C MRAM TWADDR.
.REGISTER WW RAM.100Y.CPORTM0 .TW PORT 2 W QUICK.100Y M .TW
O W O W .C O
W WW
LATCH
WW .100Y.C M.TW
LATCH FLASH
00Y W
WW .100Y.C M.TW W . 1 O M.T
W O
W
WW .100Y.C M.TW
O
W W .C O
W WW 00Y.CO .TW W WW 00Y.CO .TW
W 00 Y .T W .1 M .1 M
W W.1 Y.COM W WW 00Y.CO .TW W WW 00Y.CO .TW
W 00 .T W .1 M
W W
W
W
0 B
.10REGISTER O M.T ACC
W
W .100 OM
.T STACK
W W.1 ADDRESS
PROGRAM M
.CO .TW
W Y .C W W W 0 Y.C T WPOINTER
W 0 0 Y
REGISTER
W 00 .T 0 . .1 M
W W
W
W .100 O M.T
W
W .100 OM
.T
W W.1 Y.COM W
C W .C W
WW .100Y. M.T
W W .100
Y
M.T
W 100
W.BUFFER OM
.T
W O W C O W .C
WW .100Y.C M.TW TMP2 WW TMP1.100Y .
M .TW W .100
Y
M .TW
W O W O
W
WW .100Y.C M.TW
O
W O W O
W
WW .100Y.C M.TW
O
WW 00Y.CO .TW
PC
W W Y .C O
W ALU
W WW 00Y.CO .TW WINCREMENTER
W
W .100 O M.T W .1
.C OM W W.1 Y.COM W
C W W
WW .100Y. M.T
W W INTERRUPT, 00YSERIAL
.1TIMER M.T
PORT, W
W.100 OM
.T
W O W
AND
C O
BLOCKS
W .C W
WW .100Y.C M.TW WW .100Y. M .TW W .100
Y
M.T
O W O PROGRAM W .C O
W
WW .100Y.C M.T W
PSW WW .100Y.C M.TW WW .100Y
COUNTER
M .TW
W O W O
W
WW .100Y.C M.TW
O
PSEN
W W .C O
W WW 00Y.CO .TW W WW 00Y.CO .T
TIMINGW 00 Y .T W .1 M
ALE/PROG
AND W.1 Y.COM W
INSTRUCTION
W W.1 Y.COM W DPTR WW 00Y.CO .T
W REGISTER
W 00 .T W
.100 W.1 Y.COM
CONTROL
EA / V W M.T W.1 Y.COM W
PP
RST W .C O W W
WW .100Y .TW W . 100 M .T W .100 M
W W .C
M
OPORT 1 W W Y .C O
W W W W
0 Y.CO
Y W W 0 .T 0
W 00 M.T 10 W.1
PORT 3
W.1 Y.COLATCH W W.LATCH .C OM W
W W Y W W
W
W .100 O M.T
W
W .100 OM
.T
C W .C W
WW .100Y. M.T
W W .100
Y
M.T
W O W C O
WW .10PORT 0Y.C1 DRIVERS .TW
W Y.
100
OSC
W .
W O M PORT 3 W DRIVERS
WW .100Y.C M.TW WW
W O
WW .100Y.C M.TW
W P1.0 - P1.7O
WW .100Y.C P3.0 - P3.7
W
WW
2 AT89C52
W WW 00Y.CO .TW W
.100 M.T W.1 Y.COM W .1 M
W .1 O M
W 00
W.1 Y.COM W
.T
W W.1 Y.COM AT89C52 W
.C W W 0
W W
. 1 00 Y
M .T W W
W . 10 0
O M .T
W .1 0
O M.T
W
WW .The Y.C
O
.TW the following WW standard .C
00Y features: .T8K W Port 2WW .100Y.C M.TW
1 00AT89C52 provides . 1 M O
W Wbytes of .C
M
O 256 bytes of RAM,W
Flash, W 32W I/O lines, Y .C O 16-bit Port 2 is an
three W W WW 0 Y.C
8-bit bidirectional
0 .TW
I/O port with internal pullups.
W 00 Y W
.Tsix-vector two-level interrupt . 0
10 architecture, M .T .1 buffers can Msink/source
. 1
timer/counters, M a W O The Port 2 W
output .C O four TTL inputs.
W
WW a full 0 Y
duplex.COserial.Tport, W on-chip W W
oscillator, 0 0 Y.Cclock cir-
and .T W When 1sWare W
.
written 1 0 0toYPort 2 M .TW
pins, they are pulled high by
cuitry.
0
W.1 In Y .C OM the AT89C52 is designed
addition, W W.1 withYstatic .C OM logic W W W
0 Y .CObe used W
W .TtoWzero frequency W 0 .T the internal W pullups and0
.1externally can T as inputs.
M. pulled low will As inputs,
W for operation
. 1 00 downM W
and . 10supports O M
two Port 2 pins that W
are C O being source
WW
W
software 0 Y.C
O
selectable .T
powerW saving W modes.
W
The 0 0 Y.CMode .TW
Idle W W
. 1 0 0Y.internal M .TW
0 W. 1 OM current (I ) because of the pullups.
.1
WW the00CPU OM Y.C
IL
WW 00Y.CO .TW
Wstops Y.C while .allowing W the RAM, WW timer/counters, 0 .T W 2 emitsW
Port the high-order address M byte during fetches
serialWport,.1 and interrupt O
T
M system to continue W
0
.1functioning.
C OM from external program W W.1 memory .C Oand
WThe W Power00Down Y. C
Mode .TW saves the W
W
RAM contents
.
00Y but M.external TW W .
Y
100use 16-bit M TW accesses to
.during
. 1 M . 1 O data memory W that O addresses (MOVX @
W .CO disabling WW Y .C W W W 0 Y.C2 uses .strong T W internal
WW the.1oscillator,
freezes
0 Y
M. T W all other W chip functions
0 0 until .T
DPTR). In this application, . 1 0Port M pul-
the nextW 0
hardware
.reset.
C O W W.1 Y.COMlups W when emitting W 1s.
WDuringYaccesses . C O
toW external data
WW .100Y M.T
W W
W .100 O M .T
memory that use 8-bit
W
W .100
addresses
.T
OM @ RI), Port 2
(MOVX
W O C W .C
W
PinWDescription 00Y
.C .TW WW .100Y .
emits
M
W contents W
.Tthe of the P2.1 Special
Y
00 Function M .TW Register.
W . 1 O M W C O W W . C O
. C W Y . W W 0 Y T W
VCC WW 1 00Y .TW W . 100 Port 2.Talso receives the high-order
M .10 address O M.bits and some
W . O M W O W
W programming Y. C
WW .100Y.C M.TW
control signals during W Flash and verification.
WW .100Y.C M.TW
Supply voltage.
. 100 M .TW
W CO 3 TW W O
GND
W WW 00Y.CO .TW WW .100Y.Port
Port
. WW .100Y.C M.TW
Ground. W.1 Y.COM W
3 M is an 8-bit bidirectional
WW I/O port with Ointernal pullups.
W W WW 00YThe .COPort 3.Toutput W buffers W can 0
sink/source 0 Y.C four TTL .TW inputs.
Port 0 W . 1 00 M .T . 1 M W .1 O M
W O W C O W .C
Port 0 is anW8-bit open
W 0 0 Y.C bidirectional
drain .T W I/O port. WW As an 1 0 Y.
When
0the
1s
M
are
.T
written
W to PortW 3 pins,
.
they
1 0Y
0as are pulled
M .TW by
high
W .1 M
Oeight W . internal
O pullups and can
WW 00Y.C
be used O
inputs. As inputs,
output port, each W pin can Y .C
sink TTL W inputs. WhenW W1s 0
PortY .C3 pins .T
that W are externally W being pulled low will .TW
source
W . 1 0 0 M .T . 1 0 M W . 1 O M
W O
are written to port W
impedance inputs.
0 pins, the pins
WW .100Y.C M.TW
O can be used as high-
WW .1current .C(I ) because of the pullups.
00Y IL M.TW WW .100Y.C M.TW
W O
W .C O WW Port Y .COserves
3 also
W the functions of
W Wvarious 0 Y.C features
special W
Port 0 can alsoW beWconfigured
.1 00 Y to be
M
the .T W
multiplexed Wlow-
W of
.1the 0
0 AT89C51,
O M .T as shown in the following W .1 table. OM.T
0
WduringYaccesses .CO .TtoWexternal pro- .C WWsignals Y. C
order address/dataW
W
bus
00this mode, WW Port 1 030Y also receivesM .TWsome control . 100for Flash M .TW
pro-
gram and data memory. . 1
In M P0 has internal W . O verification. W O
pullups.
W
WW .100Y.C M.TW
O
WW gramming 00Y
.Cand
.TW WW .100Y.C M.TW
W . 1 O M W O
Port 0 also receivesW the W bytes
Wcode 0 Y.C
O
during Flash .T W program-WW Port.1Pin 0 0Y.C Alternate .T WFunctionsWW .100Y.C M.TW
.1 0 M W OM W O
mi ng an d ou tpu ts the cW
W W o de 0b0yYtes .COdu r in.TgW pr o gr a m
W WP3.0 0 0 Y.C RXD (serial .T Winput port) WW .100Y.C M.TW
verification. External pullups are
W.1 Y.COM W
required during program
W W.1 Y.CTXD OM(serial output port) WW
W 0 Y .CO .TW
verification. W W P3.1
0 0 .T W .1 0
W 00 .T W.1 YINT0 OM M
Port 1 W W.1 Y.COM W W
P3.2 . C (external W interrupt 0) W WW 00Y.CO .TW
W 100 .T W 00 M.T W.1 Y.COM
Port 1 is an 8-bit bidirectionalWI/O W.port with .C OM pullups.
internal P3.3 W W.1 Y .
INT1C O(external
Winterrupt 1) W
Y W W .100 M.T
W 00 .T
The Port 1 output buffers can sink/source
W
W .100 fourOTTL M.Tinputs. W . C O W W.1 Y.COM
1W Y.C TWby WW .100Y
P3.4 T0 (timer 0 external
.TW
input) W .100 M.T
When 1s are written to PortW pins, they
W .100are pulled O M .high W O Mexternal W W .C O
WW .100Y.C M.TW Y
P3.5 T1 (timer 1 input)
the internal pullups and can beW
W used .as Y.C As inputs,
inputs.
.TW W .100
Port 1 pins that are externally beingWpulled 100 low will O M source W C O W W .CO
M
W Y .C W
P3.6
W W WR (external
0 Y . data memory
W write strobe)
W 0 0 Y
current (IIL) because of the internal W pullups.
W .100 OM
.T W.RD 10 (externalOdata M.Tmemory read strobe) W W.1
W . C P3.7 W Y . C W W
In addition, P1.0 and P1.1 can Wbe configured .100
Y to be the
Mthe .TW W
W .100 OM
.T
timer/counter 2 external count input W (P1.0/T2) C O
and W .C
timer/counter 2 trigger input (P1.1/T2EX), WW .1respectively, 00Y
. .TW RST W .1on00Y M.twoTW
W O Mas Reset input. A W
high this C O
pin for machine cycles while
shown in the following table. WW .100Y.C M.TWthe oscillator WW Y.
00resets
is running . 1 the device.
Port 1 also receives the low-order address WW bytes Y
O
during
.C W W WW
W 0 0 .T
Flash programming and verification.
W.1 OM ALE/PROG
WW .100Y.C M.TAddress W Latch Enable is an output pulse for latching the
Port Pin Alternate Functions W . C O
WW .100Y low byte of the address during accesses to external mem-
P1.0 T2 (external count input to Timer/Counter W 2), ory. This pin is also the program pulse input (PROG) during
clock-out WW Flash programming.
P1.1 T2EX (Timer/Counter 2 capture/reload trigger and In normal operation, ALE is emitted at a constant rate of 1/6
direction control) the oscillator frequency and may be used for external tim-
ing or clocking purposes. Note, however, that one ALE
3
W WW 00Y.CO .TW W
.100 M.T W.1 Y.COM W .1 M
W 00 .T W.1 Y.COM W
W .1
WW .100Y W W .100 M.T
W 00 .T
WW .pulse Y.C .TWduring each WW Y
.10to0 external TW EA/VPP
M.data
W .100 M.T
W 100 is skipped
O M
access
W O W W .C O
WW .100Y.C M.TW
memory. WW .100Y.C M.TW External WAccess.1Enable. 00Y EAMmust .TWbe strapped to GND in
W O order to enable W the device C Oto fetch code from external pro-
W
WW SFR
If desired,.C
0 Y
O operation can be disabled
ALE
. TW W W by0setting 0 Y.C bit 0 .of T W gram memory WW locations . 1 0 0Y. starting M .TatW0000H up to FFFFH.
0location 8EH.
W.1a MOVX .C O M With the bit set, ALE W Wis.1active Y
onlyM dur-
.COpin is.TWNote, however, WW that if00
O
Y.Cbit 1 is .programmed,
lock W EA will be
W W ing 0 Y or MOVC
.T W instruction. W Otherwise, 0 0 the W . reset. OM T
1
. 1 0 M W . 1 O M internally latched W on C
WW
W pulled
weakly .COhigh..T
0Ymicrocontroller
Setting the ALE-disable
W is in external WWexecution C no
bit .has
00Ymode. M.TW WW .100Y. M TW
.for
effect .if10
the M W . 1 O EA should be strapped
W to O
V internal program
O WW .100Y.C M.TW
C C
W
WW .100Y.C M.TW WW .100Y.C M.Texecutions. W
WW the012-volt O
PSEN W .C O WW 00Y.CO .This W W 0 Y.C programming W enable volt-
W M.T when 12-volt
Y W W T pin also receives
W
Program.1Store00 Enable M .isT the read strobe to W . 1
external pro-OM age (V ) during Flash W .1 programming O
W O W .C
Y.C WW .100Y.C Mprogramming 00Y .TW
PP
WWmemory.
gram 0 0 .T W .TW is
W
selected. . 1 O M
1
W.AT89C52 OM W O W
WhenWthe
W 0 Y.C is executing.T W code from WWexternal 0 Y.C
0pro- .TW WW .100Y.C M.TW
0 . 1 M
gram memory,
WW that
.1 PSENOis
.C PSEN
Mactivated twice each WWmachine O XTAL1
Y.C Input.Tto Wthe inverting
W
WWoscillator 0Y .CO .TW
Wexcept 0 Y .T W W .1 0 0 .1 0 amplifier Mand input to the
cycle,
W .10 two
O M activations are skipped
W during
O M clock operatingW W . CO
WW .100Y.C M.TW W
.C data memory. internal circuit. Y
each W W to external
access
. 1 00Y M .TW W O
W
W .100 O M.T
W O WW .100Y. C
WW .100Y.C M.TW WW .100Y.CXTAL2 M .TW M .TW
W O
Output from the inverting W
oscillator O
amplifier.
W WW 00Y.CO .TW WW .100Y.C M.TW WW .100Y.C M.TW
Table 1. AT89C52
W W.1 SFRYMap . C OandM Reset Values WW
W Y.CO .TW W WW 00Y.CO .TW
W 00 .T W 00 .1 M
0F8H W.1 Y.COM W W W.1 Y.COM W WW 00Y.CO .0FFH W
W W MT
W .1 00 M .T W
W .100 O M .T W .1
CO
W O WW .100Y .
0F0H W WB
00Y
.C .TW WW .100Y.C M.TW M .TW
0F7H
. 1 M W O W O
WW .100Y.C M.TW
00000000 W O
0E8H W W .C O
W WW 00Y.CO .TW W WW 00Y.CO0EFH.TW
W 00 Y .T W .1 M
W W 00 .T W
W.1 Y.C0E7H
ACC
0E0H W
00000000 W.1
00 .T W.1 Y.COM W OM
.C OM W W W 0 W
W W
.1 00Y M .TW W
W . 100 O M .T W .10 O M.T
W O WW .100Y0DFH .C
0D8H
W O W O
PSW WW
W
0 Y.C
O
.T W WW .100Y.C M.TW WW .100Y.C M.TW
1 0 O
0D0H
00000000
W W. .C OM
W WW 00Y.CO .TW W WW 000D7H Y.C .TW
W 0 0 Y .T W . 1 M . 1 M
.1 M O W O
T2CON
W W
T2MOD
Y.C
O
RCAP2L RCAP2H WW TL2 C TH2 TW
0Y.00000000 WW .10CFH 00Y
.C .TW
00000000.TW00000000 W 00000000
0C8H .
00000000 WXXXXXX00 . 1 0 0 M . 1 0 M W O M
W O
W WW 00Y.CO .TW WW .100Y.C M.TW WW .100Y.C M.T
W.1 OM W O W 0C7H O
WW .100Y.C M.T
0C0H
IP
W W .C O
W WW 00Y.CO .TW W WW0BFH00Y.CO
0B8H W 00 Y .T W .1 M
XX000000
W.1 Y.COM W W W.1 Y.COM W WW 00Y.CO
W W 0 .T W
0B0H
P3 W 00
W.1 Y.COM W
.T 0
W.1 Y.COM W W W.1
0B7H
11111111 W W W
W
W .100 O M.T
W
W .100 OM
.T
C W .C W
WW .100Y. Y
IE
W W .100 M.T
M.T
0A8H 0AFH
0X000000 O
W O W C
P2 WW .100Y.C M.TW WW .100Y.
0A0H W O W 0A7H
11111111
WW .100Y.C M.TW WW
W O
98H
SCON
00000000
SBUF
XXXXXXXX
WW .100Y.C M.TW 9FH
W .C O
P1 WW .100Y
90H W 97H
11111111
WW
TCON TMOD TL0 TL1 TH0 TH1
88H 8FH
00000000 00000000 00000000 00000000 00000000 00000000
P0 SP DPL DPH PCON

80H 87H
11111111 00000111 00000000 00000000 0XXX0000
4 AT89C52
W WW 00Y.CO .TW W
.100 M.T W.1 Y.COM W .1 M
W .1 O M
W 00
W.1 Y.COM W
.T
.C W W 0
W W
. 1 00 Y
M .T W W
W . 10 0
O M .T
W .1 0
O M.T
W
WW .Special .CO .TW WW .100Y.C M.TW new features. WW .In10that 0Y.C .TW
1 00Y Function
M Registers W O W case,M
.C O the reset or inactive values of
W .C O W Y .C W the new W W
bits will always0 Y be 0. W
WW A.map 1 00Yof the on-chip M .TWmemory area W called.1the
W
00 Special M
O
.T
Func- W .10 O M.T
W .CO(SFR).Tspace W C
Y. and status
0Y.C M.TW registersW
Timer 2 Registers Control bits are contained in
WW tion.1Register
00Y W is shown WW in Table01.
1 . 100 in Table M .T2)Wand T2MOD (shown in
M . T2CON W (shown O
W thatYnot
Note .CO all of theW addresses areWoccupied, W
0Yand .COunoc-.TWTable 4) for W 2. 0The
WTimer C
0Y.register .TW(RCAP2H, RCAP2L)
WWcupied . 1 0 0
addresses M .T
may not be
W
implemented . 1 0 on the M
chip. W .1 O Mpair
W O Y. C
WW
W .COto these W
.TWaddressesWwill inWgeneral Y.C .TW WW .100registers
are the Capture/Reload forTTimer
. W 2 in 16-bit cap-
Read accesses
. 1 00Y M . 100 return O M ture mode or 16-bit W auto-reload O M
mode.
WW data,
random Y.CandO write accesses will have
W WW an 0Y.C M.TInterrupt
indetermi- W WW The Y.C
00individual .TW enable bits are
Wnate . 1 0 0 M .T . 1 0 Registers W . 1 O Minterrupt
effect. W O .C
WW 00Y.CO .TW W .C
00Yloca- M.in TW the IE register. WWTwo priorities 100
Y can be.Tset W for each of the
WUser software . 1 shouldMnot write 1s to W these unlisted . 1 O W . O M
W O WW to0invoke 0Y.C M.TW
six interrupt sources
WW .100Y.C M.TW
in the IP register.
WWsince.10they
tions, 0Y.C may be .used T W in future W products
. 1
W WT2CON—Timer/Counter
.C OM
W W W Y .CO .TW W WW 00Y.CO .TW
Table 2. Y 2 Control W Register 0
W 00
W.1Address OM
.T 0
W.1 Y.COM W W W.1 Y.COM W
. C W
W W
T2CON
.100
Y = 0C8H
M.T
W W
W .100 O M.T
W Reset
W .100 = 0000O0000B
Value M.T
W O W .C
Bit W
W Addressable
00Y
.C .TW WW .100Y.C M.TW W .100
Y
M.T
W
. 1 M W O W C O
BitWWW TF20Y.C EXF2
O W .C .TW TR2 W C/T2
W Y. .TW
. 1 0 M .TW RCLK W TCLK .1 00Y EXEN2 M W . 100 CP/RL2 O M
W O
W
WW .7100Y.C 6M.TW
O 5 WW 4 .100Y.C 3 M.TW 2 WW1 .100Y.C0 M.TW
W W . C O
Y W
W
W .100
Function .CO
M.T W.1 Y.COM W W W.1 Y.COM W
Symbol W
W W
.1 00Y M .TW W
W . 100 O M .T W
W .100 O M.T
W 2 overflow O must.C WW .C
TF2 Timer
WWRCLK.1=001 Y .C flag set .TW
by a Timer 2 overflow
WW and 1 00Y
be cleared W
M .T
by software. TF2 will not be0set
. 10
Y when either
M .TW
or TCLKM = 1. W . O W O
WW
W
0
O
Y.C flag set.Twhen W either a capture WW or .reload 0 0Yis.Ccaused .TW WW .100Y.C M.TW
EXF2 Timer 2 0
external 1 M by a negative transition on T2EX and EXEN2 =
1.W
1 OM is enabled, EXF2 =W1W
W. TimerY.2Cinterrupt Y .CO W W W2W 0 Y .CO EXF2 .T W
When
Wmust be .cleared 00 by software. W
.T EXF2 does not cause W will cause
. 0 the
10interruptO
CPU to
M .T vector to the Timer interrupt
0 routine.
.1 = 1). OM
1 M W an in up/down counter mode (DCENW C
W WW 00Y.CO .TW WW .100Y.C M.TW WW .100Y. M .TW
.1 enable.OWhen M set, causes the serial CO W O
RCLK ReceiveW clock
.CRCLK =.T0 W WW 00beY.used
port to use Timer 2 overflow
TW
pulses
receive clock.W
for its
W receive clock
00Y
.C
in serial
W
WW
port Modes 1 0
.1 0
andY3.
M
causes TimerW 1 overflow.1to
W O
for
M .
the
W .1 O M.T
W .CO set, .C overflow W .C
TCLK WW clock.1enable.
Transmit 00Y When .TW causes the serial WWport to.1use 00YTimer 2 M .TW pulses for W 00Yin serialM.TW
its transmit.1clock
M W to be usedO W O
port Modes W1 and 3. TCLK O = 0 causes Timer 1 overflows
WW .100Y.C M.TW
for the transmit clock. WW Y.C W
WW .100Y.C M.TW W . 1 0 0
O M.T
W O .C
EXEN2 Timer 2 external
W2W
W enable.
.CO .TW
When set, allows a capture or
W reload
0Y.C Timer
to occur as a result
W of a negative
WW .100Y
transition on T2EX
.TW
if Timer is not being
.1 00Yused to M clock the serial port. WEXEN2
W =.100causes
O M .T2 to ignore events at T2EX. W O M
WW
W
0
O
Y.C2. TR2.=T1Wstarts the timer. WW .100Y.C M.TW WW .100Y.C M.TW
TR2 Start/Stop control for 0 Timer
W W. 1
.C OM
W Y
00for Timer 2. C/T2 .T = 0 for timer function.W .1 M
W.1 Y.COM W
C/T2 Timer or counter select C/T2 = 1 for external event counter (falling edge
triggered). W W.1 Y.COM W W W WW 00Y.CO .T
W 00
W.1 CP/RL2 M.T
W .100
Wnegative
.T
OM at T2EX if EXEN2 W .1
WCP/RL2 .C OM
CP/RL2 Capture/ReloadW select. .C =O 1 causes captures to occur W on Y .C
transitions W W = 1. 0 Y
W Y
.100 to occur .TWTimer 2 overflows W or negative .100 transitions M.T occur at T2EX when .10 M
= 0 causes automatic
W W reloads
.C O Mwhen W W Y .C O
W W W W
EXEN2
0 Y .CO
= 1. When either W RCLK or TCLK
00 Y = 1, this bit
.T Wis ignored andW the timer is0 0
forced to .T
auto-reload on Timer 2 overflow. .1 0
W.1 Y.COM W W W.1 Y.COM W WW
W W 0 W
Data Memory W
W .100 O M.T For example,
Wthe .10following M.T addressing instruction
Odirect
Y. C W Y .C W
The AT89C52 implements 256 bytes WWof on-chip .100 RAM. M
The .TW accesses W the SFR at0location
.1 0
0A0H
M.T
(which is P2).
W O MOV 0A0H, #data
W W .C O
upper 128 bytes occupy a parallel W
Waddress .1 0Y.C to the
0space M .TWInstructionsWthat use . 00Y addressing access the upper
1indirect
CO128 TW W
Special Function Registers. That means WWthe0upper 0Y.but . 128 bytes of
W For example, the following indirect
WRAM.
bytes have the same addresses as W the SFR W . 1
space are
O M addressing instruction, where R0 contains 0A0H, accesses
physically separate from SFR space. WW 0 0 Y.C .T W
W . 1 O M the data byte at address 0A0H, rather than P2 (whose
When an instruction accesses an internal WWlocation .
above
Y C address is 0A0H).
address 7FH, the address mode used in the W .100
instruction MOV @R0, #data
specifies whether the CPU accesses the
W 128 bytes
Wupper Note that stack operations are examples of indirect
of RAM or the SFR space. Instructions that use direct addressing, so the upper 128 bytes of data RAM are avail-
addressing access SFR space. able as stack space.
5
W WW 00Y.CO .TW W
.100 M.T W.1 Y.COM W .1 M
W 00 .T W.1 Y.COM W
W .1
WW .100Y W W .100 M.T
W 00 .T
W W .100 M.T
W O W O W W . C O
Timer 0 and 1 WW .100Y.C M.TW registerWduring S3P1
count is incremented.
00Y
The new count
W value appears in the
WW .100Y.C M.TW . 1 of the M
cycle
.Tfollowing the one in which
W WTimer 0 and .C OTimer 1 in the AT89C52Woperate W the
Y .C O way
same W W WW 0 Y .COSince .T W
Y W W .10 0 the transition
M.T oscillator periods)
was .1 0
detected. two machine cycles (24
W as .Timer
W 100 0 and O M .T 1 in the AT89C51.
Timer W C O W W are .C
required OMto recognize a 1-to-0 transi-
WW .100Y. 0Y W
WW .100Y.C M.TW M .TWtion, the W maximum W .10count rate
O Mis.T1/24 of the oscillator
W O .C
WW
W .CO .TW WW .100Y.C M.TW frequency. W
W 00Ya givenMlevel .TWis sampled at least
Timer . 1 002Y M
To ensure.1that
W O
WW 2 is0a0Y .CO .TW WW 00Y.CO .Tonce W before itWchanges, W the level
00Y
.C should .TW be held for at least
WTimer 1 16-bit Timer/Counter thatW can operate . 1 as eitherM one full machine cycle.
W . 1 O M
W. or anY.event M W O
a W
W timer
0 CO counter.
.T W The type WWof operation 0 0 Y.C is .TW WW .100Y.C M.TW
0 . 1 2).OM
selected W.by 1 bit C/T2OinMthe SFR T2CON (shown
.Coperating WWin Table Y .C CaptureW Mode W WW 00Y.CO .TW
WW 2 has 0 Y
M. T W W 0 0 .T .1 OM
W.1 The
Timer .10 three modes: capture, auto-reload
W C O W . C OMIn the capture mode, W Wtwo Y .
optionsC are.T W
selected by bit
WW .100Y
(up or down .
counting), and
TW baud rate generator. Y W W .100= 0, Timer
M .in W
W . 100 3. OM EXEN2
.T in T2CON. If W
EXEN2 O M2 is a 16-bit timer
modes are W selected by bits
.CO .TW T2CON, as shownW in Table
Y.C or counter .TW which upon WW overflow Y.C .TWin T2CON.
TimerW2Wconsists . 1 00ofYtwo 8-bit M registers, TH2
Wand TL2. . 1
In00the M W .100 setsObit M TF2
W O bit can then be W
WW 0the
TimerWfunction, 0 Y.C
O
TL2 register.T W is incremented WW every 0 0Y.C This .TW W used .to 1 0Y.C Man.Tinterrupt.
0generate W If
. 1 M W . 1 O
EXEN2 M = 1, Timer 2 performs W the same C Ooperation, but a 1-
W SinceYa.Cmachine O .C WWinput.1T2EX . .TW the cur-
machine cycle.
WW the 00count rate
cycle consists of
.TisW1/12 of the WW12 oscil- .1 00Y to-0 M .TW at external
transition 00Y also causes M
lator periods, . 1 O M oscillator
W CO valueTinWTH2 and TL2 W .C O
frequency.
W
WW .100Y.C M.TW WW .100Y.rent . WW 00Y intoM
to be captured
.1 .TW and
RCAP2H
W RCAP2L,O M respectively. In W
addition, the C O
transition at T2EX
Table 3. Timer
W
WW 2 Operating 0
O
Y.C Modes.TW WW .100Ycauses .C .
bit T W in T2CON
EXF2 WWto be.1set. 0 0Y.The EXF2 M .TW bit, like
0 M .COmode.TisWillus-
W W.1 Y.COM W W W Y
TF2, .C Ocan W
generate an W
interrupt. WWThe 0capture 0Y
RCLK +TCLK W CP/RL2
W .100
TR2 .TMODE
O M
W
W .100trated in OM
.T
Figure 1. W W.1 Y.COM W
C W .C W
0 WW 0.100Y. 1 M.T16-bit W Auto-Reload W .100
Y
M.T
W 00
W.1 Y.COM W
.T
W O W W . C O W
0 WW 1 .100Y.C1 M16-bit .TWCapture W W.1Auto-reload 00Y M
W or Down
.T(Up W Counter)
W .100 O M.T
W O O
.C be.Tprogrammed W .C
Y down when W
1 WWX .100Y.1C M .TW
Baud Rate Generator WW Timer .1 00Y2 can M W W to count.1up 00or M.T
W O W C O
XW
O
0 .C (Off)TW WW invoked
configured .C in its .16-bit auto-reload
TW(Down Counter WWmode. Y. feature.TisW
This
X WW 00Y . .1 00Yby theM DCEN . 100 bit located
Enable) M
W W . 1
.C O M W W Y .C O
W W W W
0 Y . CO inTW
W 0Y TW W the .SFR 100 T2MOD M.T
(see Table 4). Upon reset, .10the DCEN Mbit.
In the Counter function,
W .10register
the
O M.incremented
is in
isW set to 0 C
so Othat timer 2 will default W Wcount
to .C
up. O
When
response to a 1-to-0W W
transition at0its
0
C
Y.corresponding
.TW externalW DCEN
W
1
Y
0is0set,
.
M
W
.2Tcan W . 00 Y
1depending M .TW
.1 M . Timer count up or down,
W O on
input pin, T2. In this function,
WW thecycle. O input is sampled W
external
Y.CWhen .the Wsamples W the value
W .COT2EX.T
0ofYthe W
pin. WW .100Y.C M.TW
during S5P2 of everyWmachine 0 0 T . 1 0 M
show a high in one cycle Wand
1
W.a low Yin.Cthe OM next W
cycle, the WW 00Y.CO .TW W WW 00Y.CO .TW
W 00 .T W .1 M
W W 00 .T W
Figure 1. Timer in Capture W Mode.100
W O M.T W.1 Y.COM W W W.1 Y.COM
. C W W 00 .T
WW .100Y M.T
W W .100 M.T W.1 Y.COM
W O W .C O W
÷12 WW Y.C W WW .100Y M.T
W W .100 M.T
OSC
W 100 = 0 OM.T
.C/T2 W O W W .C O
WW .100Y.C M.TW WW .100Y.C M.TW W .100
Y
M
W W .C O W TH2 W TL2
Y .C O
W TF2
W W W
0 Y .CO
W 00 Y .T W W 0 0 .T .1 0
OVERFLOW WW
W W
W
W .100 O M.T
TR2
CONTROL W
W .100 O M.T
C W .C W
WWC/T2 .=1010Y. M.T
W W .100
Y
M.T
W O W C O
T2 PIN WW .100Y.C CAPTURE .TW WW .100Y.
W O M W
WW .100Y.C M.TW RCAP2H WW RCAP2L
TRANSITION W O
DETECTOR WW 0 0 Y.C .TW TIMER 2
W . 1 O M INTERRUPT
T2EX PIN WW .100Y.C EXF2
W
WW
CONTROL
EXEN2
6 AT89C52
W WW 00Y.CO .TW W
.100 M.T W.1 Y.COM W .1 M
W .1 O M
W 00
W.1 Y.COM W
.T
.C W W 0
W W
. 1 00 Y
M .T W W
W . 10 0
O M .T
W .1 0
O M.T
W
WW .100Y.C M.TW
O
WW O
W WFigureY2.Cshows O Timer 2 automatically
W W WW counting 0 Y .COup when .T W the direction
W of the count.
0 0Y.C A logic 1 at T2EX makes Timer 2
.TWat 0FFFFH and set the
W DCEN0 0 = 0. In .
thisT mode, two options .
are 1 0 selected Mby bit count up. The . 1
timer will M
overflow
O
W.1 Yin.CT2CON. OM 0,W
W O
Y.C up .to W TF2 bit.W WW 00Y.C .TW the 16-bit value in
WW EXEN2 . 1 00 M .T WIf EXEN2 =W Timer 200counts
. 1 M T This overflow
W . 1 also M
O
causes
W andOthen sets the TF2 bitW W overflow. O The RCAP2H andWRCAP2L Y to.C
0Y.C with
0FFFFH upon be reloaded
WWoverflow 0 0 Y.C causes .T W timer registers W to be 1 0 M .TWters, TH2 W .1 00 M .TW into the timer regis-
W.1
also M the . reloaded and TL2, respectively.
WW 00Y.CO .TW
.CO in RCAP2H WW .The
W
0Y .CO in .TW WT2EX
WW the 16-bit0Y
0 value .T W and RCAP2L. 1 0 values A logic 0 at .1
makes Timer M2 count down. The timer
W.1in Capture
Timer C
M
OModeRCAP2H and RCAP2L
W W areY.preset C OM underflows when W W Y .COequal.Tthe W values stored in
W . .=TW W W TH2 and 0 TL2
.10The underflow
Wby software. . 1 00YIf EXEN2 M
W
1, a 16-bit reload can W . 1be00triggered O M .T
RCAP2H and RCAP2L. W C O M sets the TF2 bit and
WWby an O W .
Weither Y.C
00overflow or.Tby WW .at
Wa 1-to-0 transition 1 0Y.C M.causes
0external TW 0FFFFH Wto beW .100 into
reloaded
Y
M
W
the.Ttimer registers.
. 1 O M W Both O .C O
input
WW
W This
T2EX.
0 Y .Ctransition
.T
also sets the EXF2
W WW if bit. 0 0Y.the C
.
TheTWEXF2 bit toggles WW whenever . 1 00Y Timer
M .TW 2 overflows or
TF2 and EXF2 . 1 0 bits can Mgenerate an interrupt W . 1
enabled. M
O underflows and canW W C O
W . C O W .C W be used asY .
a 17th .TWresolution. In
bit of
WWthe DCEN
Setting 00Y bit enables .TW Timer 2 to count W up or . 0Y
10down, M .Toperating mode, W 00 not flag
.1does Man
. 1 M W O this EXF2W O interrupt.
W
WW in Figure
as shown 0 Y .C3.O In this mode,
.T W the T2EX W Wpin controls 00 Y.C .T W WW .100Y.C M.TW
0
W.1 Y.COM W .1 M WW 00Y.CO .TW
W W WW 00Y.CO .TW W
Figure W2. Timer 020Auto Reload .TMode (DCEN = 0) W.1 M .1 M
W W.1 Y.COM W W Y .CO .TW W WW 00Y.CO .TW
W 0
W OSC .100
W OM
÷12 .T 0
.C W
W W
. 1 00Y M .TW C/T2 = 0 W W.100 O M .T W
W .100 O M.T
W O W .C
WW .100Y.C M.TW WW .100Y.C MTH2 .TW TL2 W W.100Y OM.TW
W O W .C O W .C W
WW .100Y.C M.TW WW CONTROL .1 00Y M .TW WOVERFLOW . 1 00Y M.T
O W O W .C O
W
WW .100Y.C M.TC/T2 W WTR2 W 00Y
.C .TW WW .100Y M .TW
W . 1 O M W O
WW .100Y.C M.TW
= 1
W O .C
WW .100Y.C M.TW WWRELOAD . 1 00Y M .TW
WW 0INTERRUPT O2
WW 00Y.CO .TW Y.C
TIMER
T2 PINW
.C O W 0 W
W W
.1 00 Y
M .T W W
W .1 RCAP2H
O M RCAP2L W .1 O M.T
W O WW .100Y. C
W O W O TF2W W .C O
WW .TRANSITION 0 0 Y.C .T W WW .100Y.C M.TW W .1 00Y M.T
W
1 M W O W CO
W
WW .100Y.C M.TW
DETECTOR O
WW .100Y.C M.TW WW .100Y. M .TW
W O W O EXF2 W
W .C O
T2EX PIN
WW .100Y.C M.TW WW .100Y.C M.TW W . 1 00Y M.T
W
O W O W .C O
W
WW .100Y.C M.TW CONTROL WW .100Y.C M.TW WW .100Y M.TW
W O W O
WW .100Y.C M.TW
O EXEN2
W
Table 4. T2MOD—Timer 2 Mode W W Control . O
Register
C W WW 00Y.CO .TW W WW 00Y.CO .T
Y W 1
T2MOD Address = 0C9H WW.
W 100 OM
.T W.1 Y.CReset OMValue = XXXX XX00BWW. M
.CO .T
. C W W W W 0 0Y
W .100
Y
M.T
W 00 .T W.1 Y.COM
Not Bit Addressable W .C O W W.1 Y.COM W W
WW .100Y .TW W . 1 00 M .T W .100 M
— —
W W — Y.CO — W M — W W —
Y.C O T2OE
W DCEN
W W W
0 Y.CO
W 00 .T W 0 0 .T .1 0
Bit 7 6 W.1 5 Y.COM4 W 3 W W.21 Y.COM 1
W 0 WW
W W
W
W .100 O M.T
W
W .100 OM
.T
C W .C W
Symbol Function WW .100Y. M.T
W W .100
Y
M.T
W O W C O
— Not implemented, reserved WW for 0Y.C M.TW
0future WW .100Y.
W .1 O W
T2OE Timer 2 Output Enable WW bit.
0 0 Y.C .T W WW
W.1 Yconfigured M
.CO .TasWan up/down counter.
DCEN When set, this bit allows WW Timer 2 to be
0 0
W W.1 Y.COM
W 00
W W.1
W
7
W WW 00Y.CO .TW W
.100 M.T W.1 Y.COM W .1 M
W 00 .T W.1 Y.COM W
W .1
WW .100Y W W .100 M.T
W 00 .T
W W .100 M.T
W Figure 3. O
Timer 2 Auto Reload Mode W (DCEN = 1)O W W .C O
Y
M.T
W
W O W CO
W
WW .100Y.C M.TW
O
WW .100Y.C M.TW
(DOWN COUNTING
WW .100Y.
RELOAD VALUE)
M .TW
TOGGLE
W O
W .C O WW 00Y.CO .T0FFH W 0FFH W
W 0 Y.C W
W W
. 1 0 0 Y
M .T W W
W . 1 O M W .1 0
O M.T EXF2
W C O W . C W W Y .C W
WW .100Y. M.T
W W .100
Y
M.T
W
W .100 OM
.T
W O W C O W .C W
WW .100Y.C M.TW WW .100Y. M .TW W .100
Y
M.T
O12 W O W .C O
W
WW .100Y.C÷ M.TW C/T2 = 0 W
OSC W 00Y
.C .TW WW .100Y
OVERFLOW
M .TW
W . 1 O M W O
W
WW .100Y.C M.TW
O
WW .100Y.C TH2 .TW TL2 WW .100Y.C M.TW
M WW 00Y.CO .TF2
W .C O WW 00Y.CO .TW W W
W W
. 1 00 Y
M .T W W
W . 1 O M W .1 O MT
W
WW .100Y.C M.TW
O
WTR2WCONTROL 00Y
.C .TW WW .100Y.C M.TW
. 1 M
W W .C O C/T2 = 1
Y W
W
W .100 O M.T W .1
.C OM W W.1 Y.C OM 2
TIMER
INTERRUPTW
Y. C W W
WW .1T200PIN M.T
W W
W .100
Y
O M.T
W
W .100 OM
.T
W O C
. RCAP2L W Y .C W
WW .100Y.C M.TW WW .1RCAP2H 00Y M .TW W .100 M.T
W O W
COUNT C O
W O
WW .C WW Y. .TW
WW .100Y.C M.TW (UP COUNTING
. 1 00Y RELOAD M
W
.TVALUE) DIRECTION
W .100 O M
W O W O 1=UP
W .C
WW .100Y.C M.TW WW .100Y.C M.TW W0=DOWN . 1 00Y M.T
W
O W O W .C O
W
WW .100Y.C M.TW WW .100Y.C M.TW WW .100Y M .TW
W O W O
W O
WW .100Y.C M.TW T2EX PINW
W Y.C .TW
WW .100Y.C M.TW W .100 O M
W O
W
WW .100Y.C M.TW
O
W O W O
Figure 4. Timer 2 in Baud
WW .100Y.C M.TW
O
W Rate Generator Mode
W W .C O
W WW 00Y.CO .TW TIMER W WW 00Y.CO .TW
1 OVERFLOW
Y W
W
W .100 O M.T W .1
.C OM W W.1 Y.COM W
C W W
WW .100Y. M.T
W W .100
Y
M.T
W
W .100 OM
.T
W O W C O W .C W
WW .100Y.C M.TW WW .100Y. M .÷T2W W .100
Y
M.T
W O W O W W .C O
WW .100Y.C M.TW WW .100Y.C M.TW "0" W "1" . 100
Y
M .TW
W O W O
W OSC. FREQ. O IS DIVIDED BY 2, NOTW12 .C WW Y.C .TW
WW .100Y.C M.TW
NOTE:
W . 1 00Y M .TW SMOD1.100
W O M
W O
W
WW .100Y.C M.TW
O
WW .100Y.C M.TW WW .100Y.C M.T
W O W O
OSC ÷2 W
WWC/T2 .=1000Y.C M.TW
O
WW .100Y.C M.TW WW .100Y.C M.T
W W .C O
W WW 00Y.CO "1" .TW "0"
W WW 00Y.CO
W 00 Y .T W TL2 .1 .1 M
W.1 Y.COM W
TH2
W W . C OM RCLK WW Y.CO
W W 0 Y .T W W Rx 0 0
W 00
W.1 Y.CCONTROL OM
.T 0
W.1 Y.COM W ÷ 16 W W.1
CLOCK
W W W W
W .100 TR2 OM.T
W
W .100 OM
.T
=W C W .C
C/T2W 1
Y. W W Y
.100 "1" OM .TW
W
W .100 O M.T W C "0"
T2 PIN WW .100Y.C M.TW WW .100Y.
W O RCAP2H RCAP2L WW TCLK
WW .100Y.C M.TW
Tx
W CLOCK
TRANSITION W O ÷ 16
DETECTOR WW .100Y.C M.TW
W WW 00Y.CO TIMER 2
T2EX PIN
W W.1 EXF2 INTERRUPT
W
CONTROL
EXEN2
8 AT89C52
W WW 00Y.CO .TW W
.100 M.T W.1 Y.COM W .1 M
W .1 O M
W 00
W.1 Y.COM W
.T
.C W W 0
W W
. 1 00 Y
M .T W W
W . 10 0
O M .T
W .1 0
O M.T
W
WW .100Y.C M.TW
O
WW O
W WBaud Y .C O Generator WW
Rate W W 0 Y .CO .TW increments W every state
0 0 Y.C time .T (at W1/2 the oscillator fre-
W 0 0 .T . 1 0 M quency). The baud . 1 rate formula M is given below.
W W .1 2 is selected
Timer .C OM as the baud rate
W W W generator Y . byOsetting W
C W WW 00Y.CO .TW
Y W 0 .T
W TCLK 00
W.1 and/or M.T in T2CON (Table
ORCLK W2). .10Note that
. C OMthe Modes 1 and W3.-1 = ---------------------------------------------------------------------------------------------
--------------------------------------
W Y .C O M
Oscillator
W
Frequency
W .C W Y W Baud W Rate 0
32 × [ 65536 – T
( RCAP2H ,RCAP2L) ]
W baud.1rates 00Y for transmit M .TWand receiveWcan beWdifferent . 100 if Timer O M .T W .10 O M.
Wused for Oreceiver or transmitterW WW RCAP2L) Y. C
WW
2 is
0Y.Cfunction.
the
.TW W and Timer 1 0Y1.C
0TCLK
is used TW
. where (RCAP2H, . 100 is the M .TW of RCAP2H and
content
for Wthe.10other M Setting RCLK and/or W . O
puts M W .C O
CO
its. baud rate WW as shown 0Y.inCFig-M.TRCAP2L W taken WW as a 16-bit 00Y unsigned integer. W
W 2 into
WTimer . 1 0 0 Y
M .T Wgenerator mode,
W . 1 0
O W . 1 O M.T
ure 4.W O Wrate generator . C
WW .100Y.C M.figure
Timer 2 as a baud Y is shown
WW .100Y.C M.TW TW is valid W .100 or TCLK M .TWin Figure 4. This
Wauto-reload O only if WRCLK C O = 1 in T2CON. Note
WW rate
The baud
Y .CO mode
generator
W
is similar toW
W
the
0 Y .C .T
that Wa rollover in W TH2
W does0not 0 Y.set TF2 . TWwill not gener-
and
W
mode, in that 1 0 0
a rollover in .T
TH2 causes the Timer 2 . 1 0
registers M W . 1 O M
W. OM W O ate an interrupt. Note
WW too,.1that 0Y.ifCEXEN2
beW
to W reloaded0with
0 Y.Cthe 16-bit .T Wvalue in registers WW RCAP2H . 1 0 0Y.C M .T W 0 Mnot .TisWset, a 1-to-0
. 1 M W O transition in T2EX will setW EXF2 but O
will cause a reload
W WW which
and RCAP2L,
0 Y
O preset by software. W
.Care .T W W 0 0 Y.C from.T(RCAP2H, W WW to.1(TH2,
RCAP2L) 0 0Y.CTL2).MThus . TWwhen Timer
0
W.1 in Modes OM .1 M WW O
The baud rates
.C 1 and 3 are determined W
W by Timer Y.CO2 is in.Tuse W as a baudWrate generator, 0 Y.CT2EX can W be used as
W
2’s overflowW rate. 1 0 Y
0according M
W
T following equation. .10
to .the W
W
0
an
O M
extra external interrupt. W .1 0
O M.T
W O W2W Y. C
WW .100Y.C M.TTimer W 2 Overflow WW RateW.10
0Y.CNoteMthat .TW when Timer is .
running 100 (TR2 O = M1)
TW
.as a timer in
Modes 1 W and 3 Baud C O = -----------------------------------------------------------
Rates - . C O W W Y . CTL2 should W not be
W . W Y W W 0 T
W . 1 00Y M .TW 16 W
W .
the
100 readOfrom baud
M .T rate generator mode,
W
TH2
.10 or
O M.
WW O W Y.C or written to.
WW .100Y.
Under these conditions, C the Timer
W is
The Timer Wcan Y.C for.Teither
be configured
0 0 W timer or Wcounter 1 00 . T W M . T
operation. In W mostW.1applications, C OMit is configured forW W.
timer . C OM
incremented every state time,
W
and
W the results
Y CO
.registers
of a read or
W be
. .TW is different
Y timer operation W for .100 Y
write may not
.T W be accurate. W The RCAP2 .10 0 M. Tmay
operation (CP/T2 W 1
= .0).00The M W O M W . C O
W O WW .100Y
0Y.C a reload
read but should not be written to, because a write
Timer 2 whenWitW is used as 0 Y C rateTgenerator.
a .baud . W WW .10overlap
Normally, . T W M . Tmight
W
. 1 0 M O M and cause write and/or
W reload O errors. The
as a timer, it increments W W every . C O
machine cycle (at 1/12 W theW timer Y . C W W W 0 Y .C . T W
Y W W it .100 should be . T turned off (clear TR2) before
1 0 accessing the
oscillator frequency). W As.1a00 baud rate O M . T
generator, however, W O M W .
. C O M
W W
WW .100Y.C M.TW
Timer 2 or RCAP2 registers. Y W
WW .100Y.C M.TW W
W .100 O M.T
W O C
WW 00Y.CO .TW WW .100Y.C M.TW WW .100Y. .TW
Figure 5. Timer W 2 in Clock-out . 1 Mode M W O W O M
W
WW .100Y.C M.TW
O
W .CO .TW W O WW 00Y.CO .TW
WW .100Y÷2
OSC WW .100Y.C M.TW TL2 WTH2
(8-BITS) W.1 M
W W . C OM W W Y . C O (8-BITS)
W W W 0 Y .CO .TW
Y W W .100 .T 0
W
W .100 O M.T W . C OM W W.1 Y.COM W
C W W
WW .100Y. M.T
W W TR2 .100Y M.T
W
W.1 Y.COM W
00 .T
W O W . C O W
WW .100Y.C M.TW WW .100Y M .TW W .100 M.T
W O W O W W .C O
WW .100Y.C M.TW WW .100Y.C M .TW RCAP2H W W.100Y OM.T
RCAP2L
W O
W
WW .100Y.C M.TW
O
C/T2 W
W 00Y
.C .TW WW .100Y.C M.T
BIT . 1 M
W W . C O
W WW 00Y.CO .TW W WW 00Y.CO
W 00 Y .T W .1 M
W.1 Y.COM W W W.1 Y.COM W WW 00Y.CO
W W 0 0 .T W .1
P1.0 W 00 .T W.1÷2 Y.COM W
(T2)
W W.1 Y.COM W W W WW
W
W .100 O M.T
W
W .100 OM
.T
C W . C
WW .100Y. M.T
W W .100
Y
MT2OE .TW(T2MOD.1)
W O W C O
TRANSITION WW .100Y.C M.TW WW .100Y.
W O W
DETECTOR
WW .100Y.C M.TW WW
W O
P1.1 WW .100Y.C M.TW TIMER 2
W O EXF2
(T2EX)
WW .100Y.C INTERRUPT
W
WW EXEN2
9
W WW 00Y.CO .TW W
.100 M.T W.1 Y.COM W .1 M
W 00 .T W.1 Y.COM W
W .1
WW .100Y W W .100 M.T
W 00 .T
W O M.T W . C O W W.1 Y.COM W
Y.C
WW .Programmable W Clock WW OutW.100Y OM.TW TableW .100EnableO(IE) M.T
W 100 O M.T C
5. Interrupt
W W .C
Register
.C W Y . W W 0Y W
WW A.50% 1 00Yduty cycle M
W can be programmed
.Tclock W
W . 100to come O out
M .Ton (MSB)
W .10 O M.T (LSB)
W O
.C in.Figure W . C W W Y .C W
WW P1.0, as shown
00Ypin, has W 5. This W pin, besides
.10ns.
Y a regu-
0being Mb.T
EA W — 00 ES MET1
.1ET2 .T EX1 ET0 EX0
lar
W .1I/O O M Ttwo alter nate fuWnctio W It C canO e W W .C O
Y interrupt. .TW
WWprogrammed .C W external clock Y. W EnableW
.100
Bit = 1 enables the
00Y to input .Tthe W for Timer/Counter . 100 M 2.T M
W W . 1
.C
M
O duty cycle clock ranging W from W Y .C O
W Enable Bit
W =W
W
0 disables the 0 Y .CO .TW
interrupt.
or to output Y a 50% W W 0 61 Hz to 4 .T 0
W
MHz
00
Wat.1a 16YMHz M.T
Ooperating frequency. WW.
10
. C OM W W.1 Y.COM W
.C W
W
WTo configure. 1 00 the Timer/Counter
M .TW 2 as
W
a clock W . 100
generator,
Y
O
bitM .T Symbol W Position W .100 Function O M.T
WW .CO .C W 0Y .C TW
W
C/T2 (T2CON.1) 00Y mustMbe.Tcleared W and bit WW T2OE .(T2MOD.1) 1 00Y M
W
.TEA W
IE.7 W.10 Disables M
all .interrupts. If EA = 0,
. 1
Wset. BitYTR2 O(T2CON.2) starts andW W the timer. C O W .C O
must W be . C stops Y . W W no0Y interrupt is .T W
acknowledged. If
W . 1 00 M .TW W
W . 100 O M .T W .10EA = 1, each
C O Minterrupt source is
W
The clock-out O
frequency depends on the oscillator Y.C
fre- WW .1individually . W
WW and.1the 00Y
.C .TW WW registers . 100 M .TW 00Y M.T or disabled
enabled
quency reload value
M of Timer 2 capture W O W O
W .CO .TWin the following WWequation. .C .TW WW by Y.Cor clearing
setting
.TWits enable
WW RCAP2L),
(RCAP2H,
. 1 00Y as shown M . 1 00Y M W .100
bit. O M
W O W O W .C
WW Frequency
Clock-Out 0 0 . T Oscillator
W Fequency WW .1-00Y.C —M.TW IE.6 W
Y.C= ----------------------------------------------------------------------------------------- . 1 00Y
Reserved. M.T
W
. 1 4 × M [ 65536 – ( RCAP2H , RCAP2L W ) ] O W C O
W .CO WW .100Y.C ET2M.TW IE.5 W Timer
W Y. .TWbit.
WW .mode, 1 00Y TimerM2.T W
W . 1020interruptOenable M
In the clock-out W .CO is similar
roll-overs will not
WW
generate .CO WWSerial.1Port .C
00YinterruptM .TWbit.
an interrupt.WW This.1behavior 00Y . T W to whenW Timer 2.1is00Y ES M.TW IE.4 W O enable
M W O . C
used as a baud-rate W
WW .1generator. .CO It is.Tpossible W to use WW Timer 2 0Y.C
0 ET1 M.TWIE.3 WW 00Y enable .Tbit.W
as a baud-rate generator 00Y and M a clock generator simulta- W . 1 O
Timer 1.1interrupt
W .C O M
neously. Note,
W
WWhowever, 0 .COthe baud-rate
Ythat . T W and WW .100Y
clock-out
.C
EX1 .TW IE.2
W
WExternal . 1 00Y 1 enable
interrupt M.Tbit.
W
.1 0 M W O M W .C O
W O Y.C W Y W
frequencies cannot
WW be.1determined 0Y.C M
0use
independently
.Tand W fromWW one
. 1 00ET0 M
W
.TIE.1 W
Timer 0 interrupt
. 100 enable Mbit..T
W O W O
another since they both W RCAP2H O RCAP2L.
WW .10EX0 0Y.C M.IE.0 WW interrupt Y.C .TW
WW .100Y.C M.TW TW External
W . 100 0 enable O M bit.
UART W O
WW .1User
W .CO .TW never writeW W 00Y
.C bits,.TW
WW .100Y.C M.TW 00YsoftwareMshould 1s to unimplemented
. 1 M
The UART in the AT89C52 W W operates . C O the same way as theWW because Y .C O may be used in future AT89
they
W W WWproducts. 0Y .CO .TW
0Y W W 00 .T 0
UART in the AT89C51. W.10
W
OM
.T W.1 Y.COM W W W.1 Y.COM W
.C W
W W
. 1 00Y M .TW W Figure
W . 1006. InterruptO M .TSources W
W .100 O M.T
Interrupts W O WW .100Y. C
W O W O
The AT89C52 has a totalWofW six interrupt
0 Y.C vectors:
O
W two exter-
WW .100Y.C 0 M.TW WW .100Y.C M.TW
nal interrupts (INT0W 1 0
OM
. T W .CO .TW
and INT1),
W W. three
Y . C
timer interrupts
W WW INT000Y.CO W W W
IE0
0 0 Y
(Timers 0, 1, and 2), and W the serial 00 port interrupt. .T These W .T .1 M
W.1 Y.COM W
1
interrupts are all shown in Figure W W.16. Y.COM W W W WW 00Y.CO .TW
W 0 M.Tenabled
W 00 .T W.1 Y.COM
Each of these interrupt sourcesW can .10be individually
. C O W W.1 Y.COM W W
WW a.1bit Y Special .Function W W .100 M.T
W 00 .T
or disabled by setting or clearing
W
00in
O MT W .C O W W.1 Y.COM
Register IE. IE also containsWaW global disable Y.Cbit, EA,.Twhich W WWTF0 .100Y M.T
W W .100 M.T
disables all interrupts at once. W .100 O M W O W W .C O
WW .100Y .C .TW WW .100Y.C M.TW W .100
Y
M
Note that Table 5 shows that bit position
W W IE.6
. C
isO M
unimple-
W W Y .C O
W W W W
0 Y .CO
Y W W 0 .T 0
mented. In the A T89 C5 1, W bit positi
Wnot .10on 0 IE.5 isMals
Oto these
.T o 0
W.10 Y.COM W W W.1
unimplemented. User software should W write . C
1s W W W
bit positions, since they may be used
W
W
Y
.10in0 futureOAT89 M.T
W
INT1
W .1100 OM
.T IE1
C W .C W
products. WW .100Y. M.T
W W .100
Y
M.T
W O W C O
Timer 2 interrupt is generated by the WlogicalW OR 00of Y.bits C TF2 TW
. WW .100Y.
. 1 M
and EXF2 in register T2CON. Neither WW of these flags
Y .CO is .TW W WW
cleared by hardware when the service routine W 0 0
.1 is vectored M TF1
to. In fact, the service routine mayW WWto determine
have 0 Y .CO .TW
.10interrupt, M
whether it was TF2 or EXF2 that generated
W W Wthe
0 Y .CO TI
RI
and that bit will have to be cleared in software. .1 0
W
The Timer 0 and Timer 1 flags, TF0 and WW TF1, are set at TF2
S5P2 of the cycle in which the timers overflow. The values EXF2
are then polled by the circuitry in the next cycle. However,

the Timer 2 flag, TF2, is set at S2P2 and is polled in the
same cycle in which the timer overflows.
10 AT89C52
W WW 00Y.CO .TW W
.100 M.T W.1 Y.COM W .1 M
W .1 O M
W 00
W.1 Y.COM W
.T
.C W W 0
W W
. 1 00 Y
M .T W W
W . 10 0
O M .T
W .1 0
O M.T
W Oscillator O Characteristics WW .100Y.C M.TW stabilize. WW enough
active long Y.toC allow .the TWoscillator to restart and
WW .100Y.C M.TW W . 100 O M
WXTAL1Yand .COXTAL2 are the input W W
Wand output, .CO .TW
0Yrespectively, WW .100Y.C M.TW
WW of.1an 00invertingMamplifier.TW that can . 1 0 M O
W O
.Coscillator,
be configured
WW 7. 0Either
forOuse as
Y.Ca quartz W Figure 7.WOscillatorWW 0Connections 0Y.C M.TW
WW an .on-chip 0 0 Y .T W as shown inW Figure .1 0 M . T . 1 O
W 1 orY.ceramic
crystal C OM resonator may be WW used. ToY.drive CO theTW W WW C2 0 Y.C W
W
W device . 1 0
0from an externalM
W
.T clock source, XTAL2 W
W . 0 0
1 should be O Mleft
. W .1 0
O M.T XTAL2
W .CO .TW is driven,WasWshown0in0YFigure .C 8. .TW WW .100Y. C
WW unconnected 00Y whileMXTAL1 1 M M .TW
. 1 . W O
WW are0no
There .CO .TWon the duty
Yrequirements WWof the
Wcycle 0Y .CO .TW
external WW .100Y.C M.TW
Wclock 0 . 1 0 M
W W . 1
signal, sinceOthe
.C
M input to the internalWclocking
W
W Y .CO .TW
circuitry
W WWC1 00Y.CO .TW
Y W 0
Wis through1a
W.
00divide-by-two
OandM.Tlow flip-flop, but minimum.1and
W must
0 maxi- M
C O W W.1 Y.COM XTAL1
mum
W W voltage
0 0 Y .
highC
.T W time W W
specifications
1 0 0 Y . be
M .T W W . 1 00 M .TW
observed. W. 1 OM W . O W O
WW .100Y.C M.TW WW .100Y.C M.TW WW .100Y.C M.TW
W O W O
Idle Mode W
WW .100Y.C M.TW
O
WW 00Y.CO .TW
GND
In idle mode, W the CPU . C O itself to sleep whileWall
puts Wthe on-Y.CO W
W Y W W 0 0 .T W .1
W 00 M.T The mode is invoked W.1 by Y.COM W M
chip peripherals
W W.1 remain .C Oactive.
W W W WW 00Y.CO .TW
Y W 0 .T
software. W The content .100
Wregisters
of the on-chip .T RAM and all theWspe-
OM unchanged during .10
.C OM W W.1 Y.COM W
cial functions .C remain W this W
mode. The
W
W idle mode . 1 00Ycan beM .TW
terminated by
W
any enabled
W . 100
Y
O M .T W
W .100 O M.T
WaWhardware .CO .C 10W Y. C
interrupt or Wby 00Y reset.M.TW WW .100YNote: M .TW
C1, C2 = 30 pF ± W
100Resonators
pF for Crystals
. M .TW
. 1 W O ± W O
WW .100Y.C M.TW
= 40 pF 10 pF for Ceramic
W
WW idle.1mode .CO .TW by a hardware WW .100Y.C M.TW
Note that when
00Y is terminated W .CO .TW
reset, the deviceW
W normally .resumes C OM program execution WW 0Figure Y .CO8. External W Clock Drive W WConfiguration
0Y
Y W W 0 .T 0
from where itW left off, up .10to 0 two machine .T cycles before theW.1
OM On-chip OM W W.1 Y.COM W
internal reset W WW takes
algorithm
00Y
.C control. .TW W
hardware W
100
Y . C
.T W W .100 M.T
. 1 O M W . O M W W .CO
inhibits access to internal WW 00Y.C RAM in this event,
.TW
but access
WW
to
0Y.C M.TW
NC W XTAL2
.100
Y
M.T
W
the port pins is W not inhibited. .1 To eliminate M the possibility of W.10 O W C O
an unexpected write
W
WWto a port
O
Y.Cwhen idle .TW WW .100Y.C M.TW WW .100Y. .TW
. 1 00pin M
mode is termi-
O W O M
W O the one that WW WW .100Y.C M.TW
nated by a reset, the
invokes idle mode W
Winstruction 0 0 Y.Cto following
.T W W . 1 0 0Y.C M.TW
should not
W.1 write a port
OM pin or to exter- W CO
.EXTERNAL WW 00Y.CO .TW
nal memory. WW .100Y.C M.TW WW .100YOSCILLATOR .T W WXTAL1
W O W . C OM W W.1 Y.COM W
.C W SIGNAL W
Power Down Mode W W
. 1 00Y M .TW W
W .100
Y
O M .T W
W .100 O M.T
W .CO .TW .C WW .100Y .C
WW 00Y is stopped, and the W
W
1 00Y M .TW M .TW
In the power down mode, the oscillator
.1 M W . O W O
WW .100Y.C M.TW
GND
instruction that invokes W power WWdown00isY.the COlast instruction
T W WW .100Y.C M.TW
.
executed. The on-chip RAM and
W
1
W.Special .C OM Regis-
Function
ters retain their values W
Y
00 down T
.mode W .1 M
until the.1power
W down . C OaMhardware is
W W.1 Y.COM W WW 00Y.CO .T
W W 00 W
terminated. The only exit from W power
00Y
.1does
is
M.T the
W
W.1 Y.COM W
.T W.1 Y.COM
reset. Reset redefines the SFRs W
but not
.C Ochange W W
WW 00Y before .TVWCC W . 100 M .T W .100 M
on-chip RAM. The reset should
W
1
not be.activated
W andYmust .C O M W W Y .C O
W W W W
0 Y.CO
is restored to its normal operating W level 00 be held
.T W W 0 0 .T .1 0
W W
Status of External Pins During
W
W .100 IdleOand M.T Power Down
W
W .100
Modes OM
.T
C W .C W
WW .100Y. M .TW W .100
Y
M.T
W O W C O
Mode Program MemoryW .C ALE .TWPSEN W
PORT0 Y.
PORT1 PORT2 PORT3
W .1 00Y M
W
W . 100
W O W
Idle Internal WW .100Y.C 1 M.TW1 W
Data Data Data Data
W O
Idle External WW .100Y.C1 M.TW 1 Float Data Address Data
W .C O
Power Down Internal WW .100Y 0 0 Data Data Data Data
W W
Power Down External
W 0 0 Float Data Data Data
11
W WW 00Y.CO .TW W
.100 M.T W.1 Y.COM W .1 M
W 00 .T W.1 Y.COM W
W .1
WW .100Y W W .100 M.T
W 00 .T
W W .100 M.T
W O W O W W .C O
Program Memory Lock WWBits.100Y.C M.TW Y W
WW .100Y.C M.TW W
W .100 VPP =O12V M.T VPP = 5V
WThe AT89C52 O has three lock bits Wthat W can be . C
left O unpro- W Y .C W
WW grammed Y.C TWbe programmed W Y
.100to obtain .TW Top-sideWMark W.100AT89C52 .T AT89C52
W .100 (U)Oor M.can W (P)
C O Mthe W xxxx .C OM xxxx - 5
WWadditional 0 0 .C
Yfeatures .T W in the following
listed WW table. 1 0 0Y. M .TW W .1 0Y
0yyww M .TW yyww
W.1 OM W . O WW 00Y.CO .TW
WW .100Y.C M.TW WW .100Y.C M.TWSignature W
Lock W BitYProtectionO Modes W .C O W W.1(030H)Y.=C1EH OM
W
(030H) = 1EH
W .C W W Y W W 0 T
. (031H) = 52H
W .100 Lock M.T
W
W .100 OM
.T .10 = 52H
(031H)
W(032H) OM
W O C W .C
Program
WW .100Y. C Bits
.TW W W
1 00Y
.
M .TW W .100
Y = FFH
M .TW (032H) = 05H
M W . O W O
WLB1 LB2O LB3 Protection Type
WW .100Y.C MThe WWmemory Y.C .TW
WW .100Y.C M.TW .TW AT89C52 code
W . 100array isOprogrammed
M byte-by-
O W O .C
1 W U
WW .100Y.C M.TW
U U No program
WW .100Y.C M
lock features. byte
.TW
in either WW .100Y
programming mode. To
M
program
.TW any non-
W O blank byte in the on-chip W Flash Memory, O the entire memory
2 WP U O U MOVC instructions Wexecuted Y.C must.Tbe WW Y.C Mode..TW
WW .100Y.C M.Tfrom W external W program .100 M
Werased using the Chip
W .1 0 0Erase
OM
W C O W W .C OProgramming W Y .C W
WW .100Y . memory
W are disabled from Y W W
Algorithm
10 0
Before
M.T should be
programming the
M .Tfetching code
W
bytes from W . 100 O M
AT89C52,
.T
the address, data W .and
C
control O signals
W O
EAW
.C WW programming Y. .TWtable and
WW .100Y.C Minternal .TW memory, W is
.1 00Y set up M .TW
according to the FlashW . 100 O M
mode
W O sampled and latched on W
WW of .100Y.Figures
reset, CO 9Tand WW the Y.C .TWthe fol-
WW .100Y.C M and
W programming
.Tfurther M . W 10. To program W .1 00AT89C52,
O Mtake
W O
lowing steps. C
W
WW .100Y.C the
O Flash memory is disabled.
.TW WW .100Y1..C Input .TW WW .100Y. M .TW
M O M the desired memory W
location on theO address
P WW O WW 0Y.Clines.M.TW WW .100Y.C M.TW
3
W P .100UY.C Same .TasW mode 2, but W verify is
.1 0
W W .C OMdisabled.
also
WW 02.0Y.Input CO the T W
appropriate W
data Wbyte
W
on 0
the Y .COlines..TW
data
W P .10P0 Same Y .T W W . 1 0
4 P W OMas mode 3, but external W.1 3. Y C OMthe correct combination W W.of OM
.Csignals.
W W 0 0 .C
Y execution.TisW also disabled. W W
1 00 .
Activate
M .T W W .1 0 0 Y
control
M .TW
. 1 M . O W O
WW 00Y.CO .TW WW 4. 00Raise Y.C EA/V.PP W WW .100Yprogram-
to 12V for the high-voltage .C W
W
When lock bit 1 is programmed, .1 the O M
logic level at the EA pin W
W .1 ming mode.
O M T
W O M.T
W WW a .byte Y. C
WW during
is sampled and latched .C
00Yreset. IfMthe .TW device is pow- WW 5. .10Pulse 0Y.CALE/PROG M .TW once to program 100 in theOM.T
W
. 1 to a random WW Flash CO or the W
ered up without a reset, WWthe 0latch O
Y.Cinitializes W W 0Y.array .TWlock bits. The WW byte-write Y.C is .TW
00cycle
W 0 .T . 1 0 M .1 OM
value and holds that value
W W.1untilYreset . C OM is activated. The
W W W self-timed
0 Y .CO and typically takes no more
W W WW than 0 0
1.5.C
Y ms.
.TW
latched value of EA W must agree00 with the current .T logic level W Repeat
. 1 0 steps M .T
1 through 5, changing the .address 1 M
.1 M
O properly. W O W .C O
at that pin in order for the W to function
WW .100Y.C M.TW
device WW and.10data 0Y.C for the entire .TW array or until WW the end0of
. 1 0Ythe
M.T
W
W O W
object file is O M
reached. W W .C O
W .C Y .TW
WW .100Y.C M.TW WData . 1
Polling00YThe AT89C52 M .TW featuresW Data .
Polling
W 100 to indi- O M
Programming the Flash W O W .C O
W DuringWaWwrite.1cycle, .C
WW .100Y.C M.TW WWthe .end
cate 1 00Yof a write M .Tcycle. 00Y an M.TW
Olast byte written will result W O
The AT89C52 is normally shipped W withYthe . C Oon-chip Flash attempted WW read Yof.C the W W W in the 0 Y.C
com-
memory array in the erased W
W state (that .100is, contents
W
M.T= FFH) plement
W
Wof.1the
0
0 written data
O
.T
M on PO.7. Once the W .1 cycle OM.T
0
write
W O W completed, . C W Y.C
and ready to be programmed.W
W The programming.1 0 0Y.C Minterface .TW hasW been
. 1 00Y trueMdata .TWis valid onWall outputs, W . 100and OM.T
W mayYbegin. O Data Polling may begin
accepts either a high-voltage (12-volt)
(VCC) program enable signal.W
WW 00Y.Cprogramming
or a low-voltage
O
.T W the nextWcycle
W 0 0 .C M . TW WW any . 1 0Y.C M
0time
The low voltage .1 M after a writeW . 1
cycle has been O initiated. W O
mode provides a convenient way WW toW program 0 Y .COAT89C52
the
.T W W W 0 0 Y.C of.T W WW can.1also 0 0Y.C
0
W.1 Y.Cprogram- OM
Ready/Busy .1
The progress M byte programming
WisWpulled
inside the user’s system, while the high-voltage
W W be monitored
W WW by the 0 Y .CO output
RDY/BSY .T W signal. W
P3.4
ming mode is compatible withW conventional 0
.10 third- party.T 0
.1 high during M
Flash or EPROM programmers. WWW . C OM low after ALE WW goes
Y .CO .programming W to indicate
0 0 Y .T W W 1 0 0 T
The AT89C52 is shipped with eitherWthe W.1high-voltage C
BUSY.
OMor done to indicate
P3.4
W
is
W.
pulled high
. C OM
again when programming is
. W READY. Y
low-voltage programming mode enabled.
W
W The
Y
.100respective O M.T Program Verify
W
W .100
. C W If lock bits LB1 and LB2 have not been
top-side marking and device signature WWcodes.1are 00Ylisted inM.TW programmed,
W
the programmed code data can be read back
W O
WW .100Y.C M.Tvia
the following table. Wthe address and data lines for verification. The lock bits
W O cannot be verified directly. Verification of the lock bits is
WW .100Y.C achieved by observing that their features are enabled.
W
WW
12 AT89C52
W WW 00Y.CO .TW W
.100 M.T W.1 Y.COM W .1 M
W .1 O M
W 00
W.1 Y.COM W
.T
.C W W 0
W W
. 1 00 Y
M .T W W
W . 10 0
O M .T
W .1 0
O M.T
W
WW .100Y.C M.TW
O
W WChip Erase .C OThe entire Flash arrayWisWerased Y .CO .TbyW Programming
electrically
W WW 00YInterface .CO .TW
Y W W 0
W
W .100 the proper
using .Tcombination of control
OM low for 10 ms. The
0
W.1 signals C
M by
Oand W W.1 YFlash M
.CO array
W W holding
00 Y .C
ALE/PROG .T W W W code
1 0 0 Y
array . is written
M
W Every code
W
.T entire array canW
byte in the
. 0 0
1erased, by M .TW can be written, and the
. 1 M . be O using the appropriate combi-
W W all 1s.
with
Y . C O chip erase operation
The
W W WW must beYexecuted
0 .CO .TWnation of control W W 0 0 C
Y.The .T W
W before . 1 0
0the code memory M .T can be reprogrammed. . 1 0 M W .1
signals.
O write
M operation cycle is self-
W C O W W .C O timed and W
once initiated, Y .C
will W
automatically time itself to
WW Reading 1
Y. Signature
00the M .TW Bytes The W signature . 1
Y
00bytes are M .TW W
W . 100 O M .T
. W O completion.
WreadWWby the 0 .CO procedure
Ysame .T W as a normal WW verification 0 0Y.C ofM.TAll W WW .100Y.C M.TW
0 . 1 major programming vendors offer worldwide support for
1
W. 030H,
locations
.C OM and 032H, except
031H,
WW that P3.6.C
Y
O
and
W W WW 0series. 0 Y .COPlease W
W W
P3.7 must . 1
Y W W
0be0 pulled toMa.Tlogic low. The valuesWreturned . 10 0 are M.
O
the
T Atmel microcontroller
W .1 O M.T contact your local
W O
WW .100Y.C M.TW
programming vendor WW for the Y.C
appropriate
.software
TW revision.
WW .100Y.C M.TW
as follows.
W . 100 O M
W O
WW .100Y.C M.TW
(030H) = 1EH indicates
O manufactured by Atmel
WW = 052H
W(031H) 0 Y.C indicates .T W
89C52 WW .100Y.C M.TW
.1 M W O
WW = FFH
(032H) Y .CO .12V
indicates W programming W WW 00Y.CO .TW WW .100Y.C M.TW
W 0
0 indicates T 1 M
(032H)W
W
=.105H
.C OM 5V programming WW. Y .CO .TW W WW 00Y.CO .TW
Y W W .10 0 .1
W .100 M.T WW 00Y.CO .TW
M WW 00Y.CO .TW
M
FlashWProgrammingWW 00Y.CO Modes W W W
W .1 O M.T W.1 Y.COM W W W.1 Y.COM W
.C W W 0
Mode W W
. 1 00Y M TW
.RST PSENW
W . 00
1ALE/PROG O M .T EA/VPP P2.6 .10P2.7
W O M.T P3.7
P3.6
WW 00Y.CO H.TW L WW .C WW Y. C H .TWH
Write Code WData 1 M . 1 00Y M .TWH/12V L
W .10H0 O M
W . O W W .C O W Y .C W
. C Y W W 0
W W
.1 00Y M .TW W
W .100 O M .T W .10 O M.T
W O L W
.C
Read Code Data
WW .100Y.C HM.TW L WW .1H00Y.C M.TW H W L 00Y H
. 1 M .THW
W O W C O
W - 1 Y.COH
WW .100Y.C M.H/12V TW HWW H 00Y.H HW
.T
Write Lock
WW Bit 1 0 0 .T W L
W .1 O M
W. OM W O
WW .100Y.C M.TW
W O W O
W
WWBit - .2100Y.CH M.TW
O L WW .100Y.C H/12V .T W H WWH
. 1 0 0LY.C M L .TW
W O M W O
W
WW .100Y.C M.TW
O
W O W O
Bit W
WW .100Y.C M.TW
-3 H O L WW .100Y.C H/12V .T W H WLW .1H00Y.C L M.TW
W OM W O
W
WW .100Y.C M.TW
O
CO W O
Chip Erase W W H Y.CO L W
W WW(1) 00Y.H/12V .T W H LWW L
1 0 0 Y .C
L .TW
W . 1 00 M .T W . 1 O M W . O M
W
WW .100Y.C M.TW
O
W O
Read Signature Byte W WH Y .C OL
W H
W WW 00YH.CO .TLW L WWL
0 0LY.C .T
Note:
W
1. Chip Erase requires a 10-ms W
0
.10PROG pulse.
O M.T W .1
.C O M W W.1 Y.COM
W W .100 M.T
W O W O W W .C O
Y
M
W W .C O W W Y .C O
W W W W
0 Y .CO
W 00 Y .T W W 0 0 .T .1 0
W W
W
W .100 O M.T
W
W .100 OM
.T
C W .C W
WW .100Y. M.T
W W .100
Y
M.T
W O W C O
W O W
WW .100Y.C M.TW WW
W O
WW .100Y.C M.TW
W O
WW .100Y.C
W
WW
13
W WW 00Y.CO .TW W
.100 M.T W.1 Y.COM W .1 M
W 00 .T W.1 Y.COM W
W .1
WW .100Y W W .100 M.T
W 00 .T
W W .100 M.T
W Figure 9. O
Programming the Flash W
Memory O Figure W
10. W
Verifying .
theC O
Flash Memory
WW .100Y.C M.TW WW .100Y.C M.TW W . 1 00Y M .TW
W +5VO W O
W
WW .100Y.C M.TW
O
WW .100Y.C M.TW
AT87F52
WW .100Y.C M .TW
AT87F52
+5V
W O W O
W
WW .100ADDR.
O
Y.C A0.T - W
A7
P1 WWVCC .100Y.C M.TW WW A0.1-0A7
ADDR.
0Y.CP1 M.TW V CC
W OOOOH/1FFFH OM W CO W
WW .100Y.P2.0 CO
WWP0 .100Y.PGM .TWP0
PGM DATA
WW .100Y.C A8M-.TA12 W P2.0 - P2.4 DATAOM .T W OOOOH/1FFFH
W O -MP2.4 (USE 10K
W .C O W W Y .C W W A8 - A12
0 Y .C W PULLUPS)
W W 0 Y .T WP2.6 W 0 0 .T W . 1 0 P2.6
M .T
1 0 . 1 M W O
W. FLASHY.COM W WW 00PROG Y.C
O
W SEE FLASH WW .100P2.7 Y.C .T W
WW SEE
. 1 0 0 M .T P2.7 W
ALE
. 1 M .T
W O M ALE
W O
0Y.C M.TW
PROGRAMMING O PROGRAMMING
WW TABLE
WMODES 0 Y.C .T P3.6
W WW .100Y.C M.TW MODES TABLE WW .10P3.6
1 0 W O VIH
W W. .C OM P3.7 WW 00Y.CO .TW W W P3.70Y.C .T W
W 00 Y .T W W .1 0
W.1 Y.COM XTAL2 W.1VIH/VPPY.COM W WW XTAL 2Y.C
OMEA
W W 00 .T W EA
W W
1 00 M .T W .10 0 M .TW
. 1 M W . O W O
WW 00Y.CO .TW WW .100Y.C 3-24 .T W WW .100Y.C M.TW
3-24W M O
MHz
W.1 OM W O MHz W
WW .100Y.C M.TW
W O W O
W
WW .100Y.C M.TW
O
W W . C O
Y W
W 00
W.1 Y.XTAL1 OM
.T RST VIH W.
1
.C OM W
XTAL1 W.1 RST Y
M
.CO .TVW
W C W W W 0 0 Y .T W W 1 0 0 IH
W 1 0 0 GNDOM PSEN .T .1 M .
W PSEN O M
W. W O
WW .100Y.C M.TW
GND
W O W O
W
WW .100Y.C M.TW
O
W W .C O
W 00 Y .T W .1 M
Flash Programming W W
W 00and Verification .T Characteristics
W 00
W.1 Y.COM W
.T .1 M
W W.1 Y.COM W W W WW 00Y.CO .TW
TA = 0°C to 70°C, V WCC = 5.0.±1010% 0 M.T
W .100 .T W.1 Y.COM W
W C O W W . COM W
Y. Min.TW
Symbol W
WParameter .100 M.T
W W
W .100
Y
O M
W
Max
W .100Units OM.T
W O C W .C W
Y.C Voltage WW .100Y. 11.5 TW W 00VY
(1)
VPP
W W
Programming
. 1 0 0Enable
M .T W
W O M . 12.5
W . 1 OM.T
W O 1.0 WW . C
IPP(1)
WW .10Enable
Programming
0Y.C Current .TW WW .100Y.C M.TW . 10mA0Y M .TW
M W O W O
WFrequency O WW .100Y.C3 M.TW 24 WW Y.C .TW
WW .100Y.C M.TW 100
1/tCLCL Oscillator MHz
W O W . OM
tAVGL AddressW
W
W to PROG
Setup
0
O
Y.C Low .TW WW .100Y 48t.CCLCL .TW WW .100Y.C M.T
0
.1 PROG OM M W O
WAfter W
WW .10048t .CO .TW WW .100Y.C M.T
WW .100Y.C M.TW
tGHAX Address Hold YCLCL
M WW 00Y.CO
tDVGL Data Setup toW
W PROG Low.CO
Y W W WW 48t 0 Y .CO .TW
CLCL W
W .100 .T 0
W.148tCLCL OM .1 M
tGHDX Data Hold AfterW
W PROG
. C OM
W W Y . C W W WW 00Y.CO
W 00 Y .T W 10 0 .T .1
tEHSH P2.7 (ENABLE) High W.1to VPPY.COM W W W.48t CLCL .C
OM WW
W Y W W
tSHGL
W
VPP Setup to PROG W .100
Low O M.T
W
W .11000 OM
.T
µs
W Y .C W W W 0 Y .C T W
W 0 0 .T 1 0 .
tGHSL(1) VPP Hold After PROG .1 M W10 . OM µs
W WW 00Y.CO .TW WW .100Y.C
tGLGH PROG Width W.1 Y.COM W W 1 110 µs
W W 0 0 .T WW
tAVQV Address to Data Valid .1 M 48tCLCL
W WW 00Y.CO .TW
ENABLE Low to Data Valid .1
tELQV
W W .C OM 48tCLCL
W 00 Y
W.1
tEHQZ Data Float After ENABLE 0 48tCLCL
W
tGHBL PROG High to BUSYW Low 1.0 µs
tWC Byte Write Cycle Time 2.0 ms
Note: 1. Only used in 12-volt programming mode.
14 AT89C52
W WW 00Y.CO .TW W
.100 M.T W.1 Y.COM W .1 M
W .1 O M
W 00
W.1 Y.COM W
.T
.C W W 0
W W
. 100 Y
M .T W W
W . 10 0
O M .T
W .1 0
O M.T
W
WW .100Y.C M.TW
O
W O
WFlash .C O
Programming and WW VerificationY .CO Waveforms W W -WHigh Y.C
Voltage
0 Mode
W (VPP=12V)
W W
. 1 00 Y
M .T W W
W . 10 0
O M .T
W .1 0
O M.T
W .CO - P1.7 WW .100YVERIFICATION .C
WW .100YP1.0 .TW WW .100Y.CPROGRAMMING M .TW M .TW
M W OADDRESS W O
O WW .100Y.C M.TW
W ADDRESS
WW .100P2.0 Y.C - P2.4 .T W WW .100Y.C M.TW
OM W O W O
tAVQV
W
WW .100Y.C M.TW WW .100Y.C M.TW WW .100Y.C M .TW
W O IN W O
0Y.COUTM.TW
PORT O 0 DATA
W
WW .100Y.C M.TW WW .100Y.tC Mt.TW WW .10DATA
W W .C O
W WW 00YDVGL
tAVGL .CO GHDX W tGHAX
W WW 00Y.CO .TW
Y W .T
W 00
W.1ALE/PROG OM
.C W
W W
. 1 00Y M .TW W
W . 100 O M .T W
W .100 O M.T
W O t SHGLW Y.C t
WW .100Y .C W
WW .100Y.C M.TW W M.T
GHSL
W
W . 100 tGLGHOM.T W O
W O
WW VPP.100Y.C M.TW WW Y.C .TW
WW .100Y.C M.TW LOGIC 1
W .100 O M
W EA/VPP O W
WW .100Y(2) .CO .TW LOGICW0W 00Y
.C W
WW .100Y.C M.TW M W . 1 O M.T
W O C
WW P2.7
W .CO .TW WW tEHSH
00Y
.C .TW WW .100Y. tEHQZ .TW
. 1 00Y M W .1 O M tELQV
W O M
WW
W
(ENABLE) 0 Y.C
O
.T W WW .100Y.C M.TW WW .100Y.C M.TW
0
W W.1 Y.COM W WW tGHBL Y .CO .TW W WW 00Y.CO .TW
W 0
W P3.4 .100
W OM
.T 0
.C W
W
(RDY/BSY)
W .1 00Y M .TW W
W .100 O M .T BUSY W READY
W .100 O M.T
W O WW .100Y .C
WW .100Y.C M.TW WW .100Y.C M.TW tWC
M .TW
W O W O
W
WW .100Y.C M.TW
O
W W .C O WW 00Y.C-OLow W W WW 00Y.CO .TW
Flash Programming W .100
Y and Verification
M.T
W Waveforms
W .1 M .T Voltage Mode 1 PP=5V)
W.(V M
W W . C O W W Y .C O
W W W 0Y .CO .TW
W 00Y .T W W 00 .T 1 0
P1.0 - P1.7 W.1 .C OM PROGRAMMING
W W.1 Y.COM WVERIFICATIONWW. 0Y.COM W
W .TW W .10 M.T
P2.0 - P2.4 W .1 00Y M
W
ADDRESS
W . 100 O M .T ADDRESS W C O
W O
WW .100Y.C M.TW tAVQV W
W Y. .TW
WW .100Y.C M.TW W .100 O M
W O W O W .C
PORT 0WW 0 0 Y.C .T W DATA W IN W
.1 0 0Y.C M.TW DATA OUT W . 1 00Y M.T
W
. 1 O M W O W .C O
W
WW .100Y.C tAVGL M.TW
tDVGL tGHDX
WW .100t Y.C M.TW WW .100Y M.TW
W O W O
WW .100Y.C M.TW
GHAX
WW 00Y.CO .TW WW .100Y.C M.TW
ALE/PROG W
W W. 1
.C OM
W tY
00SHGL .T W .1 M
W.1 Y.COM WtGLGH W W.1 Y.COM W WW 00Y.CO .T
W W 00 1 M.T W
W
W .100 O M.T W.1LOGICY.C O W W.1 Y.COM
.C W W
EA/VPP WW .100Y .TW W 100 0 OM.T
LOGIC
.
W .100 M
W W . C O M W W Y.C W W W W
0 Y.CO
W 00 Y tEHSH .T W W 0 0 .T .1 0
P2.7 W.1 Y.COM W W W.1 Y.COM W
tELQV tEHQZ
WW
W W
(ENABLE)
W
W .100 O M.T
W
W .100 OM
.T
C W .C W
WW .100Y. TW
Mt.GHBL
W .100
Y
M.T
W O W C O
P3.4
(RDY/BSY) O BUSYW READY
W
WW .100Y.C M.TW WWt
W O WC
WW .100Y.C M.TW
W O
WW .100Y.C
W
WW
15
W WW 00Y.CO .TW W
.100 M.T W.1 Y.COM W .1 M
W 00 .T W.1 Y.COM W
W .1
WW .100Y W W .100 M.T
W 00 .T
W W .100 M.T
W O W O W W .C O
WW Absolute 00Y
.C Maximum .TW WW .100Y.C M.TW
Ratings* W .100
Y
M.T
W
. 1 M W O W C O
W .CO .TW..................................
WW .-55°C .C .TW *NOTICE: WWStresses Y. W under “Absolute
WW Operating
. 1 00Y Temperature M 1 00Yto +125°C M W . 100beyond O
those
M .Tlisted
W W Y .C O
W W WW -65°C 0 Y CO
.+150°C T W W WMaximum
0 0
Ratings”
Y.C This .isTcause
may
W permanent dam-
W Storage 0 Temperature
M.T ..................................... .1 0 to . age to 1
the
W. operation
device.
OM a stress rating only and
W .10 O W W .C OM W
functional Y .C of the W
device at these or any
WWVoltage .
0YAnyC W W 00Y .TW W 100 beyond T
.those
. 1 0on PinM.T . 1 M other W .
conditions O M indicated in the
WRespectYto O
.CGround WW 0to Y .CO .TW W W 0 Y.C of this.Tspecification
W
WW with
. 1 0 0 M .T W
.....................................-1.0V
W . 1 0 +7.0V
M
operational
W . 1 0sections
O M maximum israting not
W O .C
.CO Voltage.............................................
implied. Exposure to absolute
WW Operating .TW WW .100Y6.6V .C .TW WW for 0Y
10extended .TWmay affect
WMaximum . 1 00Y M W O M conditions
W .
.C O M
periods
W WW 00Y.CO .TW WW .15.0 1 0 0Y .C .TW WWreliability.

device
. 1 00Y M .TW
DC Output.1Current......................................................
OM W mA O M W O
W
W O W O
WW 00Y.CO .TW
DCWCharacteristics WW .100Y.C M.TW WW .100Y.C M.TW
W
00in this table.Tare valid for TA = -40°C O VCC = 5.0V ± 20%, unless .1otherwise noted.
W shown M
The values
W.1 Y.COM W W W.1to 85°C Y .C
andM
W WW 00Y.CO .TW
W W 0 .T W
W.1 Y.COM W
Condition 0
W .100 M.T
Symbol Parameter Min Max Units
W .C O W W.1 Y.COM W W 0
W YVoltage .TW W(Except EA) 00 W 0 0.2 VCC-0.1 . T
M.T
VIL Input Low -0.5 V
W
W .100 O M W .1
. C O W W.1 Y.COM W
.C W Y W W 0 VCC-0.3M.T V
VIL1
WW Input.1Low 00Y
Voltage (EA) W
.T W .100 M.T
-0.5
.100.2
W O M W .C O W W .CO .TW
Y+0.5
VIH
WW .100Y.C M.TW
Input High Voltage
WWXTAL1,.1RST)
(Except
00Y M .T W 0.2 VW CC+0.9
. 1 0 0
V CC
M
V
WHigh Voltage O W O 0.7 VCC W W .C O

VIH1 Input (XTAL1, W RST) .C Y
VCC+0.5
.TVW
WW .100Y.C (1) M.TW W . 1 00Y M .TW W
W . 100 O M
IOL = 1.6 mA W O
WW 00Y.C(1)O .TW WW .100Y.C M.TW WW .100Y.C M.TW
VOL Output Low Voltage (Ports 1,2,3) 0.45 V
W 1
. Voltage OM W O
IOL = 3.2 mA W O
WW .100Y.C M.TW
VOL1 Output Low 0.45 V
W W0,WALE, PSEN)
(Port
0 0 Y.C .T W WW .100Y.C M.TW
W.1VoltageY.COM W IOH = -60 µA, VW W O W O
VOH WHigh
Output
W 0 .T W CC = 5V ±0 0
10% Y.C . T W 2.4 WW .100Y.C M V .TW
. 1 0 M .1 M W O
WALE, PSEN) O
(Ports 1,2,3,
WW 00Y.CO .TW0.75 VCC WW 00Y
.C V .TW
WW .100Y.C M.TWIOH = -25 µAW . 1 M .1 M
W W . C O
W IOH = -10 µA WW 00Y.CO .TW 0.9 VCC W WW 00Y.CO V
.TW
W 0 0 Y .T W . 1 M .1 M
.1 M W± 10% Y.CO W O
VOH1
(Port 0 W
WW 00Mode)
Output High Voltage
Y.C
O
.T
IOH = -800 µA, VCC W
W W
= 5V
0 0 .TW
2.4
WW .100Y.CV M.TW
in External Bus .1 M
W W. 1
.C OM IOH = -300 µA
W WW 00Y.CO .0.75 W
VCC
W WW 00Y.VCO .TW
W 00 Y .T -80 µA W T .1 M
W.1 Y.COM IOH =W W W.1 Y.COM 0.9 VW CC WW 00YV.CO .TW
W W 00 .T W
IIL W Current.1(Ports
Logical 0 Input
W
00 1,2,3) MV.INT= 0.45V
O W.1 Y.COM W -50
W W.1 µAY.COM
W . C WVCC = 5V ± 10% W W 00 .T
ITL Logical 1 to 0W 100
Transition Current
W .
Y
O
VIN.=
M T2V, W
W .100 O M.T -650
W W.1 µA Y.COM
WW .100Y .C
WW .100Y.C M.TW W W .100 M.T
(Ports 1,2,3)
W O W O M.T W W .CO
ILI Input Leakage Current (Port 0, EA) .C 0.45 < VIN < VCC
WW .100Y .TW WW .100Y.C M.TW ±10 W µA Y
.100 M
RRST Reset Pulldown ResistorW
W . C O M
W W W Y . C O 50
W 300
W W KΩ 00Y.CO
W
Y W 0 .T
CIO Pin Capacitance
W 00
W.1 Y.Test M.T= 1 MHz, TA = 25°C WW.10
OFreq. .C OM 10 W WpF.1
W C W Y W W
ICC Power Supply Current
W
W .100 ActiveOMode, M.T 12 MHz
W
W .100 OM
.T 25 mA
.C W Y .C W
WW .100YIdle Mode, .T
M12 MHz
W W . 1 0 0 M .T 6.5 mA
W W Y .CO W W WW 00Y.CO
Power Down Mode (1) W 0
.10 VCC = 6VOM. T .1 100 µA
W C W W
WW .10V0CCY=. 3V M.TW W 40 µA
W O
conditions, I C must be externally
WW .100Y.OL
Notes: 1. Under steady state (non-transient) limited as follows:
Maximum IOL per port pin: 10 mA M .TW
W .C O
Maximum IOL per 8-bit port: WW 00Y
Port 0: 26 mA Ports 1, 2, 3: 15 mA W . 1
Maximum total IOL for all output pins: WW71 mA
If IOL exceeds the test condition, VOL may exceed the related specification. Pins are not guaranteed to sink current greater
than the listed test conditions.
2. Minimum VCC for Power Down is 2V.
16 AT89C52
W WW 00Y.CO .TW W
.100 M.T W.1 Y.COM W .1 M
W .1 O M
W 00
W.1 Y.COM W
.T
.C W W 0
W W
. 100 Y
M .T W W
W . 10 0
O M .T
W .1 0
O M.T
W
WW .100Y.C M.TW
O
W WAC Characteristics
.C O
Y W
W
W .100 operating .T
OM conditions, load capacitance W.1 Y .C OM0, ALE/PROG, andW W.1 100 Y .CpF;OM
W
W Under
Y .C W W W 00 for Port
.T W W PSEN = 0
1 0 load .Tcapacitance for all other
W outputs . 1 00 = 80 pF.M.T W . 1 O M W . O M
W
WW .100Y.C M.TW
O
W O W O
WW
W
External 0 Y.C
O
Program .T W and Data WW Memory 0 0 Y.C Characteristics
.T W WW .100Y.C M.TW
0 W. 1 OM O
W.1 OM W
WOscillator WW .1Variable 0Y.C Oscillator
WW .100Y.C M.TW WW .100Y.C 12 M .T
MHz 0 M.T
W
W O W .C O
WW 00YParameter
WSymbol .CO .TW WW .100Y.C Min .TW Max W W.Min
W
100
Y
M .TW
Max Units
W . 1 O M W O M W .C O
Y.C Frequency WW .100Y .C 0100Y W
W W
1/tCLCL
1 00Oscillator M .TW M .TW W
W . O M24.T MHz
. O W O .C
tLHLLWW C Width
ALE.Pulse
.TW WW .100Y.C127 M.TW WW2tCLCL.-40 100
Y
M.T
W ns
W . 1 00Y M W O W C O
tAVLL WW Address .CO WW .100Y.43 C WW tCLCL-13 00Y. .TW ns
W 1 00Y
Valid to ALE
M .TW
Low
M .TW W .1 O M
tLLAX WW Address
. O W O W -20 00Y.C
W 0 0 Y.CHold After .T W Low WW .100Y48.C M.TW
ALE WtCLCL .1 M.T
W ns
. 1 M W O W C O
WALE Low to O WW .100Y 4t.CLCL-65 .TW ns
tLLIV
WW .100Y.C M.TW
Valid Instruction In
WW .100Y.C M.T233 W M
tLLPL W WALE Low to.C O Low
PSEN W W 43Y.CO W tCLCL
W W
-13
W
0 Y .CO .TWns
0Y W W 00 .T 0
W
W .10Pulse O M.T W .1205
.COM W W.1 Y.COM W
tPLPH PSEN Width
C W .TW
3t -20
.T ns
WW .100Y. .TW 00Y W 100
CLCL
W . 1 M . M
M
O Instruction In W O W .C O
tPLIV PSENW Low to Valid
145
WW .13t0CLCL 0Y-45 M .Tns
W
O W O W .C O
tPXIX InputW
WW .100Y.
Instruction C Hold After PSEN
W
.TPSEN WW .100Y.C M.TW
0 0
WW .100Y M
ns
.TW
M W O W .C O
WW 00Y.CO .TW
tPXIZ Input Instruction Float After 59 t -10 ns W
W WW .100Y.C M.TW WW CLCL .1 00Y M .T
tPXAV PSEN to W . 1
Address ValidO M W
75 O t -8 W W .C O ns
Y.C WW .100Y.C M.TW 00Y .TW
CLCL
WW Valid .TW W .1-55
tAVIV Address to .1 00Instruction M In W 312O 5tW C O M
ns
WW
W .CO WW .100Y.C M.TW WW CLCL.100Y. .TW
tPLAZ PSEN Low to.Address 1 00Y FloatM.TW 10 O W10 O nsM
W O WW 0Y.C M.T6tW -100 W
W .C
00Y ns M.TW
tRLRH WWWidth.100Y.C M.TW
RD Pulse
W400 W.10 W .1 O
O
WW 00Y.CO .TW Y.C WW .100Y.C M.TW
CLCL
W W 00 .T W
tWLWH W
WR Pulse Width .1 M 400 . 1 M 6tCLCL-100 W nsO
WW 00Y.CO .TW W WW 00Y.CO .T W WW .100Y.C M.TW
W .1 252 M
W.1 Y.COM W WW 00Y.CO .TW
tRLDV RD Low to Valid Data In 5tCLCL-90 ns
W W WW 00Y.CO .TW W
tRHDX Data HoldW After RD .100
W OM
.T 0
W.1 Y.COM 0 W W W.1 ns Y
M
.CO .TW
W .C W W W 0
tRHDZ Data Float AfterW RD .100Y M.T
W 100 .T 2tCLCL-28 W.10 ns OM
W .C O W W.97 .C OM
W W Y .C
WWData In Y W W .100
Y
M.T 8tCLCLW 00 .T
tLLDV ALE Low to Valid
W .100 O M.T W
517
.C O
-150
W W.1 ns Y.COM
W In 00Y.C
WData W WW 585.100Y M.T
W 9t -165 W .1ns00 M.T
tAVDV Address to Valid
W .1 O M.T W O CLCL
W W .C O
tLLWL ALE Low to RD or WWR W Low 00Y.C .TW 200 WW300 .100Y.C 3tCLCL-50.TW 3tCLCL+50
M
W .100
ns
Y
M
W . 1
.C O M W W Y . C O
W W W W
0 Y .CO
WRW Y W W 0
0 CLCL .T 0
.100 W.1
tAVWL Address to RD or W Low 203 4t -75 ns
W O M.T W W.1 Y.COM W W
W .C W W
tQVWX Data Valid to WR Transition
W
W .100
Y
O M.T
23 W
W .100 tCLCL-20 OM
.T ns
C W .C W
tQVWH Data Valid to WR High WW .100Y. M.T
433W W 7t Y -120
.100CLCL OM.T
ns
W O W .C
tWHQX Data Hold After WR
WW .100Y.C M33 .TW WW .1t0CLCL 0Y-20 ns
tRLAZ RD Low to Address Float WW .CO .TW 0 WW
W 0 ns
W . 1 00Y M
RD or WR High to ALE High WW O
tWHLH
W 0 0 Y.C 43 .TW 123 tCLCL-20 tCLCL+25 ns
W . 1 O M
WW .100Y.C
W
WW
17
W WW 00Y.CO .TW W
.100 M.T W.1 Y.COM W .1 M
W 00 .T W.1 Y.COM W
W .1
.CO M W W.1 Y.COM W W
WW .100Y W W .100 M.T
W 00 .T
W W .100 M.T
W O W O W W .C O
External Program Memory WW Read Y.CCycle Y W
WW .100Y.C M.TW . 100 M .TW W
W .100 O M.T
W O C
W
WW .100Y.C M.TW
O
W W 00Y
.C .TW WW .100Y. M .TW
tLHLL
W . 1 O M W O
W O
WW .100Y.CALE M.TW WW .100Y.C M.TW WW .100Y.C M.TW
W O W O WW 00Y.CO .TW
WW .100Y.C M.TW t WW .100Y.C M.TW W tPLPH
W O AVLL Wt .C O tLLIV W W.1 Y.COM W
.C W W
W W
. 1 0Y
0PSEN M .TW W
W . 100
LLPL Y
O M .Tt W
W .100 O M.T
W O WW .100Y .C
WW .100Y.C M.TW .TW
PLIV
WW .100Y.C M.TW tPXAV W O M
W O
W
WW .100Y.C M.TW
O
WW .100Y.CPLAZ M.TW
t
tPXIZ WW .100Y.C M.TW
tLLAX
W W .C O
W WW 00Y.CO t.PXIX W W WW 00Y.CO .TW
W 00 Y .T W .1 M T .1 M
W W.1 0 Y.COM W
PORT A0W WW 00Y.CO INSTR
- A7 W IN W WW A0 - A7 0 Y.CO .TW
.T 0
W
.C W
WW .100Y M .TW W tAVIV .100
W O M .T W
W .100 O M.T
WW 2 00Y.CO .TW W .C
WPORT WW A8.1-0A15 0Y.C M.TW W A8 - A15 .100Y M .TW
. 1 M W O W O
W
WW .100Y.C M.TW
O
W W .C O
Y W
W
.C W
ExternalWData Memory
W
.1 00Y M
Read
.TW CycleW W.100 O M .T W
W .100 O M.T
W O WW .100Y .C
WW .100Yt.C M.TW WW .100Y.C M.TW M .TW
W O W O
W O
LHLL
WW .100Y.C M.TW
ALE
W W .C O
W WW 00Y.CO t .TW W WW 00Y.CO .TW
W 00 Y .T W .1 M
W.1 Y.COM W W W.1 Y.COM WHLH
W WW 00Y.CO .TW
W W 00 .T W .1
PSEN W 00 .T W.1 Y.COM W M
W W.1 Y.COM W tLLDV W W WW 00Y.CO .TW
W .100 M.T
Wt
RLRH W.1
00 .T W.1 Y.COM W
W C O W . C OM W
WW .100Y. t .TW Y W W .100 .T
W O MLLWL
W
W .100 O M.T W W .C OM
WW .100Y. C Y W
RD WW .100Y.C tLLAX M .TW M .TW W
W .100 O M.T
O W O .C
W
WW tAVLL.100Y.C M .TW
tW W
RLDV Y.C
00tRHDZ .TW WW .100Y M .TW
W . 1 O M W O
WW .100Y.C M.TW
W t
O RLAZ
WW .100Y.C M.TW WW .10t0RHDX Y.C .TW
M WW 00Y.CO .T
PORT 0 A0 W-
WFROM Y
A7 RI .C OR
O DPL
W W
DATA W
IN
W
A0 0 -Y .CO
A7 FROM .T
PCLW INSTR W
IN
W 00 .T 0
W.1 Y.COM W .1 M
W W.1t Y.COM W W W WW 00Y.CO .T
W 00 M.T
W 00 .T W.1 Y.COM
W .1AVWLt .C O W W.1 Y.COM W W
WW .100Y AVDV
.TW W . 100 M .T W .100 M
PORT 2 P2.0W
W - P2.7 OR C
. A8 M
O- A15 FROM DPH W W Y C
A8 - .A15O FROM PCH
W W W W
0 Y.CO
W 00 Y .T W W 0 0 .T .1 0
W W
W
W .100 O M.T
W
W .100 OM
.T
C W .C W
WW .100Y. M.T
W W .100
Y
M.T
W O W C O
W O W
WW .100Y.C M.TW WW
W O
WW .100Y.C M.TW
W O
WW .100Y.C
W
WW
18 AT89C52
W WW 00Y.CO .TW W
.100 M.T W.1 Y.COM W .1 M
W .1 O M
W 00
W.1 Y.COM W
.T
.C W W 0
W W
. 100 Y
M .T W W
W . 10 0
O M .T
W .1 0
O M.T
W
WW .100Y.C M.TW
O
W WExternal .C O Data Memory W
W
W Cycle
Write Y .CO .TW W WW 00Y.CO .TW
W 00 Y .T W 0 0 .1 M
W tLHLL W 0 0 .T W .1
W 00 .T W.1 Y.COM W M
W
W .100 ALEOM.T
W
W .100 OM
.T
W W.1 Y.COM W
C W .C W
WW .100Y. M.T
W W .100
Y
M.T
W tWHLH
W .100 OM
.T
W O W C O W .C W
WW .10PSEN 0Y.C M.TW WW .100Y. M .TW W .100
Y
M.T
O W O W .C O
W
WW .100Y.C M.TW WWtLLWL.100Y.C tWLWH .TW WW .100Y M .TW
W O M W O
W
WW .100Y.C M.TW
O
W W WR Y.CO W WW 00Y.CO .TW W WW 00Y.CO .TW
W 00 .T W
t .1 M
W.1 Y.COM t W
LLAX
W W.1 Y.COM W t WW 00Y.CO .TW
W t
W 00 .T W
W .100 M.T W.1 Y.COM W
QVWX WHQX
W.1 tQVWH
AVLL
W C O W .C OM W
WW .100Y . .TW Y W W .100 M.T
M
W
W . 100 O M .T W C O
W0
WW .100Y.C M.TW
PORT OA0 - A7 FROM RI OR DPL
WW .1DATA 00Y
.C
OUT
.TW
A0 - A7 FROM WWPCL .10INSTR 0Y. IN M.TW
W O M W O
W
WW .100Y.C M.TWtAVWL
O
W W .C O
W 0 Y W
.T - P2.7 OR A8 - A15 W .1 DPH OM .1 M
PORT 2 W.10 OM P2.0 FROM
.C A8 - A15 FROMW
W PCH .CO .TW
W .C W W Y W W 0 0Y
W
W .100
Y
O M.T
W
W .100 OM
.T
W W.1 Y.COM W
C W .C W
WW .100Y. M.T
W W .100
Y
M.T
W 00
W.1 Y.COM W
.T
W O W .C O W
External Clock WW Drive .C
00Y Waveforms .TW WW .100Y M .TW W .100 M.T
W . 1 O M W O W W .C O
Y
M.T
W
W O W C O
W
WW .100Y.C M.TW
O
WW .100Y.C M.TW tCHCX WW .100Y. M .TW
W O
W tCHCXO
WtW
W .CO .TW WW .1t0CHCL 0Y.C M.TW
WW .100Y.C M.TW
VCC - 0.5V
CLCH
. 1 00Y M W O
W O
W
WW 0.7.1V0CC0Y.C M.TW
O
W O W O
W
WW .100Y.C M.TW
O
0.2 VCC
W W- 0.1V Y.CO W WW 00Y.CO .TW W WW 00Y.CO .TW
W 00 .T W .1 M
0.45V
W.1 Y.COM W t W W.1 Y.COM W WW 00Y.CO .TW
W CLCX W 00 .T W
W
W .100 O M.T W.1 Y.COM W W W.1 Y.COM
.C W W 00 .T
WW .100Y M.T
W W 00
.t1CLCL M.T W.1 Y.COM
W O W .C O W
W W .100 M.T
W O W O W W .C O
Y
M
W O W .CO
External Clock DriveWWW 100Y.CO .TW W W 0 Y .C
.TW W W 0 0 Y
W . O M 0
W.1 Y.COM W W W.1
W .C WMin W W
Y W .100 .T
Symbol Parameter Max Units
W
W .100 O M.T W W .C OM
WW .100Y. C W0 Y W
W .100 M.T
1/tCLCL Oscillator Frequency 24 MHz
W O M.T W C O
tCLCL Clock Period
WW .100Y.C M.T41.6 W WW .100Y. ns
W O W
tCHCX High Time
WW .100Y.C M.T 15W WW ns
W O 15
WW .100Y.C M.TW
tCLCX Low Time ns
W O
WW .100Y.C
tCLCH Rise Time 20 ns
tCHCL Fall Time W 20 ns
WW
19
W WW 00Y.CO .TW W
.100 M.T W.1 Y.COM W .1 M
W 00 .T W.1 Y.COM W
W .1
WW .100Y W W .100 M.T
W 00 .T
W W .100 M.T
W O W O W W .C O
Y.C Mode
.
.C WW Register .TWTest Conditions Y W

WW Serial
. 1 00Y Port M .Timing:
TW Shift . 100 M
W
W .100 O M.T
W O C
W
WW The.1values .CO .table TW are valid W forW .C and
00Y± 20%M W Capacitance WW = 80 10pF.0Y. .TW
00Y in this M
VCC = 5.0V
W . 1 O
.TLoad W . O M
W O
WW .100Y.C M.TW12 MHz Osc WW .100Variable Y.C Oscillator W
WW .100Y.C M.TW W O M.T
W O C
W
WWSymbol
O
.CParameter .TW WW .100Y.C M.TMin W MaxWW .10Min 0Y. .TW Max Units
. 1 00Y M W O W .C O M
W O C W W
WW tXLXL
00Y
.CSerial Port W
.T
Clock Cycle Time WW .100Y. M
W
.T1.0 W 12t0
.1 CLCL0Y M.T
µs
. 1 M W O W .C O
WW 00YOutput
WtQVXH .CO Data .TW
Setup to Clock W Edge00Y.C
WRising .TW
700 WW10tCLCL . 0Y
10-133 M .TW ns
. 1 M . 1 O M W O
WW 00Output
tXHQX O
Y.C Data.T Hold
W After ClockWRising WWEdge00Y.C 50 W
.T WW2tCLCL.-117 1 00Y
.C .TW ns
W . 1 M . 1 M W O M
O W O .C
tXHDXWW .CData Hold
Input
.TW
After Clock Rising
WWEdge.100Y.C M 0
.TW WW 0 .100Y M.T
W ns
W . 1 00Y M W O W O
tXHDV WW Clock.C O Edge to Input Data Valid
Rising
.TW WW .100Y.C M.TW
700 WW .100Y.C10tCLCL .TW
-133 ns
W . 1 00Y M W O W O M
W WW 00Y.CO .TW WW .100Y.C M.TW WW .100Y.C M.TW
Shift Register W.1 Mode OM Timing Waveforms W O W O
W O W O
WW ALE
INSTRUCTION W
0 Y .CO 0 .TW 1 W W
2
0 3
0 Y.C 4 .TW 5 W6W .1070Y.C 8M.TW
0
W.1 Y.COM W .1 M WW 00Y.CO .TW
W W WW 00Y.CO .TW W
W 00 .T tXLXLW.1 OM .1 M
W W.1 Y.COM W W Y .C W W WW 00Y.CO .TW
W CLOCK
W .100 O M .T W
W .100 OM
.T
W W.1 Y.COM W
C t W .C W
WW .100Y. QVXH W
M.T
WtXHQX .100
Y
M.T
W 00
W.1 Y.COM W
.T
W O W W .C O W
W .C .TW0 2100
Y 3 .TW4 W 6.10
0 7 M.T
WRITE TO WSBUF . 1 00Y M 1W
W . O M 5 W O
W .C O W tXHDX00Y.C W W W 0Y.C W
OUTPUT DATA
W W
.1 00 Y
M .tT W W
W . 1 O M .T
W .1 SET TI OM.T
0
W O XHDV
.C WW VALID.100Y.VALID M.TW C
CLEAR RI WW .100Y.C M.TW WW VALID .1 00Y VALID M.TVALID W
WW 00Y.CO .TW
VALID VALID VALID
W W Y .C O
W W WW 00Y.CO .TW W 1 RI OM
INPUT DATAW .100 M.T W .1 OM W.SET
WW .100Y.
W C O
.T W W W 00 Y .C
.T W W W
.1 0 0Y.C M.TW
. 1 M W O
W OM WW 00Y.CO .TW WW .100Y.C M.TW
WW .100Y.C M.TW (1) W .1 M (1)
AC Testing Input/Output W W Waveforms
.C O
W WW Waveforms
Float Y .CO .TW W WW 00Y.CO .TW
W 00 Y .T W 0 0 .1 M
W W 00 .T W .1
VCC - 0.5V
W
W .100 O M.T W W.1 V Y+.C0.1V OM W W Y .C OM
0.2WVCC + 0.9VY .C W W 0 .T W W OL .100
V - 0.1V
.T
W
W .100 O M.T W .10LOAD O M W W .C OM
Y.C W .C Timing W Reference Y
.100
V Y W
W POINTS M.T
TEST W
W
0.2 VCC W .100 O M.T
WLOAD
W .100 - 0.1V OM.TPoints W W .C O
- 0.1V
WW .100Y.C M.TW WW LOAD
V
Y.C .TW
VW + 0.1V
.100
Y
100
0.45V OL
. M M
W W .C O W W Y .C O
W W W W
0 Y .CO
W 00 Y .T W W 0 0 .T .1 0
W W
Note: 1. AC Inputs during testing Ware driven
W.0. 10at0VCC - 0.5V O M.T Note: W 1. For timing
W .100purposes, T pin is no longer floating
a .port
OM from load voltage occurs. A
C W .C
for a logic 1 and 0.45V for aW logic TimingY. measure- W W when a 100 mV
Y
100 to float
change
.TWa 100 mV change from
ments are made at VIH min. W for a logic
W .1010 and VILOmax. M.T port pin
W .begins
C O
Wloaded V00Y/V. level occurs.
Mwhen
for a logic 0. WW .100Y.C M.TW W the
.1 OH OL
W C O W W
WW .100Y. M.T
W W
W O
WW .100Y.C M.TW
W O
WW .100Y.C
W
WW
20 AT89C52
W WW 00Y.CO .TW W
.100 M.T W.1 Y.COM W .1 M
W .1 O M
W 00
W.1 Y.COM W
.T
.C W W 0
W W
. 100 Y
M .T W W
W . 10 0
O M .T
W .1 0
O M.T
W
WW .100Y.C M.TW
O
W W .C O
W 00 Y
Ordering .T
Information W .1 M
W W 0 .T W
W 00
Speed
W.1(MHz)Y.COMSupply
.T
Power 0
W.1Code Y.COM W W W.1 Y.COM W
W
W W .100 M.T
Ordering Package Operation Range
W . 1 00 M .TW W
W . 100 O M .T W C O
W 12 O5V ± 20%
WW .100Y.C M.TW
AT89C52-12AC 44A WW Y. .TW
Commercial
WW .100Y.C M.TW W . 100 O M
W O AT89C52-12JC W O 44J
W Y.C
(0°C to 70°C)
WW .100Y.C M.TW WW .100Y.C M.TW 40P6 W
AT89C52-12PC . 1 0 0 M .T W
O W O W .C O
W
WW .100Y.C M.TW WW .100Y.C M.TW 44Q
AT89C52-12QC WW .100Y M .TW
W O W O
W O
WW .100Y.C M.TW AT89C52-12JI WW .100Y.C M.TW44A
AT89C52-12AI WW .100Y.C Industrial M .TW
W O 44J W O
(-40°C to 85°C)
W O
WW .100Y.C M.TW AT89C52-12PI WW .100Y.C M.TW 40P6
WW .100Y.C M.TW
W O W O
W O
WW .100Y.C M.TW AT89C52-12QI WW .100Y.C M.T44Q W WW .100Y.C M.TW
W W .C O AT89C52-12AAWW Y .CO .44A W W WW 00YAutomotive .CO .TW
W 00 Y W
.T AT89C52-12JA W.10 W 0 M T .1 M
W.1 Y.COM W WW 0(-40°C O105°C)
W W W 0 Y .CO 44J .T W W 0 Y .Cto .TW
W . 1 00 M .TAT89C52-12PA .1 0 M40P6 W . 1 O M
W O
W O
WW .100Y.C M.TAT89C52-12QA W WW .100Y.C 44Q .TW WW .100Y.C M.TW
M WW Commercial O
16 W W5V ± 20% Y .C O AT89C52-16AC WW
W W 0 Y .CO44A .TW W 0 0 Y.C .TW
W . 1 00 M T
.AT89C52-16JC . 1 0 M W .1 O M
W O
O WW .100Y.C M.TW
W 44J (0°C to 70°C)
WW .100Y.C M .TW
AT89C52-16PC WW .100Y.C 40P6 M .TW
W W .C O AT89C52-16QC
W WW 00Y.C44Q O
W W WW 00Y.CO .TW
Y W .T
W 00
W.1 Y.COAT89C52-16AIM.T W.1 Y.44A C OM W W.1 Y.COM W
W W
W W .100 M.T
Industrial
W . 1 00 M .TW W
W . 100 44J OM.T W CO
W O
AT89C52-16JI .C W(-40°C to .
85°C)
Y W
WW .100Y.CAT89C52-16PI .TW WW .100Y 40P6 OM.
TW W .100 M.T
M W W C O
W
WW .100Y.C
O
AT89C52-16QI .TW WW .10044Q Y.C .TW WW .100Y. M .TW
M W O M W .C O
W
WW .100YAT89C52-16AA .CO .TW WW .1044A 0Y.C M.TW
W
WAutomotive .1 00Y M.T
W
M W O W C O
W O
AT89C52-16JA
Y.C WW .40P6
44J .C
.TW WWto 105°C)
(-40°C Y. .TW
WW .100AT89C52-16PA M .TW 1 00Y M W .100 O M
W O
WW 44Q
W .CO .TW WW .100Y.C M.TW
0Y.C M.TW
WW .10AT89C52-16QA .1 00Y M
20 5V ± 20% WW AT89C52-20AC .C O
W WW44A 00Y.CO .TW W WW 00Y.CO .TW
Commercial
Y W
W 00
W.1AT89C52-20JC OM
.T W
44J
.1
.C OM W
(0°C to 70°C) W.1 Y.COM W
.C W W
W W
. 1 00Y
AT89C52-20PC M .TW W 40P6.100
W
Y
O M .T W
W .100 O M.T
W O WW .100Y .C
WW AT89C52-20QC00Y
.C .TW WW44Q .100Y.C M.TW .T
W .1 O M W C O W W .C OM
.C W . W Industrial Y
WW AT89C52-20AI
.1 00Y M .TW W44A
W . 100
Y
O M.T
W
W .100 OM.T
W
AT89C52-20JI .C O 44JW Y.C (-40°C to 85°C) W Y .C
WWAT89C52-20PI 00Y .TW W . 100 M .TW W .100 M
W W . 1
.C O M 40P6
W W Y .C O
W W W W
0 Y .CO
W AT89C52-20QI 00 Y .T W W
44Q 0 0 .T .1 0
W W
W
W .100 O M.T
W
W .100 OM
.T
C W .C W
WW .100Y. M.T
W W .100
Y
M.T
W O W C O
W O W
WW .100Y.C M.TW WW
W O
WW .100Y.CPackage M.T
W
Type
W
W Quad 0Flatpack.C O
44A 44-lead, Thin Plastic GullW Wing Y (TQFP)
W .1 0
44J 44-lead, Plastic J-leaded Chip WW Carrier (PLCC)
40P6 40-lead, 0.600" Wide, Plastic Dual Inline Package (PDIP)
44Q 44-lead, Plastic Gull Wing Quad Flatpack (PQFP)
21
W WW 00Y.CO .TW W
.100 M.T W.1 Y.COM W .1 M
W 00 .T W.1 Y.COM W
W .1
WW .100Y W W .100 M.T
W 00 .T
W W .100 M.T
W O W O W W .C O
Ordering InformationWW .C Y W
WW .100Y.C M.TW . 1 00Y M .TW W
W .100 O M.T
W O C
W Speed
WW .1(MHz) .CO Power.TW
W 00Y
.C .TW WW .100Y. .TW
00Y M Supply
W Ordering . 1
Code M Package W O M Operation Range
W W Y .CO
W W WW 00Y.CO .TW W W 0 0 Y.C .T W
W 0 ±
.T 1 OM
240
W.1 Y.COM W
5V 20% AT89C52-24AC .1 M 44A
W. Commercial
W WW 00Y.CO .TW 44J WW
AT89C52-24JC
W 1 0 0 Y.C .TW
(0°C to 70°C)
W . 1 00 M .T W . 1 O M W .
.C O M
W O AT89C52-24PC C 40P6 W
AT89C52-24QC M .TW 44Q W W.100Y OM.TW
W O
W
WW .100Y.C M.TW
O
WW .100Y.C M.TW 44A
AT89C52-24AI
WW .100Y.C M .TW
Industrial
W O W O
W O
WW .100Y.C M.TW AT89C52-24JI WW .100Y.C M.TW44J WW .100Y.C(-40°C M
W
.toT85°C)
W O W O
W O
WW .100Y.C M.TW AT89C52-24QI WW .100Y.C M.TW
AT89C52-24PI 40P6 WW .100Y.C M.TW
W O 44Q W O
W
WW .100Y.C M.TW
O
W W .C O
W 00 Y .T W .1 M .1 M
W 00 .T W .1 M
W W
W
W .100 O M.T
W
W .100 OM
.T
W W.1 Y.COM W
C W .C W
WW .100Y. M.T
W W .100
Y
M.T
W
W .100 OM
.T
W O W C O W .C W
WW .100Y.C M.TW WW .100Y. M .TW W .100
Y
M.T
O W O W .C O
W
W O W O
W
WW .100Y.C M.TW
O
W W .C O
W 00 Y .T W .1 M
W W 00 .T W .1
W 00 .T W.1 Y.COM W M
W
W .100 O M.T
W
W .100 OM
.T
W W.1 Y.COM W
C W .C W
WW .100Y. M.T
W W .100
Y
M.T
W
W .100 OM
.T
W O W C O W .C W
WW .100Y.C M.TW WW .100Y. M .TW W .100
Y
M.T
O W O W .C O
W
W O W O
W
WW .100Y.C M.TW
O
W W .C O
W 00 Y .T W .1 M
W.1 Y.COM W W W.1 Y.COM W WW 00Y.CO .T
W W 00 .T W
W
W .100 O M.T W.1 Y.COM W W W.1 Y.COM
.C W
WW .100Y .TW W . 100 M .T W .100 M
W W .C O M W W Y .C O
W W W W
0 Y.CO
W 00 Y .T W W 0 0 .T .1 0
W W
W
W .100 O M.T
W
W .100 OM
.T
C W .C W
WW .100Y. M.T
W W .100
Y
M.T
W O W C O
W O W
WW .100Y.C M.TW WW
W O
WW .100Y.CPackage M.T
W
Type
W
W Quad 0Flatpack .C O
44A 44-lead, Thin Plastic GullWWing Y (TQFP)
W .1 0
44J WW
44-lead, Plastic J-leaded Chip Carrier (PLCC)
40P6 40-lead, 0.600" Wide, Plastic Dual Inline Package (PDIP)
44Q 44-lead, Plastic Gull Wing Quad Flatpack (PQFP)
22 AT89C52
W WW 00Y.CO .TW W
.100 M.T W.1 Y.COM W .1 M
W .1 O M
W 00
W.1 Y.COM W
.T
.C W W 0
W W
. 100 Y
M .T W W
W . 10 0
O M .T
W .1 0
O M.T
W
WW .100Y.C M.TW
O
W WPackaging .C O InformationWW
W Y .CO .TW W WW 00Y.CO .TW
W 00 Y .T W 0 0 .1 M
W T (1.0 mm) W 0
0Wing Quad .T W .1 J-leaded
W 00 44-lead,
44A, .Thin Plastic Gull
W.1 Y.COM W DimensionsWinWInches
44J, 44-lead, Plastic
.CO
MChip Carrier (PLCC)
W.1Flatpack .C OM
(TQFP) W W 0 Yand (Millimeters) W
W W
. 1 00Y
Dimensions M
in .TW
Millimeters and
W
(Inches)* W . 100 O M .T W .10 AC OM.T
W .CO MS-026
JEDEC STANDARD
WW .100Y.
MS-018 C
WW JEDEC 00Y STANDARD .TW ACB WW .100Y.C M.TW M .TW
. 1 M W O W O
W
WW .100Y.C M.TW
O
X 45° W O
WWSQ 00Y.CO .TW
.045(1.14) X 30° - 45° .012(.305)
Y.C
12.21(0.478)
1 IDCO
.045(1.14)
W W PINY . W W W PIN NO. 1
0 0 .TW .008(.203)
W 00 .T W
11.75(0.458)
. 1 M
IDENTIFY
.1 M
. 1 M W O W O
W
WW .100Y.C M.TW
O
WW .100Y.C M.TW WW .10.656(16.7) 0Y.C M.TW .630(16.0)
W O
WW 00Y.CO .032(.813) Y.C
SQ
W W BSCY.CO W
0.45(0.018)
W W W .650(16.5)
0 0 .TW.021(.533)
.590(15.0)
W 0.80(0.031)
0 0 . T W 0.30(0.012)
. 1 M .T . 1 .695(17.7)O
M
W.1 OM W O .026(.660) W
WW .10.685(17.4) 0Y.C SQ M.TW
WW .100Y.C M.TW
.013(.330)
WW .100Y.C M.TW
W W .C O
W WW 00Y.CO .050(1.27) W W WW 00Y.CO .TW
W 00 Y .T W . 1 M .T TYP
.1 REF SQ OM .043(1.09)
W . 1 O M W O W W
.500(12.7)
.C .020(.508)
W Y .C W W W 0 Y .C .T W W 0 0 Y .T W
.120(3.05)
W . 1 00 M .T .1 0 M W . 1 O M .090(2.29)
W O
W
WW .100Y.C M.TW
O 10.10(0.394)
9.90(0.386)
SQ
WW .100Y.C M.TW WW .100Y.C M .TW
.180(4.57)
.165(4.19)
W O W C O
W O
WW .100Y.C M.TW WW .100Y. .TW
1.20(0.047) MAX
WW 07 .100Y.C M.TW W O M
0.20(.008)
O W O .C
0.09(.003) W
WW .100Y.C M.TW WW .100Y.C M.TW WW.022(.559) . 1 0YMAX
045° (3X) M
.TW
O W O W X
.C O
W
WW .1000.75(0.030) Y.C 0.15(0.006) .TW WW .100Y.C M.TW WW .100Y M .TW
M W O W O
WW .100Y.C M.TW
0.45(0.018) 0.05(0.002)
W O
W W .C O
W 00 Y .T W .1 M
W W 00 .T W
Controlling dimension:
W 00
W.1millimeters OM
.C W
W W
.1 00Y M .TW W
W . 100 O M .T W
W .100 O M.T
W O WW (PQFP) Y. C
40P6, 40-lead, 0.600"
WW Wide, 0 Y.C Dual.TInline
0Plastic W WW 44Q, . 1 0Y.C Plastic
044-lead, M .TW Quad Flat Package
.100 M .TW
.1 M W inOMillimeters and (Inches)* W O
WW .100Y.C M.TW
Package (PDIP) W O Dimensions
Dimensions in Inches WWand (Millimeters)
0 0 Y.C .T W WWJEDEC .1 0 0Y.C MS-022
STANDARD M . TWAB
W W. 1
.C OM
Y W
W
W .100 OM
.C W
W
W 2.07(52.6)
2.04(51.8).1
00YPIN M.TW W
W . 100 O
13.45
M .T(0.525) SQ W
W .100 O M.T
W O WW .100Y .C
WWPIN 1 ID.100Y.C M.TW
12.95 (0.506)
WW .100Y1.C M.TW W OM
.T
W O W .C O W Y .C
WW .100Y.C.566(14.4) W WW .100Y M.T
W W .100 M.T
W O M.T W O W W .C O
WW .100Y.C M.TW
.530(13.5)
WW
0.80 (0.031) BSC .10
0Y.C M.TW W(0.020)
0.50
0.35 (0.014) W.1
00Y M
W W . C O W W Y .C O
W W W 0 Y .CO
Y W W 0 .T 0
W
1.900(48.26) REF W
.100 .090(2.29) OM
.T 0
W.1 Y.COM W W W.1
W .C MAX
W W W
.220(5.59) W
W
Y
.100 .005(.127) O M.T
W
W .100 OM
.T
MAX
CMIN W .C W
WW .100Y. M.T
W W .100
Y
M.T
SEATING W O W C O
PLANE
WW .10.065(1.65) 0Y.C M.TW WW .100Y.
.015(.381)CO W
WW .022(.559)
.161(4.09)
.125(3.18)
W 0 0 Y. .T W WW 10.10 (0.394)
.065(1.65)
W .1 O M 9.90 (0.386)
SQ
.110(2.79) .041(1.04) W .014(.356)
Y .C W
.090(2.29)
W
W .100 O M.T
.630(16.0)
.590(15.0) WW .100Y .C 0
2.45 (0.096) MAX
0 REF
15 WW
W 0.17 (0.007)
0.13 (0.005)
7
.012(.305)
.008(.203)
.690(17.5)
1.03 (0.041)
.610(15.5) 0.25 (0.010) MAX
0.78 (0.030)
Controlling dimension: millimeters
23

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W.1 Y.COM W . WW 00Y.CO .

W .100 M.T W.1 Y.COM W

(T2 EX) P1.1 2 39 P0.0 (AD0)

W.1 Y.COM WPLCC W W.1 Y.COM W WW

WW .100Y.C M.TW P1.5

P0 SP DPL DPH PCON

are then polled by the circuitry in the next cycle. However,

W WW 00Y.CO .TW WW .15.0 1 0 0Y .C .TW WWreliability.

WHigh Voltage O W O 0.7 VCC W W .C O

.C WW Register .TWTest Conditions Y W

Controlling dimension: millimeters

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